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| author | Ruben Undheim <ruben.undheim@gmail.com> | 2018-10-17 17:59:38 +0200 |
|---|---|---|
| committer | Ruben Undheim <ruben.undheim@gmail.com> | 2018-10-17 17:59:38 +0200 |
| commit | db3c67fd6e140893450a44870ee9a75dd1f48b27 (patch) | |
| tree | 3d0e6c278632669b58dd2e69437333e06dba9b25 /techlibs/xilinx/cells_xtra.v | |
| parent | 7b99a3646c44759b82d7df0361d59c72776b8aed (diff) | |
New upstream version 0.8
Diffstat (limited to 'techlibs/xilinx/cells_xtra.v')
| -rw-r--r-- | techlibs/xilinx/cells_xtra.v | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/techlibs/xilinx/cells_xtra.v b/techlibs/xilinx/cells_xtra.v index 69e54233..a2dd01ad 100644 --- a/techlibs/xilinx/cells_xtra.v +++ b/techlibs/xilinx/cells_xtra.v @@ -2225,7 +2225,6 @@ module IOBUF (...); parameter IOSTANDARD = "DEFAULT"; parameter SLEW = "SLOW"; output O; - inout IO; input I, T; endmodule @@ -2237,7 +2236,6 @@ module IOBUF_DCIEN (...); parameter SLEW = "SLOW"; parameter USE_IBUFDISABLE = "TRUE"; output O; - inout IO; input DCITERMDISABLE; input I; input IBUFDISABLE; @@ -2252,7 +2250,6 @@ module IOBUF_INTERMDISABLE (...); parameter SLEW = "SLOW"; parameter USE_IBUFDISABLE = "TRUE"; output O; - inout IO; input I; input IBUFDISABLE; input INTERMDISABLE; @@ -2266,7 +2263,6 @@ module IOBUFDS (...); parameter IOSTANDARD = "DEFAULT"; parameter SLEW = "SLOW"; output O; - inout IO, IOB; input I, T; endmodule @@ -2279,8 +2275,6 @@ module IOBUFDS_DCIEN (...); parameter SLEW = "SLOW"; parameter USE_IBUFDISABLE = "TRUE"; output O; - inout IO; - inout IOB; input DCITERMDISABLE; input I; input IBUFDISABLE; @@ -2294,8 +2288,6 @@ module IOBUFDS_DIFF_OUT (...); parameter IOSTANDARD = "DEFAULT"; output O; output OB; - inout IO; - inout IOB; input I; input TM; input TS; @@ -2310,8 +2302,6 @@ module IOBUFDS_DIFF_OUT_DCIEN (...); parameter USE_IBUFDISABLE = "TRUE"; output O; output OB; - inout IO; - inout IOB; input DCITERMDISABLE; input I; input IBUFDISABLE; @@ -2328,8 +2318,6 @@ module IOBUFDS_DIFF_OUT_INTERMDISABLE (...); parameter USE_IBUFDISABLE = "TRUE"; output O; output OB; - inout IO; - inout IOB; input I; input IBUFDISABLE; input INTERMDISABLE; @@ -2393,7 +2381,6 @@ module ISERDESE2 (...); endmodule module KEEPER (...); - inout O; endmodule module LDCE (...); |