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authorClifford Wolf <clifford@clifford.at>2013-10-16 10:57:18 +0200
committerClifford Wolf <clifford@clifford.at>2013-10-16 10:57:18 +0200
commit5745d3de9afdf525751a1d63d2c936005fe43476 (patch)
treec7c9622f8782975e7c5b213262986476b8581c91 /techlibs
parent845590aa8e3a7994b7082b5f0b4ab39c377163ba (diff)
Added map, par and bitgen to xlinx7 example
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/xilinx7/run_testbench.sh41
1 files changed, 39 insertions, 2 deletions
diff --git a/techlibs/xilinx7/run_testbench.sh b/techlibs/xilinx7/run_testbench.sh
index 31da59eb..b4251f49 100644
--- a/techlibs/xilinx7/run_testbench.sh
+++ b/techlibs/xilinx7/run_testbench.sh
@@ -38,12 +38,49 @@ fi
if [ "$*" = "-map" ]; then
set -x
+
+ cat > testbench_synth.ut <<- EOT
+ -w
+ -g DebugBitstream:No
+ -g Binary:no
+ -g CRC:Enable
+ -g Reset_on_err:No
+ -g ConfigRate:2
+ -g ProgPin:PullUp
+ -g TckPin:PullUp
+ -g TdiPin:PullUp
+ -g TdoPin:PullUp
+ -g TmsPin:PullUp
+ -g UnusedPin:PullDown
+ -g UserID:0xFFFFFFFF
+ -g ExtMasterCclk_en:No
+ -g SPI_buswidth:1
+ -g TIMER_CFG:0xFFFF
+ -g multipin_wakeup:No
+ -g StartUpClk:CClk
+ -g DONE_cycle:4
+ -g GTS_cycle:5
+ -g GWE_cycle:6
+ -g LCK_cycle:NoWait
+ -g Security:None
+ -g DonePipe:No
+ -g DriveDone:No
+ -g en_sw_gsr:No
+ -g drive_awake:No
+ -g sw_clk:Startupclk
+ -g sw_gwe_cycle:5
+ -g sw_gts_cycle:4
+ EOT
+
$XILINX_DIR/bin/lin64/edif2ngd testbench_synth.edif
$XILINX_DIR/bin/lin64/ngdbuild -p xc7k70t testbench_synth
+ $XILINX_DIR/bin/lin64/map -p xc7k70t-fbg676-1 -w -o testbench_mapped.ncd testbench_synth prffile.pcf
+ $XILINX_DIR/bin/lin64/par -w testbench_mapped.ncd testbench_synth.ncd prffile.pcf
+ $XILINX_DIR/bin/lin64/bitgen -f testbench_synth.ut testbench_synth.ncd
fi
if [ "$*" = "-clean" ]; then
- rm -rf netlist.lst _xmsgs/
- rm -f testbench_{synth,gold,gate}*
+ rm -rf netlist.lst _xmsgs/ prffile.pcf
+ rm -f testbench_{synth,gold,gate,mapped}*
fi