diff options
author | Clifford Wolf <clifford@clifford.at> | 2014-02-05 01:55:39 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-02-05 01:55:39 +0100 |
commit | aa9da46807af24d906af371ba9c4ee9b7430f82c (patch) | |
tree | 419341de6dcf24a466a3569cd4c48d4c170c13b4 /tests/k68_vltor | |
parent | 968ae31cac84816691e8b54c086a9e2b3d470440 (diff) |
Removed old unused files from tests/
Diffstat (limited to 'tests/k68_vltor')
-rw-r--r-- | tests/k68_vltor/changes.diff | 12 | ||||
-rw-r--r-- | tests/k68_vltor/clone.sh | 6 | ||||
-rw-r--r-- | tests/k68_vltor/run.sh | 30 |
3 files changed, 0 insertions, 48 deletions
diff --git a/tests/k68_vltor/changes.diff b/tests/k68_vltor/changes.diff deleted file mode 100644 index 7b903403..00000000 --- a/tests/k68_vltor/changes.diff +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/bench/bench.cpp b/bench/bench.cpp -index 47a50c4..de27fbb 100755 ---- a/bench/bench.cpp -+++ b/bench/bench.cpp -@@ -71,6 +71,7 @@ int main(int argc, char **argv, char **env) { - main_time++; - top->arbclk_i = !top->arbclk_i; - if (main_time%5 == 0) top->clk = !top->clk; -+ if (main_time%100000 == 0) cout<<"Partial sum = "<<hex<<top->sum<<"\n"; - } - - cout<<"Final sum = "<<hex<<top->sum<<"\n"; diff --git a/tests/k68_vltor/clone.sh b/tests/k68_vltor/clone.sh deleted file mode 100644 index 54bba521..00000000 --- a/tests/k68_vltor/clone.sh +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/bash -set -ex -rm -rf verilog-sim-benchmarks -git clone http://git.veripool.org/git/verilog-sim-benchmarks -cd verilog-sim-benchmarks -patch -p1 < ../changes.diff diff --git a/tests/k68_vltor/run.sh b/tests/k68_vltor/run.sh deleted file mode 100644 index 97ccf238..00000000 --- a/tests/k68_vltor/run.sh +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/bash - -if ( - set -ex - cd verilog-sim-benchmarks - rm -rf obj_dir_* synth - - cd rtl - mkdir -p ../synth - ../../../../yosys -o ../synth/k68_soc.v -p 'hierarchy -check -top k68_soc; proc; opt; memory; opt' \ - k68_soc.v k68_arb.v k68_cpu.v k68_load.v k68_clkgen.v k68_decode.v k68_execute.v \ - k68_fetch.v k68_regbank.v k68_buni.v k68_b2d.v k68_ccc.v k68_d2b.v k68_rox.v \ - k68_calc.v k68_dpmem.v k68_sasc.v sasc_brg.v sasc_top.v sasc_fifo4.v - - cd .. - VERILATOR_OPT="-Wno-fatal -Ibench --cc bench/k68_soc_test.v --exe bench/bench.cpp -prefix m68 -x-assign 0" - verilator -Mdir obj_dir_rtl -Irtl $VERILATOR_OPT; make -C obj_dir_rtl -f m68.mk - verilator -Mdir obj_dir_synth -Isynth $VERILATOR_OPT; make -C obj_dir_synth -f m68.mk - - ./obj_dir_rtl/m68 100000 | tee output_rtl.txt - ./obj_dir_synth/m68 100000 | tee output_synth.txt - diff -u <( grep ' sum ' output_rtl.txt; ) <( grep ' sum ' output_synth.txt; ) -); then - echo OK - exit 0 -else - echo ERROR - exit 1 -fi - |