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-rw-r--r--examples/gowin/.gitignore8
-rw-r--r--examples/gowin/README17
-rw-r--r--examples/gowin/demo.cst41
-rw-r--r--examples/gowin/demo.sdc1
-rw-r--r--examples/gowin/demo.v12
-rw-r--r--examples/gowin/run.sh12
-rw-r--r--examples/gowin/testbench.v40
7 files changed, 131 insertions, 0 deletions
diff --git a/examples/gowin/.gitignore b/examples/gowin/.gitignore
new file mode 100644
index 00000000..71030bdb
--- /dev/null
+++ b/examples/gowin/.gitignore
@@ -0,0 +1,8 @@
+demo.bit
+demo.out
+demo.rpt
+demo_syn.v
+demo_out.v
+demo_tr.html
+testbench
+testbench.vcd
diff --git a/examples/gowin/README b/examples/gowin/README
new file mode 100644
index 00000000..0194e9f0
--- /dev/null
+++ b/examples/gowin/README
@@ -0,0 +1,17 @@
+Simple test project for Gowinsemi GW2A-55K Eval Board Mini.
+
+Follow the install instructions for the Gowinsemi tools below,
+then run "bash run.sh" in this directory.
+
+
+Install instructions for gowinTool_linux
+----------------------------------------
+
+1.) extract gowinTool_linux.zip
+
+2.) set GOWIN_HOME env variable to the full path to the
+gowinTool_linux directory
+
+3.) edit gowinTool_linux/bin/gwlicense.ini. Set lic="..." to
+the full path to the license file.
+
diff --git a/examples/gowin/demo.cst b/examples/gowin/demo.cst
new file mode 100644
index 00000000..22d7eb66
--- /dev/null
+++ b/examples/gowin/demo.cst
@@ -0,0 +1,41 @@
+// 50 MHz Clock
+IO_LOC "clk" D11;
+
+// LEDs
+IO_LOC "leds[0]" D22;
+IO_LOC "leds[1]" E22;
+IO_LOC "leds[2]" G22;
+IO_LOC "leds[3]" J22;
+IO_LOC "leds[4]" L22;
+IO_LOC "leds[5]" L19;
+IO_LOC "leds[6]" L20;
+IO_LOC "leds[7]" M21;
+IO_LOC "leds[8]" N19;
+IO_LOC "leds[9]" R19;
+IO_LOC "leds[10]" T18;
+IO_LOC "leds[11]" AA22;
+IO_LOC "leds[12]" U18;
+IO_LOC "leds[13]" V20;
+IO_LOC "leds[14]" AA21;
+IO_LOC "leds[15]" AB21;
+
+
+// 7-Segment Display
+IO_LOC "seg7dig[0]" E20;
+IO_LOC "seg7dig[1]" G18;
+IO_LOC "seg7dig[2]" G20;
+IO_LOC "seg7dig[3]" F21;
+IO_LOC "seg7dig[4]" J20;
+IO_LOC "seg7dig[5]" H21;
+IO_LOC "seg7dig[6]" H18;
+IO_LOC "seg7dig[7]" D20;
+IO_LOC "seg7sel[0]" C19;
+IO_LOC "seg7sel[1]" B22;
+IO_LOC "seg7sel[2]" C20;
+IO_LOC "seg7sel[3]" C21;
+
+// Switches
+IO_LOC "sw[0]" AB20;
+IO_LOC "sw[1]" AB19;
+IO_LOC "sw[2]" AB18;
+IO_LOC "sw[3]" AB17;
diff --git a/examples/gowin/demo.sdc b/examples/gowin/demo.sdc
new file mode 100644
index 00000000..6c90325f
--- /dev/null
+++ b/examples/gowin/demo.sdc
@@ -0,0 +1 @@
+create_clock -name clk -period 20 -waveform {0 10} [get_ports {clk}]
diff --git a/examples/gowin/demo.v b/examples/gowin/demo.v
new file mode 100644
index 00000000..6ea10838
--- /dev/null
+++ b/examples/gowin/demo.v
@@ -0,0 +1,12 @@
+module demo (
+ input clk,
+ input [3:0] sw,
+ output [15:0] leds,
+ output [7:0] seg7dig,
+ output [3:0] seg7sel
+);
+ localparam PRESCALE = 20;
+ reg [PRESCALE+3:0] counter = 0;
+ always @(posedge clk) counter <= counter + 1;
+ assign leds = 1 << counter[PRESCALE +: 4];
+endmodule
diff --git a/examples/gowin/run.sh b/examples/gowin/run.sh
new file mode 100644
index 00000000..33a7b5c3
--- /dev/null
+++ b/examples/gowin/run.sh
@@ -0,0 +1,12 @@
+#!/bin/bash
+set -ex
+yosys -p "synth_gowin -top demo -vout demo_syn.v" demo.v
+$GOWIN_HOME/bin/gowin -d demo_syn.v -cst demo.cst -sdc demo.sdc -p GW2A55-PBGA484-6 \
+ -warning_all -out demo_out.v -rpt demo.rpt -tr demo_tr.html -bit demo.bit
+
+# post place&route simulation (icarus verilog)
+if false; then
+ iverilog -D POST_IMPL -o testbench -s testbench testbench.v \
+ demo_out.v $(yosys-config --datdir/gowin/cells_sim.v)
+ vvp -N testbench
+fi
diff --git a/examples/gowin/testbench.v b/examples/gowin/testbench.v
new file mode 100644
index 00000000..6d206381
--- /dev/null
+++ b/examples/gowin/testbench.v
@@ -0,0 +1,40 @@
+module testbench;
+ reg clk;
+
+ initial begin
+ #5 clk = 0;
+ forever #5 clk = ~clk;
+ end
+
+ wire [15:0] leds;
+
+ initial begin
+ // $dumpfile("testbench.vcd");
+ // $dumpvars(0, testbench);
+ $monitor("%b", leds);
+ end
+
+ demo uut (
+ .clk (clk ),
+`ifdef POST_IMPL
+ .\leds[0] (leds[0]),
+ .\leds[1] (leds[1]),
+ .\leds[2] (leds[2]),
+ .\leds[3] (leds[3]),
+ .\leds[4] (leds[4]),
+ .\leds[5] (leds[5]),
+ .\leds[6] (leds[6]),
+ .\leds[7] (leds[7]),
+ .\leds[8] (leds[8]),
+ .\leds[9] (leds[9]),
+ .\leds[10] (leds[10]),
+ .\leds[11] (leds[11]),
+ .\leds[12] (leds[12]),
+ .\leds[13] (leds[13]),
+ .\leds[14] (leds[14]),
+ .\leds[15] (leds[15])
+`else
+ .leds(leds)
+`endif
+ );
+endmodule