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Author
Age
*
Added equiv_miter
Clifford Wolf
2015-01-25
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Added ENABLE_NDEBUG makefile options
Clifford Wolf
2015-01-24
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Added #ifdef NDEBUG for log_assert()
Clifford Wolf
2015-01-24
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Fixed xilinx FDSE sim model
Clifford Wolf
2015-01-24
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Various equiv_* improvements
Clifford Wolf
2015-01-24
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Added dict/pool.sort()
Clifford Wolf
2015-01-24
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Improvements in equiv_make, equiv_induct
Clifford Wolf
2015-01-22
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Improved xdot calling
Clifford Wolf
2015-01-22
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Added equiv_induct
Clifford Wolf
2015-01-22
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Various equiv_simple improvements
Clifford Wolf
2015-01-22
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Moved equiv stuff to passes/equiv/
Clifford Wolf
2015-01-22
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Progress in equiv_simple
Clifford Wolf
2015-01-21
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Fixed opt_muxtree performance bug
Clifford Wolf
2015-01-21
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Faster "make clean-abc"
Clifford Wolf
2015-01-20
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README stuff
Clifford Wolf
2015-01-20
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Added equiv_simple
Clifford Wolf
2015-01-19
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Added equiv_status
Clifford Wolf
2015-01-19
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Added equiv_make command
Clifford Wolf
2015-01-19
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Added $equiv cell type
Clifford Wolf
2015-01-19
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Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf
2015-01-18
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Merge pull request #47 from mschmoelzer/master
Clifford Wolf
2015-01-18
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Add "echo-yosys-ver" and "echo-git-rev" Makefile targets.
Martin Schmölzer
2015-01-18
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Various cleanups in xilinx techlib
Clifford Wolf
2015-01-18
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Refactoring of memory_bram and xilinx brams
Clifford Wolf
2015-01-18
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*
improvements in muxtree/select_leaves test
Clifford Wolf
2015-01-18
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Improvements in opt_muxtree
Clifford Wolf
2015-01-18
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More opt_muxtree cleanups
Clifford Wolf
2015-01-18
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Added hashlib::idict<>
Clifford Wolf
2015-01-18
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Various cleanups and improvements in opt_muxtree
Clifford Wolf
2015-01-18
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Added synth_xilinx -retime -flatten
Clifford Wolf
2015-01-17
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Added support for memories to flatten (techmap)
Clifford Wolf
2015-01-17
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Added MUXCY and XORCY support to synth_xilinx
Clifford Wolf
2015-01-17
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Fixed a bug in opt_muxtree for "mux forests"
Clifford Wolf
2015-01-17
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Improved opt_muxtree
Clifford Wolf
2015-01-17
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Optimizing no-op cell->setPort()
Clifford Wolf
2015-01-17
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Bugfix in dff2dffe
Clifford Wolf
2015-01-16
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Added cells.lib
Clifford Wolf
2015-01-16
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Added dff2dffe to synth_xilinx
Clifford Wolf
2015-01-16
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Added more FF types to xilinx/cells.v
Clifford Wolf
2015-01-16
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Fixed xilinx bram clock inverted config
Clifford Wolf
2015-01-16
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Added FF cells to xilinx/cells_sim.v
Clifford Wolf
2015-01-16
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Added Xilinx MUXF7 and MUXF8 support
Clifford Wolf
2015-01-15
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Added "abc -lut w1:w2"
Clifford Wolf
2015-01-15
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Fixed handling of foo.__TECHMAP_...
Clifford Wolf
2015-01-15
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Ignoring more system task and functions
Clifford Wolf
2015-01-15
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Fixed handling of "input foo; reg [0:0] foo;"
Clifford Wolf
2015-01-15
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Consolidate "Blocking assignment to memory.." msgs for the same line
Clifford Wolf
2015-01-15
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Various cleanups in synth_xilinx command
Clifford Wolf
2015-01-13
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Re-enabled mux->and/or transform (and fixed lm32 in yosys-bigsim)
Clifford Wolf
2015-01-13
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Tiny fix in vcdcd.pl
Clifford Wolf
2015-01-13
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