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simplify.cc
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Author
Age
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Behavior should be identical now to rev. 0b4a64ac6adbd6 (next: testing before...
Clifford Wolf
2013-11-02
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Various ast changes for early expression width detection (prep for constfold ...
Clifford Wolf
2013-11-02
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Fixed handling of boolean attributes (frontends)
Clifford Wolf
2013-10-24
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Added support for notif0/notif1 primitives
Johann Glaser
2013-08-20
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Added support for bufif0/bufif1 primitives
Clifford Wolf
2013-08-19
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Improved ast dumping (ast/verilog frontend)
Clifford Wolf
2013-08-19
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Added defparam support to Verilog/AST frontend
Clifford Wolf
2013-07-04
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Fixes and improvements in AST const folding
Clifford Wolf
2013-06-10
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Enabled AST/Verilog front-end optimizations per default
Clifford Wolf
2013-06-10
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Merge branch 'bugfix'
Clifford Wolf
2013-05-16
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Fixed synthesis of functions in latched blocks
Clifford Wolf
2013-05-16
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Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
Clifford Wolf
2013-03-31
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Improvements and bugfixes for generate blocks with local signals
Clifford Wolf
2013-03-26
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Fixed handling of unconditional generate blocks
Clifford Wolf
2013-03-26
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Added nosync attribute and some async reset related fixes
Clifford Wolf
2013-03-25
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Added mem2reg option to verilog frontend
Clifford Wolf
2013-03-24
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Another fix in mem2reg ast simplify logic
Clifford Wolf
2013-03-24
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Improved mem2reg handling in ast simplifier
Clifford Wolf
2013-03-24
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Tiny fixes to verilog parser
Clifford Wolf
2013-03-23
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Moved stand-alone libs to libs/ directory and added libs/subcircuit
Clifford Wolf
2013-02-27
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Added support for verilog genblock[index].member syntax
Clifford Wolf
2013-02-26
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initial import
Clifford Wolf
2013-01-05