Commit message (Expand) | Author | Age | |
---|---|---|---|
* | Enabled AST/Verilog front-end optimizations per default | Clifford Wolf | 2013-06-10 |
* | added option '-Dname[=definition]' to command 'read_verilog' | Johann Glaser | 2013-05-19 |
* | Implemented proper handling of stub placeholder modules | Clifford Wolf | 2013-03-28 |
* | Added mem2reg option to verilog frontend | Clifford Wolf | 2013-03-24 |
* | Added help messages to ilang and verilog frontends | Clifford Wolf | 2013-03-01 |
* | Moved stand-alone libs to libs/ directory and added libs/subcircuit | Clifford Wolf | 2013-02-27 |
* | initial import | Clifford Wolf | 2013-01-05 |