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path: root/passes/memory/memory_bram.cc
Commit message (Expand)AuthorAge
* Import more std:: stuff into Yosys namespaceClifford Wolf2015-10-25
* Bugfix in bram read-enable codeClifford Wolf2015-09-25
* Added read-enable to memory modelClifford Wolf2015-09-25
* Fixed memory_bram for ROMs in BRAMs with write-enable inputsClifford Wolf2015-09-24
* Spell check (by Larry Doolittle)Clifford Wolf2015-08-14
* Fixed trailing whitespacesClifford Wolf2015-07-02
* Added memory_bram "make_outreg" featureClifford Wolf2015-04-09
* Added support for "file names with blanks"Clifford Wolf2015-04-08
* Added support for initialized bramsClifford Wolf2015-04-06
* Added $meminit support to "memory" commandClifford Wolf2015-02-14
* Fixed typos found by lintianRuben Undheim2015-02-01
* Refactoring of memory_bram and xilinx bramsClifford Wolf2015-01-18
* memory_bram hotfix for memories with width 1Clifford Wolf2015-01-06
* removed old debug codeClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-05
* Towards Xilinx bram supportClifford Wolf2015-01-04
* Added memory_bram "shuffle_enable" featureClifford Wolf2015-01-04
* Removed left over debug code from memory_bramClifford Wolf2015-01-04
* Added memory_bram 'or_next_if_better' featureClifford Wolf2015-01-03
* memory_bram transp supportClifford Wolf2015-01-03
* Progress in memory_bramClifford Wolf2015-01-03
* Added proper clkpol support to memory_bramClifford Wolf2015-01-02
* Progress in memory_bramClifford Wolf2015-01-02
* Progress in memory_bramClifford Wolf2015-01-02
* Progress in memory_bramClifford Wolf2015-01-01
* Progress in memory_bramClifford Wolf2015-01-01
* Progress in memory_bramClifford Wolf2014-12-31
* Added memory_bram (not functional yet)Clifford Wolf2014-12-31