diff options
Diffstat (limited to 'demo')
91 files changed, 14982 insertions, 0 deletions
diff --git a/demo/Demo project.mcu8051ide b/demo/Demo project.mcu8051ide new file mode 100644 index 0000000..21f2ef6 --- /dev/null +++ b/demo/Demo project.mcu8051ide @@ -0,0 +1,441 @@ +<?xml version='1.0' encoding='utf-8'?> +<!DOCTYPE tk_mcuide_project [ + + <!-- Declare entities --> + <!ENTITY quot """> + <!ENTITY amp "&"> + <!ENTITY lt "<"> + <!ENTITY gt ">"> + + <!-- ROOT ELEMENT --> + <!ELEMENT tk_mcuide_project (general, other_options, compiler_options, files)> + <!-- Root element Parameters: + version - Project version (user defined) + date - Project last update (user defined) + creator_ver - MCU 8051 IDE version (hardcoded in program) + --> + <!ATTLIST tk_mcuide_project + version CDATA #IMPLIED + date CDATA #IMPLIED + creator_ver CDATA #IMPLIED + > + + <!-- General information about the project --> + <!ELEMENT general (authors, copyright, licence, processor, options, graph, description, todo, calculator)> + + <!-- List of project authors, one name per line --> + <!ELEMENT authors (#PCDATA)> + + <!-- Copyrigh information --> + <!ELEMENT copyright (#PCDATA)> + + <!-- Project licence --> + <!ELEMENT licence (#PCDATA)> + + <!-- Processor type and configuration --> + <!ELEMENT processor EMPTY> + + <!-- Parameters of tag "processor": + type - Processor type (e.g. AT89C51RC or 80C51) + clock - Clock frequency in kHz + xdata - Size of connected XDATA memory (0 means disconnected) + xcode - Size of connected XCODE memory (0 means disconnected) + --> + <!ATTLIST processor + type CDATA #IMPLIED + clock CDATA #IMPLIED + xdata CDATA #IMPLIED + xcode CDATA #IMPLIED + > + + <!-- Various project options --> + <!ELEMENT options EMPTY> + + <!-- Parameters of tag "options": + watches_file - Relative or absolute path to definition file of register watches + scheme - Relative or absolute path to scheme file + main_file - Main project source code file (e.g. main.c) + auto_sw_enabled - Automatic file switching during simulation locked + --> + <!ATTLIST options + watches_file CDATA #IMPLIED + scheme CDATA #IMPLIED + main_file CDATA #IMPLIED + auto_sw_enabled (0|1) #IMPLIED + > + + <!-- Ports graph definition --> + <!ELEMENT graph EMPTY> + + <!-- Parameters of tag "graph": + grid - Grid mode + magnification - Magnification level (must be an integer between 0 and 3) + enabled - Graph enable flag (Boolean value 0 or 1) + marks_s - List of state graph marks (String of zeros and ones, e.g. 00100110) + marks_l - List of laches graph marks (String of zeros and ones, e.g. 00100110) + marks_o - List of output graph marks (String of zeros and ones, e.g. 00100110) + active_page - Active page + --> + <!ATTLIST graph + grid (n|b|x|y) #IMPLIED + magnification (0|1|2|3) #IMPLIED + enabled (0|1) #IMPLIED + marks_s CDATA #IMPLIED + marks_l CDATA #IMPLIED + marks_o CDATA #IMPLIED + active_page CDATA #IMPLIED + > + + <!-- Project description text (plain text only) --> + <!ELEMENT description (#PCDATA)> + + <!-- Project to do list (SGML format) --> + <!ELEMENT todo (#PCDATA)> + + <!-- Calculator configuration --> + <!ELEMENT calculator EMPTY> + + <!-- Parameters of tag "calculator": + radix - Radix (one of {Dec Hex Bin Oct}) + angle_unit - Angle unit (one of {deg rad grad}) + display0 - Primary display + display1 - Opereator display + display2 - Secondary display + memory0 - Content of memory bank 0 + memory1 - Content of memory bank 1 + memory2 - Content of memory bank 2 + freq - Timers preset calculator: Frequency + time - Timers preset calculator: Desired time + mode - Timers preset calculator: Timer mode (one of {0 1 2}) + --> + <!ATTLIST calculator + radix (Dec|Hex|Bin|Oct) #IMPLIED + angle_unit (deg|rad|grad) #IMPLIED + display0 CDATA #IMPLIED + display1 CDATA #IMPLIED + display2 CDATA #IMPLIED + memory0 CDATA #IMPLIED + memory1 CDATA #IMPLIED + memory2 CDATA #IMPLIED + freq CDATA #IMPLIED + time CDATA #IMPLIED + mode (0|1|2) #IMPLIED + > + + <!-- Other options (it can contain anything) --> + <!ELEMENT other_options (#PCDATA)> + + <!-- Compiler options --> + <!ELEMENT compiler_options (#PCDATA)> + + <!-- Project files --> + <!ELEMENT files (file)*> + + <!-- Parameters of tag "files": + count - Number of project files + current_file - Current file in left/top view + current_file2 - Current file in right/bottom view (if it's less than zero then editor won't be splitted) + pwin_sash - Position of paned window sash (has meaning only if editor was splitted) + selected_view - Active view; 0 == left/top, 1 == right/bottom + pwin_orient - Orientation of paned window for multiview (one of {horizontal vertical}) + --> + <!ATTLIST files + count CDATA #IMPLIED + current_file CDATA #IMPLIED + current_file2 CDATA #IMPLIED + pwin_sash CDATA #IMPLIED + selected_view (0|1) #IMPLIED + pwin_orient (horizontal|vertical) #IMPLIED + > + + <!-- Project file description --> + <!ELEMENT file (actual_line, md5_hash, path, bookmarks, breakpoints, eol, encoding, notes)> + + <!-- Parameters of tag "file": + name - File name without path + active - "yes" == opended; "no" == closed + o_bookmark - Bookmark in list of opened files + p_bookmark - Bookmark in list of project files + file_index - File index in the list + read_only - Read only flag + highlight - Syntax highlight + --> + <!ATTLIST file + name CDATA #IMPLIED + active (yes|no) #IMPLIED + o_bookmark (1|0) #IMPLIED + p_bookmark (1|0) #IMPLIED + file_index CDATA #IMPLIED + read_only (1|0) #IMPLIED + highlight CDATA #IMPLIED + > + + <!-- Current line --> + <!ELEMENT actual_line EMPTY> + + <!-- Parameters of tag "actual_line": + value - Current line in the file + --> + <!ATTLIST actual_line + value CDATA #IMPLIED + > + + <!-- MD5 hash for the file --> + <!ELEMENT md5_hash EMPTY> + + <!-- Parameters of tag "md5_hash": + value - Last MD5 hash + --> + <!ATTLIST md5_hash + value CDATA #IMPLIED + > + + <!-- File path --> + <!ELEMENT path (#PCDATA)> + + <!-- Bookmarks: string of zeros and ones --> + <!ELEMENT bookmarks (#PCDATA)> + + <!-- Breakpoints: string of zeros and ones --> + <!ELEMENT breakpoints (#PCDATA)> + + <!-- End Of Line character name --> + <!ELEMENT eol EMPTY> + + <!-- Parameters of tag "eol": + value - EOL character (lf == "Line feed" 0x0A; cr == "Carriage return" 0x0D) + --> + <!ATTLIST eol + value (lf|cr|crlf) #IMPLIED + > + + <!-- File encoding (we strongly recomend to use utf-8 only) --> + <!ELEMENT encoding EMPTY> + + <!-- File notes --> + <!ELEMENT notes (#PCDATA)> + + <!-- Parameters of tag "encoding": + value - Name of choosen encoding + --> + <!ATTLIST encoding + value CDATA #IMPLIED + > +]> +<tk_mcuide_project version="0.9.5" date="03/02/09" creator_ver="1.3.3"> + <general> + <authors><![CDATA[Martin Osmera <martin.osmera@gmail.com> +]]></authors> + <copyright><![CDATA[]]></copyright> + <licence><![CDATA[GPLv2]]></licence> + <processor type="AT89S2051" clock="12000" xdata="0" xcode="0"/> + <options + watches_file="demo.wtc" + scheme="" + main_file="" + auto_sw_enabled="1" + /> + <graph + grid="y" + magnification="0" + enabled="1" + marks_s="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" + marks_l="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" + marks_o="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" + active_page="output" + /> + <description><![CDATA[This is demonstration project for MCU 8051 IDE and nothing more. + +Thank you for using MCU 8051 IDE. +]]></description> + <todo><![CDATA[ <u><b>WELCOME TO MCU 8051 IDE</u></b> + +<u>What does it consist of:</u> <u>Basic key shortcuts:</u> + LEFT: <b>F2</b> - <i>Initialize simulator</i> +<i> 1. List of opened files </i><b>F7</b> - <i>Step program</i> +<i> 2. List of project files </i><b>F6</b> - <i>Animate program</i> +<i> 3. Filesystem browser </i><b>F4</b> - <i>Reset simulator</i> +<i> 4. SFR watches </i><b>CTRL+F7</b> - Step back + RIGHT: <bookmark/> Thank you for trying MCU 8051 IDE +<i> 1. Bookmarks + 2. Breakpoints + 3. Symbol list + 4. Instruction details + 5. Register watches + 6. Subprograms monitor +</i> 7. HW plug-ins + BOTTOM: +<i> 1. Simulator panel + 2. C code debugger + 3. Graph of voltage levels on processor ports + 4. Messages text (Compiler output) + 5. This text editor + 6. Scientific calculator and calculator for computing timer preset + 7. Terminal emulator +</i> 8. Tool for searching in files + +]]></todo> + <calculator + radix="Dec" + angle_unit="rad" + display0="88" + display1="add" + display2="99" + memory0="88" + memory1="66" + memory2="45" + freq="12000" + time="565" + mode="0" + /> + </general> + <other_options><![CDATA[]]></other_options> + <compiler_options><![CDATA[{_title 0 _list 0 _print 0 _nomod 0 max_ihex_rec_length 255 _object 0 _pagelength 0 QUIET 0 _symbols 0 CREATE_SIM_FILE 1 CREATE_BIN_FILE 1 _pagewidth 0 optim_ena 0 _date 0 _paging 0 WARNING_LEVEL 0} 0 {--verbose 1 -i {} custom {} --columns 0 --omf-51 0} {adf 1} {-L 1 -M 0 custom {} -n 0 -P 0 -A 0 -a 0 -r {} -C 0 -c 0 -s 1 -U 0 -u 0 -g MAP -w 0 -cpu 8051 -x 0 -h 0 -quiet 0 -i {} -I 1} {ihex 1 adf 1} {--out-fmt-s19 0 --fdollars-in-identifiers 0 --nogcse 0 --nooverlay 1 --no-peep-comments 0 --no-c-code-in-asm 0 --print-search-dirs 0 --nostdlib 0 --peep-asm 0 --nolabelopt 0 --short-is-8bits 0 --cyclomatic 0 --compile-only 0 --no-reg-params 0 --noinvariant 0 --profile 0 --out-fmt-ihx 0 --noinduction 1 --opt-code-size 0 --nojtbound 0 --no-peep 0 --less-pedantic 0 --no-xinit-opt 0 --xstack 0 --funsigned-char 0 --verbose 1 -S 0 --debug 1 --preprocessonly 0 --opt-code-speed 0 --parms-in-bank1 0 --float-reent 0 -V 1 --c1mode 0 --fverbose-asm 0 --fommit-frame-pointer 0 --xram-movc 0 --main-return 0 --nostdinc 0 --noloopreverse 0 --stack-probe 0 --all-callee-saves 0 --int-long-reent 0 --stack-auto 0 --use-stdout 0} {standard --std-sdcc89 model --model-small stack --pack-iram custom {}} {--stack-size {} --code-loc {} --constseg {} --codeseg {} --xram-loc {} --data-loc {} --stack-loc {} --xstack-loc {} --lib-path {}} {--disable-warning {} -L {} -l {} -I {}} {} {}]]></compiler_options> + <files + count="9" + current_file="8" + current_file2="-1" + pwin_sash="304" + selected_view="0" + pwin_orient="horizontal"> + + <file name="demo0.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="0" read_only="0" highlight="0"> + <actual_line value="1"/> + <md5_hash value="433B30D0A7A37EA31EA1FC96F9A63294"/> + <path><![CDATA[]]></path> + <bookmarks> + 00000000000000001000000000000 + </bookmarks> + <breakpoints> + 00000000000000000100000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[Basic demonstration code ... +]]></notes> + </file> + + <file name="demo1.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="1" read_only="0" highlight="0"> + <actual_line value="1"/> + <md5_hash value="D9C47EC024BB961B1F86B2A2C82D6D7A"/> + <path><![CDATA[]]></path> + <bookmarks> + 00000000000000000000000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 00000000000000000000000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[Quite more advance demonstration code ... +]]></notes> + </file> + + <file name="demo2.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="2" read_only="0" highlight="0"> + <actual_line value="1"/> + <md5_hash value="016FCF566042EC66EE9118BAFA4D4A35"/> + <path><![CDATA[]]></path> + <bookmarks> + 00000000000000000000000000000000000000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 00000000000000000000000000000000000000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[Next demonstration code ... +]]></notes> + </file> + + <file name="demo3.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="3" read_only="0" highlight="0"> + <actual_line value="1"/> + <md5_hash value="6180D365C7F535CABD42C3E78A0798B9"/> + <path><![CDATA[]]></path> + <bookmarks> + 00000000000000000000000000000000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 00000000000000000000000000000000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + <file name="demo5.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="4" read_only="0" highlight="0"> + <actual_line value="13"/> + <md5_hash value="8A77C444C26BA55C5A8AC82FE0C8CFA9"/> + <path><![CDATA[]]></path> + <bookmarks> + 000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + <file name="demo_c_0.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="5" read_only="0" highlight="1"> + <actual_line value="1"/> + <md5_hash value="79C98C5ADE29831807D59F6BC438063A"/> + <path><![CDATA[]]></path> + <bookmarks> + 0000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 0000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + <file name="ledmatrix.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="6" read_only="0" highlight="1"> + <actual_line value="1"/> + <md5_hash value="517133F895352F3918C3E1250EA990A5"/> + <path><![CDATA[]]></path> + <bookmarks> + 000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + <file name="keypad_display.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="7" read_only="0" highlight="1"> + <actual_line value="10"/> + <md5_hash value="E44E4DC2094E8EB729FE653002B40A33"/> + <path><![CDATA[]]></path> + <bookmarks> + 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + <file name="mleddisplay.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="8" read_only="0" highlight="0"> + <actual_line value="15"/> + <md5_hash value="BFC1B21D558BFAE2B1E43162DAEFE347"/> + <path><![CDATA[]]></path> + <bookmarks> + 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 + </bookmarks> + <breakpoints> + 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 + </breakpoints> + <eol value="lf"/> + <encoding value="utf-8"/> + <notes><![CDATA[]]></notes> + </file> + + </files> +</tk_mcuide_project>
\ No newline at end of file diff --git a/demo/demo.wtc b/demo/demo.wtc new file mode 100644 index 0000000..505abd2 --- /dev/null +++ b/demo/demo.wtc @@ -0,0 +1,15 @@ +# Watches definition file -- MCU 8051 IDE v1.3.1 +# Date: 10/27/2009 + FF Register watches +00FF Some XRAM reg + 0FF Some ERAM reg + 00 ---------------- + 80 IDATA reg not SFR + 90 IDATA reg not SFR + A0 IDATA reg not SFR + B0 IDATA reg not SFR + D0 ---------------- + .20 Some bit + .21 Another bit + 20 DATA_PTR + 0F COUNTER
\ No newline at end of file diff --git a/demo/demo0.adf b/demo/demo0.adf new file mode 100644 index 0000000..7de7de2 --- /dev/null +++ b/demo/demo0.adf @@ -0,0 +1,9 @@ +# Assembler debug file for MCU 8051 IDE v1.1 +# Used assembler: MCU 8051 IDE +# Date: 03/02/09 +87B0FFA871A3B2978A4FD4309AE5D3D4 "demo0.asm" +0 8 0 8 +0 9 1 6 +0 10 2 184 127 251 +0 11 5 120 0 +0 12 7 128 247
\ No newline at end of file diff --git a/demo/demo0.asm b/demo/demo0.asm new file mode 100644 index 0000000..f44ee47 --- /dev/null +++ b/demo/demo0.asm @@ -0,0 +1,27 @@ +; MCU 8051 IDE - Demostration code +; Very simple code + +; Press F2 and F6 to run the program (start simulator and animate) + + org 0h + +main: inc R0 + inc @R0 + cjne R0, #07Fh, main + mov R0, #0d + sjmp main + + end + +; <-- Bookmark (try Alt+PgUp/Alt+PgDown) +; <-- Breakpoint + +; ----------------------------------------- +; NOTICE: +; Simulator limitations: +; * SPI +; * Access to external code memory +; * Power down modes +; ----------------------------------------- + +; IF YOU HAVE FOUND SOME BUG IN THIS IDE , PLEASE LET ME KNOW diff --git a/demo/demo0.bin b/demo/demo0.bin new file mode 100644 index 0000000..5511873 --- /dev/null +++ b/demo/demo0.bin @@ -0,0 +1 @@ +¸û
\ No newline at end of file diff --git a/demo/demo0.hex b/demo/demo0.hex new file mode 100644 index 0000000..d34107a --- /dev/null +++ b/demo/demo0.hex @@ -0,0 +1,2 @@ +:090000000806B87FFB780080F7C8 +:00000001FF
\ No newline at end of file diff --git a/demo/demo0.lst b/demo/demo0.lst new file mode 100644 index 0000000..2a87958 --- /dev/null +++ b/demo/demo0.lst @@ -0,0 +1,198 @@ +demo0 PAGE 1 + 1 ; MCU 8051 IDE - Demostration code + 2 ; Very simple code + 3 + 4 ; Press F2 and F6 to run the program (start simulator and animate) + 5 + 6 org 0h + 7 +0000 06 8 main: inc R0 +0001 B87FFB 9 inc @R0 +0002 7800 10 cjne R0, #07Fh, main +0005 80F7 11 mov R0, #0d + 12 sjmp main + 13 + 14 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +MAIN . . . . . . . . . . . . . . . . C ADDR 0000H +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
\ No newline at end of file diff --git a/demo/demo0.sim b/demo/demo0.sim new file mode 100644 index 0000000..a2482bc --- /dev/null +++ b/demo/demo0.sim @@ -0,0 +1,6 @@ +458DB610414A7EC882B8DFA06C1D6748 12/21/07 demo0.asm +8 0 8 +9 1 6 +10 2 184 127 251 +11 5 120 0 +12 7 128 247
\ No newline at end of file diff --git a/demo/demo1.adf b/demo/demo1.adf new file mode 100644 index 0000000..e4387cf --- /dev/null +++ b/demo/demo1.adf @@ -0,0 +1,19 @@ +# Assembler debug file for MCU 8051 IDE v1.1 +# Used assembler: MCU 8051 IDE +# Date: 03/02/09 +D9C47EC024BB961B1F86B2A2C82D6D7A "demo1.asm" +0 48 0 128 0 +0 52 2 117 144 15 +0 53 5 117 176 30 +0 54 8 128 0 +0 58 10 229 15 +0 58 12 4 +0 58 13 245 15 +0 58 15 133 144 176 +0 58 18 133 176 144 +0 58 21 211 +0 58 22 229 144 +0 58 24 35 +0 58 25 245 144 +0 59 27 128 237 +0 17 29 4
\ No newline at end of file diff --git a/demo/demo1.asm b/demo/demo1.asm new file mode 100644 index 0000000..3ba82dd --- /dev/null +++ b/demo/demo1.asm @@ -0,0 +1,63 @@ +; MCU 8051 IDE - Demostration code +; Macro instructions, conditional compilation and constants +; Try tab "Graph" on bottom panel + +; Press F2 and F6 to run the program (start simulator and animate) + +$TITLE('DEMO 2') ; Set title for code listing +$DATE(36/-4/1907) ; Set date for code listing + +; Constant definitions +; -------------------- +counter idata 00Fh ; Counter of Px shifts +x set 100 ; Some variable +inc_dec equ 100 / X ; Flag: Increment/Decrement counter + + cseg at 1FFh ; Code segment starts at 0x1FF +something: db 4d ; Reserve 4 bytes in this segment + +; Macro instructions +; -------------------- + +;; Shift the given registeres +shift macro reg0, reg1 + + ; Increment / Decrement counter + mov A, counter + if inc_dec <> 0 + inc A + else + dec A + endif + $nolist ; <- Disable code listing + mov counter, A + $list ; <- Enable code listing + + ; Shift + mov reg1, reg0 + mov reg0, reg1 + setb C + mov A, reg0 + rl A + mov reg0, A +endm + +; Program initilization +; -------------------- + org 0h + sjmp start + +; Program start +; -------------------- +start: mov P1, #00Fh + mov P3, #01Eh + sjmp main + +; Main loop +; -------------------- +main: shift P1, P3 + sjmp main + +; Program end +; -------------------- + end diff --git a/demo/demo1.bin b/demo/demo1.bin Binary files differnew file mode 100644 index 0000000..4f74af1 --- /dev/null +++ b/demo/demo1.bin diff --git a/demo/demo1.hex b/demo/demo1.hex new file mode 100644 index 0000000..f83cb51 --- /dev/null +++ b/demo/demo1.hex @@ -0,0 +1,2 @@ +:1E000000800075900F75B01E8000E50F04F50F8590B085B090D3E59023F59080ED04A4 +:00000001FF
\ No newline at end of file diff --git a/demo/demo1.lst b/demo/demo1.lst new file mode 100644 index 0000000..25d0ef4 --- /dev/null +++ b/demo/demo1.lst @@ -0,0 +1,262 @@ +demo1 DEMO 2 36/-4/1907 PAGE 1 + 1 ; MCU 8051 IDE - Demostration code + 2 ; Macro instructions, conditional compilation and constants + 3 ; Try tab "Graph" on bottom panel + 4 + 5 ; Press F2 and F6 to run the program (start simulator and animate) + 6 + 7 $TITLE('DEMO 2') ; Set title for code listing + 8 $DATE(36/-4/1907) ; Set date for code listing + 9 + 10 ; Constant definitions + 11 ; -------------------- + 000F 12 counter idata 00Fh ; Counter of Px shifts + 0064 13 x set 100 ; Some variable + 0001 14 inc_dec equ 100 / X ; Flag: Increment/Decrement counter + 15 + 16 cseg at 1FFh ; Code segment starts at 0x1FF + 17 something: db 4d ; Reserve 4 bytes in this segment + 18 + 19 ; Macro instructions + 20 ; -------------------- + 21 + 22 ;; Shift the given registeres + 23 shift macro reg0, reg1 + 24 + 25 ; Increment / Decrement counter + 26 mov A, counter + 27 if inc_dec <> 0 + 28 inc A + 29 else + 30 dec A + 31 endif + 33 mov counter, A + 34 $list ; <- Enable code listing + 35 + 36 ; Shift + 37 mov reg1, reg0 + 38 mov reg0, reg1 + 39 setb C + 40 mov A, reg0 + 41 rl A + 42 mov reg0, A + 43 endm + 44 + 45 ; Program initilization + 46 ; -------------------- +0000 75900F 47 org 0h +0002 75B01E 48 sjmp start + 49 + 50 ; Program start + 51 ; -------------------- +0005 8000 52 start: mov P1, #00Fh +0008 E50F 53 mov P3, #01Eh + 54 +1 sjmp main + 55 +1 +000A 04 56 +1 mov a, counter +000C F50F 57 +1 inc a +000D 8590B0 58 +1 mov counter, a + 59 +1 +000F 85B090 60 +1 mov p3, p1 +0012 D3 61 +1 mov p1, p3 +0015 E590 62 +1 setb c +0016 23 63 +1 mov a, p1 +0018 F590 64 +1 rl a +0019 80ED 65 +1 mov p1, a + 66 + 67 ; Main loop + 68 ; -------------------- + 69 main: shift P1, P3 + 70 sjmp main + 71 + 72 ; Program end + 73 ; -------------------- + 74 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +COUNTER. . . . . . . . . . . . . . . I ADDR 000FH +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INC_DEC. . . . . . . . . . . . . . . N NUMB 0001H NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +MAIN . . . . . . . . . . . . . . . . C ADDR 000AH +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SOMETHING. . . . . . . . . . . . . . C ADDR 001DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +START. . . . . . . . . . . . . . . . C ADDR 0002H +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED +X. . . . . . . . . . . . . . . . . . NUMB 0064H NOT USED REDEFINABLE
\ No newline at end of file diff --git a/demo/demo1.sim b/demo/demo1.sim new file mode 100644 index 0000000..1d235f3 --- /dev/null +++ b/demo/demo1.sim @@ -0,0 +1,16 @@ +C4FD5C3C2DF98DDEE6FE5ACA0FD745A8 12/21/07 demo1.asm +48 0 128 0 +52 2 117 144 15 +53 5 117 176 30 +54 8 128 0 +58 10 229 15 +58 12 4 +58 13 245 15 +58 15 133 176 144 +58 18 133 144 176 +58 21 211 +58 22 229 144 +58 24 35 +58 25 245 144 +59 27 128 237 +17 511 4
\ No newline at end of file diff --git a/demo/demo2.adf b/demo/demo2.adf new file mode 100644 index 0000000..f542c32 --- /dev/null +++ b/demo/demo2.adf @@ -0,0 +1,50 @@ +# Assembler debug file for MCU 8051 IDE v1.3.1 +# Used assembler: MCU 8051 IDE +# Date: 10/27/2009 +016FCF566042EC66EE9118BAFA4D4A35 "demo2.asm" +0 47 0 128 28 +0 50 11 128 0 +0 56 13 127 26 +0 57 15 126 0 +0 58 17 238 +0 58 18 144 0 47 +0 58 21 147 +0 58 22 141 130 +0 58 24 240 +0 58 25 13 +0 58 26 14 +0 59 27 223 244 +0 60 29 50 +0 65 30 125 0 +0 66 32 117 168 255 +0 67 35 117 138 255 +0 68 38 117 137 3 +0 69 41 210 140 +0 70 43 128 0 +0 74 45 128 254 +0 28 47 87 +0 28 48 101 +0 28 49 108 +0 28 50 99 +0 28 51 111 +0 28 52 109 +0 28 53 101 +0 28 54 32 +0 28 55 105 +0 28 56 110 +0 28 57 32 +0 28 58 77 +0 28 59 67 +0 28 60 85 +0 28 61 32 +0 28 62 56 +0 28 63 48 +0 28 64 53 +0 28 65 49 +0 28 66 32 +0 28 67 73 +0 28 68 68 +0 28 69 69 +0 28 70 32 +0 28 71 33 +0 28 72 32
\ No newline at end of file diff --git a/demo/demo2.asm b/demo/demo2.asm new file mode 100644 index 0000000..d3f595d --- /dev/null +++ b/demo/demo2.asm @@ -0,0 +1,78 @@ +; MCU 8051 IDE - Demostration code +; Interrupts, hexadecimal editor and code validator +; ------------------------------------------------------ +; THIS REQUIRES ANOTHER MCU THAN AT89C2051 BECAUSE +; AT89C2051 HAS NO XDATA MENORY. CLICK ON +; [Main menu] -> [Project] -> [Edit project] AND SELECT +; FOR INSTANCE AT89C51 AND SET XDATA TO SOME VALUE +; ------------------------------------------------------ + +; * Click on [Main menu] -> [Simulator] -> [Show XDATA memory] +; * Press F2 and F6 (start simulator and animate) + + + +; Code with syntax errors + nolist ; Disable code listing +if 0 + mov A, #55d, B ; too many operands + inc 0FFh,, 04x4h ; invalid operands + db (4 *** 5) ; invalid expression +label?: mul B ; ivalid label and invalid operand +endif + list ; Enable code listing + +; Constants +; -------------------- + cseg at 0D0h +string: db 'Welcome in MCU 8051 IDE ! ' + +string_legth equ 26d + +; Macro instructions +; -------------------- +write_to_xdata macro str, code_ptr, xdata_ptr + mov A, code_ptr + mov DPTR, #str + movc A, @A+DPTR + mov DPL, xdata_ptr + movx @DPTR, A + inc xdata_ptr + inc code_ptr +endm + +; Program initilization +; -------------------- + org 0h ; Reset vector + sjmp start + + org 0Bh ; Interrupt vector - T0 + sjmp T0_int + +; Subprograms +; -------------------- + +;; Hadnle interrupt from TF0 +T0_int: mov R7, #string_legth + mov R6, #0h +loop: write_to_xdata string, R6, R5 + djnz R7, loop + reti + +; Program start +; -------------------- +start: ; Start timer 0 in mode 2 + mov R5, #0h + mov IE, #0FFh + mov TL0, #255d + mov TMOD, #03h + setb TR0 + sjmp main + +; Main loop +; -------------------- +main: sjmp $ ; Inifinite loop + +; Program end +; -------------------- + end diff --git a/demo/demo2.bin b/demo/demo2.bin Binary files differnew file mode 100644 index 0000000..031c85b --- /dev/null +++ b/demo/demo2.bin diff --git a/demo/demo2.hex b/demo/demo2.hex new file mode 100644 index 0000000..1139f92 --- /dev/null +++ b/demo/demo2.hex @@ -0,0 +1,3 @@ +:02000000801C62 +:3E000B0080007F1A7E00EE90002F938D82F00D0EDFF4327D0075A8FF758AFF758903D28C800080FE57656C636F6D6520696E204D4355203830353120494445202120C4 +:00000001FF
\ No newline at end of file diff --git a/demo/demo2.lst b/demo/demo2.lst new file mode 100644 index 0000000..4ce2673 --- /dev/null +++ b/demo/demo2.lst @@ -0,0 +1,270 @@ +demo2 PAGE 1 +0048 80FE 1 ; MCU 8051 IDE - Demostration code + 2 ; Interrupts, hexadecimal editor and code validator + 3 ; ------------------------------------------------------ + 4 ; THIS REQUIRES ANOTHER MCU THAN AT89C2051 BECAUSE + 5 ; AT89C2051 HAS NO XDATA MENORY. CLICK ON + 6 ; [Main menu] -> [Project] -> [Edit project] AND SELECT + 7 ; FOR INSTANCE AT89C51 AND SET XDATA TO SOME VALUE + 8 ; ------------------------------------------------------ + 9 + 10 ; * Click on [Main menu] -> [Simulator] -> [Show XDATA memory] + 11 ; * Press F2 and F6 (start simulator and animate) + 12 + 13 + 14 + 15 ; Code with syntax errors + 16 nolist ; Disable code listing + 23 list ; Enable code listing + 24 + 25 ; Constants + 26 ; -------------------- + 27 cseg at 0D0h + 28 string: db 'Welcome in MCU 8051 IDE ! ' + 29 + 001A 30 string_legth equ 26d + 31 + 32 ; Macro instructions + 33 ; -------------------- + 34 write_to_xdata macro str, code_ptr, xdata_ptr + 35 mov A, code_ptr + 36 mov DPTR, #str + 37 movc A, @A+DPTR + 38 mov DPL, xdata_ptr + 39 movx @DPTR, A + 40 inc xdata_ptr + 41 inc code_ptr + 42 endm + 43 + 44 ; Program initilization + 45 ; -------------------- +0000 801C 46 org 0h ; Reset vector + 47 sjmp start + 48 + 49 org 0Bh ; Interrupt vector - T0 + 50 sjmp T0_int + 51 + 52 ; Subprograms + 53 ; -------------------- + 54 + 55 ;; Hadnle interrupt from TF0 + 56 T0_int: mov R7, #string_legth + 57 mov R6, #0h + 58 +1 loop: write_to_xdata string, R6, R5 + 59 +1 mov a, r6 + 60 +1 mov dptr, #string + 61 +1 movc a, @a+dptr + 62 +1 mov dpl, r5 + 63 +1 movx @dptr, a + 64 +1 inc r5 + 65 +1 inc r6 + 66 djnz R7, loop + 67 reti + 68 + 69 ; Program start + 70 ; -------------------- + 71 start: ; Start timer 0 in mode 2 + 72 mov R5, #0h + 73 mov IE, #0FFh + 74 mov TL0, #255d + 75 mov TMOD, #03h + 76 setb TR0 + 77 sjmp main + 78 + 79 ; Main loop + 80 ; -------------------- + 81 main: sjmp $ ; Inifinite loop + 82 + 83 ; Program end + 84 ; -------------------- + 85 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +??MCU_8051_IDE . . . . . . . . . . . N NUMB 8051H NOT USED +??VERSION. . . . . . . . . . . . . . N NUMB 0131H NOT USED +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +LOOP . . . . . . . . . . . . . . . . C ADDR 0011H +MAIN . . . . . . . . . . . . . . . . C ADDR 002DH +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +START. . . . . . . . . . . . . . . . C ADDR 001EH +STRING . . . . . . . . . . . . . . . C ADDR 002FH +STRING_LEGTH . . . . . . . . . . . . N NUMB 001AH +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T0_INT . . . . . . . . . . . . . . . C ADDR 000DH +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
\ No newline at end of file diff --git a/demo/demo2.sim b/demo/demo2.sim new file mode 100644 index 0000000..4230f05 --- /dev/null +++ b/demo/demo2.sim @@ -0,0 +1,47 @@ +3E5C5EAE0BA81D024AAE08DD4B210650 12/21/07 demo2.asm +47 0 128 28 +50 11 128 0 +56 13 127 26 +57 15 126 0 +58 17 238 +58 18 144 0 208 +58 21 147 +58 22 141 130 +58 24 240 +58 25 13 +58 26 14 +59 27 223 244 +60 29 50 +65 30 125 0 +66 32 117 168 255 +67 35 117 138 255 +68 38 117 137 3 +69 41 210 140 +70 43 128 0 +74 45 128 254 +28 208 87 +28 209 101 +28 210 108 +28 211 99 +28 212 111 +28 213 109 +28 214 101 +28 215 32 +28 216 105 +28 217 110 +28 218 32 +28 219 77 +28 220 67 +28 221 85 +28 222 32 +28 223 56 +28 224 48 +28 225 53 +28 226 49 +28 227 32 +28 228 73 +28 229 68 +28 230 69 +28 231 32 +28 232 33 +28 233 32
\ No newline at end of file diff --git a/demo/demo3.adf b/demo/demo3.adf new file mode 100644 index 0000000..64c2b62 --- /dev/null +++ b/demo/demo3.adf @@ -0,0 +1,9 @@ +# Assembler debug file for MCU 8051 IDE v1.1 +# Used assembler: MCU 8051 IDE +# Date: 03/02/09 +6180D365C7F535CABD42C3E78A0798B9 "demo3.asm" +0 67 0 128 254 +0 35 2 51 +0 35 3 52 +0 36 4 51 +0 36 5 52
\ No newline at end of file diff --git a/demo/demo3.asm b/demo/demo3.asm new file mode 100644 index 0000000..d93d260 --- /dev/null +++ b/demo/demo3.asm @@ -0,0 +1,72 @@ +; MCU 8051 IDE - Demostration code +; Compiler directives + + +$DATE(32/13/1907)Â Â ; Places date in page header +; $EJECT ; Places a form feed in listing +; $INCLUDE(file.asm) ; Inserts file in source program +; $LIST ; Allows listing to be output +; $NOLIST ; Stops outputting the listing +; $NOMOD ; No predefined symbols used +$OBJECT(file.hex) ; Places object output in file +; $NOOBJECT ; No object file is generated +$PAGING ; Break output listing into pages +; $NOPAGING ; Print listing w/o page breaks +$PAGELENGTH(10) ; No. of lines on a listing page +$PAGEWIDTH(20) Â Â ; No. of columns on a listing page +$PRINT(file.lst) ; Places listing output in file +; $NOPRINT ; Listing will not be output +; $SYMBOLS ; Append symbol table to listing +; $NOSYMBOLS ; Symbol table will not be output +$TITLE('demo - 3') ; Places string in page header + + +;; Summary of Cross Assembler Directives +;; ------------------------------------- + +a EQU 54d ; Define symbol +b0 DATA a / 2 ; Define internal memory symbol +c IDATA (b0*2-5) ; Define indirectly addressed internal memory +d BIT 070Q ; Define internal bit memory symbol +e CODE 0FFA5h ; Define program memory symbol +var SET (A * 44) MOD 9 - 14 ; Variable defined by an expression + + CSEG at 20h ; Select program memory space +x: DB '34' ; Store byte values in program memory +y: DW 3334h ; Store word values in program memory + + DSEG at 5d ; Select internal memory data space +m: DS 1 ; Reserve bytes of data memory + + xseg ; Select external memory data space +n: DS 1 ; Reserve bytes of data memory + + ISEG ; Select indirectly addressed internal memory space +o: DS 1 ; Reserve bytes of data memory + + NOLIST ; Disable code listing + BSEG ; Select bit addressable memory space +r: DBIT 4 ; Reserve bits of bit memory + LIST ; Enable code listing + + +mc macro label ; Define macro instruction + IF 2 <> 2 OR 1 = 4 + EXITM ; Exit macro + ENDIF + sjmp label +endm ; End of definition + +main: ORG 0 ; Set segment location counter + IF 0 ; Begin conditional assembly block + USING 2 ; Select register bank (define AR0..7) + ELSE ; Alternative conditional assembly block + USING 2 ; Select register bank (define AR0..7) + ENDIF ; End conditional assembly block + + mc main ; Macro instuction + + END ; End of assembly language source file + + +; This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them.This is a very long line, try to avoid them. This is a very long line, try to avoid them.This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. diff --git a/demo/demo3.bin b/demo/demo3.bin new file mode 100644 index 0000000..45d3d20 --- /dev/null +++ b/demo/demo3.bin @@ -0,0 +1 @@ +€þ3
\ No newline at end of file diff --git a/demo/demo3.sim b/demo/demo3.sim new file mode 100644 index 0000000..ef0cd1f --- /dev/null +++ b/demo/demo3.sim @@ -0,0 +1,6 @@ +6180D365C7F535CABD42C3E78A0798B9 12/21/07 demo3.asm +67 0 128 254 +35 32 51 +35 33 52 +36 34 51 +36 35 52
\ No newline at end of file diff --git a/demo/demo4.adf b/demo/demo4.adf new file mode 100644 index 0000000..fb6a934 --- /dev/null +++ b/demo/demo4.adf @@ -0,0 +1,45 @@ +# Assembler Debug File created by MCU 8051 IDE v1.0.5 +# Used assembler: MCU 8051 IDE +# Date: 04/30/08 +7E1BFADD8BDB7A40D6B8CA5161E3113A "demo4.asm" +0 27 0 128 64 +0 30 3 210 152 +0 30 5 210 153 +0 30 7 17 58 +0 30 9 50 +0 33 11 210 152 +0 33 13 210 153 +0 33 15 17 58 +0 33 17 50 +0 36 19 210 152 +0 36 21 210 153 +0 36 23 17 58 +0 36 25 50 +0 39 27 210 152 +0 39 29 210 153 +0 39 31 17 58 +0 39 33 50 +0 42 35 210 152 +0 42 37 210 153 +0 42 39 17 58 +0 42 41 50 +0 45 43 210 152 +0 45 45 210 153 +0 45 47 17 58 +0 45 49 50 +0 48 51 210 152 +0 48 53 210 153 +0 48 55 17 58 +0 48 57 50 +0 53 58 127 16 +0 54 60 17 63 +0 55 62 34 +0 58 63 223 254 +0 59 65 34 +0 66 66 210 141 +0 67 68 210 143 +0 68 70 210 137 +0 69 72 210 139 +0 72 74 117 168 255 +0 73 77 210 188 +0 76 79 128 254
\ No newline at end of file diff --git a/demo/demo4.asm b/demo/demo4.asm new file mode 100644 index 0000000..662c740 --- /dev/null +++ b/demo/demo4.asm @@ -0,0 +1,81 @@ +; MCU 8051 IDE - Demostration code +; Interrupt monitor and list of active subprograms + +; 1) Press Ctrl+0 to show tab "List of subprograms" on righ panel +; 2) Run interrupt monitor +; (Main menu: Simulator -> Interrupt monitor) +; 3) Press F2 to start simulator and F6 to run animation mode + +; Macro instructions +; ------------------ + +;; Handle interrupt +intr macro + ; Set UART interrupt flags + setb RI + setb TI + + ; Wait a while and return from interrupt + acall wait + reti +endm + + +; Interrupt vectors +; ----------------- + org 00h ; Reset + ajmp start + + org 03h ; External 0 + intr + + org 0Bh ; Timer 0 + intr + + org 13h ; External 0 + intr + + org 1Bh ; Timer 1 + intr + + org 23h ; UART and SPI + intr + + org 2Bh ; Timer 2 + intr + + org 33h ; Analog comparator + intr + +; Subprograms +; ----------------- +wait: ; Wait for 24 cycles + mov R7, #10h + acall wait_aux + ret + +wait_aux: + djnz R7, $ + ret + + +; Program start +; ----------------- +start: + ; Set some interrupt bits + setb TF0 + setb TF1 + setb IE0 + setb IE1 + + ; Enable all interrupts and set priorities + mov IE, #0FFh + setb PS + + ; Infinite loop + sjmp $ + + +; End of code +; ----------------- + end diff --git a/demo/demo4.bin b/demo/demo4.bin Binary files differnew file mode 100644 index 0000000..413b6f7 --- /dev/null +++ b/demo/demo4.bin diff --git a/demo/demo4.hex b/demo/demo4.hex new file mode 100644 index 0000000..20def10 --- /dev/null +++ b/demo/demo4.hex @@ -0,0 +1,9 @@ +:0200000080403E +:07000300D298D299113A32A4 +:07000B00D298D299113A329C +:07001300D298D299113A3294 +:07001B00D298D299113A328C +:07002300D298D299113A3284 +:07002B00D298D299113A327C +:1E003300D298D299113A327F10113F22DFFE22D28DD28FD289D28B75A8FFD2BC80FEBD +:00000001FF
\ No newline at end of file diff --git a/demo/demo4.lst b/demo/demo4.lst new file mode 100644 index 0000000..867750e --- /dev/null +++ b/demo/demo4.lst @@ -0,0 +1,228 @@ +demo4 PAGE 1 + 1 ; MCU 8051 IDE - Demostration code + 2 ; Interrupt monitor and list of active subprograms + 3 + 4 ; 1) Press Ctrl+0 to show tab "List of subprograms" on righ panel + 5 ; 2) Run interrupt monitor + 6 ; (Main menu: Simulator -> Interrupt monitor) + 7 ; 3) Press F2 to start simulator and F6 to run animation mode + 8 + 9 ; Macro instructions + 10 ; ------------------ + 11 + 12 ;; Handle interrupt + 13 intr macro + 14 ; Set UART interrupt flags + 15 setb RI + 16 setb TI + 17 + 18 ; Wait a while and return from interrupt + 19 acall wait + 20 reti + 21 endm + 22 + 23 + 24 ; Interrupt vectors + 25 ; ----------------- + 26 org 00h ; Reset +0000 D298 27 ajmp start + 28 + 29 +1 org 03h ; External 0 + 30 +2 + 31 +3 + 32 +4 + 33 +5 + 34 +6 + 35 +7 + 36 +7 + 37 +7 setb RI +000B 113F 38 +7 setb TI +000D 22 39 +7 + 40 +7 acall wait +000F DFFE 41 +7 reti + 42 +6 setb RI +0011 22 43 +6 setb TI + 44 +6 + 45 +6 acall wait +0013 D28F 46 +6 reti + 47 +5 setb RI +0015 D289 48 +5 setb TI + 49 +5 +0017 D28B 50 +5 acall wait +0019 75A8FF 51 +5 reti + 52 +4 setb RI + 53 +4 setb TI + 54 +4 +001B 80FE 55 +4 acall wait + 56 +4 reti + 57 +3 setb RI + 58 +3 setb TI + 59 +3 + 60 +3 acall wait + 61 +3 reti + 62 +2 setb RI + 63 +2 setb TI + 64 +2 + 65 +2 acall wait + 66 +2 reti + 67 +1 setb RI + 68 +1 setb TI + 69 +1 + 70 +1 acall wait + 71 +1 reti + 72 intr + 73 + 74 org 0Bh ; Timer 0 + 75 intr + 76 + 77 org 13h ; External 0 + 78 intr + 79 + 80 org 1Bh ; Timer 1 + 81 intr + 82 + 83 org 23h ; UART and SPI + 84 intr + 85 + 86 org 2Bh ; Timer 2 + 87 intr + 88 + 89 org 33h ; Analog comparator + 90 intr + 91 + 92 ; Subprograms + 93 ; ----------------- + 94 wait: ; Wait for 24 cycles + 95 mov R7, #10h + 96 acall wait_aux + 97 ret + 98 + 99 wait_aux: + 100 djnz R7, $ + 101 ret + 102 + 103 + 104 ; Program start + 105 ; ----------------- + 106 start: + 107 ; Set some interrupt bits + 108 setb TF0 + 109 setb TF1 + 110 setb IE0 + 111 setb IE1 + 112 + 113 ; Enable all interrupts and set priorities + 114 mov IE, #0FFh + 115 setb PS + 116 + 117 ; Infinite loop + 118 sjmp $ + 119 + 120 + 121 ; End of code + 122 ; ----------------- + 123 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +START. . . . . . . . . . . . . . . . C ADDR 0042H NOT USED +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WAIT . . . . . . . . . . . . . . . . C ADDR 003AH NOT USED +WAIT_AUX . . . . . . . . . . . . . . C ADDR 003FH NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
\ No newline at end of file diff --git a/demo/demo4.sim b/demo/demo4.sim new file mode 100644 index 0000000..52643cc --- /dev/null +++ b/demo/demo4.sim @@ -0,0 +1,42 @@ +7E1BFADD8BDB7A40D6B8CA5161E3113A 01/14/08 demo4.asm +27 0 128 64 +30 3 210 152 +30 5 210 153 +30 7 17 58 +30 9 50 +33 11 210 152 +33 13 210 153 +33 15 17 58 +33 17 50 +36 19 210 152 +36 21 210 153 +36 23 17 58 +36 25 50 +39 27 210 152 +39 29 210 153 +39 31 17 58 +39 33 50 +42 35 210 152 +42 37 210 153 +42 39 17 58 +42 41 50 +45 43 210 152 +45 45 210 153 +45 47 17 58 +45 49 50 +48 51 210 152 +48 53 210 153 +48 55 17 58 +48 57 50 +53 58 127 16 +54 60 17 63 +55 62 34 +58 63 223 254 +59 65 34 +66 66 210 141 +67 68 210 143 +68 70 210 137 +69 72 210 139 +72 74 117 168 255 +73 77 210 188 +76 79 128 254
\ No newline at end of file diff --git a/demo/demo5.adf b/demo/demo5.adf new file mode 100644 index 0000000..de35ed8 --- /dev/null +++ b/demo/demo5.adf @@ -0,0 +1,5 @@ +# Assembler debug file for MCU 8051 IDE v1.1 +# Used assembler: MCU 8051 IDE +# Date: 03/02/09 +8A77C444C26BA55C5A8AC82FE0C8CFA9 "demo5.asm" +0 32 0 128 254
\ No newline at end of file diff --git a/demo/demo5.asm b/demo/demo5.asm new file mode 100644 index 0000000..9c3bc68 --- /dev/null +++ b/demo/demo5.asm @@ -0,0 +1,35 @@ +; Dissassebler +; -------------------- +; [Main menu] -> [Tools] -> [Dissasseble] +; Choose some hex file and see result + +; Custom commands +; -------------------- +; They can be used for instance to load your program into a +; real processor. +; [Main menu] -> [Configure] -> [Edit cutom commands] +; [Main menu] -> [Tools] -> [Cutom command N] + +; Tip of the day +; -------------------- +; You may find some useful advices how to use this +; IDE more efficiently +; [Main menu] -> [Help] -> [Tip of the day] + +; Project web page: +; -------------------- +; http://mcu8051ide.sf.net + + + +; AND NOW YOU ARE READY ! +; Click on [Main menu] -> [Project] -> [New] and create your own 8051 project ... + + +; !!! HAVE A GOOD LUCK WITH THIS IDE !!! + + org 0 + sjmp $ + end + +; !!! HAVE A GOOD LUCK WITH THIS IDE !!!
\ No newline at end of file diff --git a/demo/demo5.bin b/demo/demo5.bin new file mode 100644 index 0000000..5416677 --- /dev/null +++ b/demo/demo5.bin @@ -0,0 +1 @@ +€
\ No newline at end of file diff --git a/demo/demo5.hex b/demo/demo5.hex new file mode 100644 index 0000000..0df57c5 --- /dev/null +++ b/demo/demo5.hex @@ -0,0 +1,2 @@ +:0200000080FE80 +:00000001FF
\ No newline at end of file diff --git a/demo/demo5.lst b/demo/demo5.lst new file mode 100644 index 0000000..3468d65 --- /dev/null +++ b/demo/demo5.lst @@ -0,0 +1,216 @@ +demo5 PAGE 1 + 1 ; Dissassebler + 2 ; -------------------- + 3 ; [Main menu] -> [Tools] -> [Dissasseble] + 4 ; Choose some hex file and see result + 5 + 6 ; Custom commands + 7 ; -------------------- + 8 ; They can be used for instance to load your program into a + 9 ; real processor. + 10 ; [Main menu] -> [Configure] -> [Edit cutom commands] + 11 ; [Main menu] -> [Tools] -> [Cutom command N] + 12 + 13 ; Tip of the day + 14 ; -------------------- + 15 ; You may find some useful advices how to use this + 16 ; IDE more efficiently + 17 ; [Main menu] -> [Help] -> [Tip of the day] + 18 + 19 ; Project web page: + 20 ; -------------------- + 21 ; http://mcu8051ide.sf.net + 22 + 23 + 24 + 25 ; AND NOW YOU ARE READY ! + 26 ; Click on [Main menu] -> [Project] -> [New] and create your own 8051 project ... + 27 + 28 + 29 ; !!! HAVE A GOOD LUCK WITH THIS IDE !!! + 30 + 31 org 0 + 32 sjmp $ + 33 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
\ No newline at end of file diff --git a/demo/demo5.sim b/demo/demo5.sim new file mode 100644 index 0000000..7f2a49c --- /dev/null +++ b/demo/demo5.sim @@ -0,0 +1,2 @@ +7D9DA265AF8276820125E7E130CFFF37 12/21/07 demo4.asm +32 0 128 254
\ No newline at end of file diff --git a/demo/demo_c_0 b/demo/demo_c_0 Binary files differnew file mode 100644 index 0000000..671d577 --- /dev/null +++ b/demo/demo_c_0 diff --git a/demo/demo_c_0.adb b/demo/demo_c_0.adb new file mode 100644 index 0000000..30be84d --- /dev/null +++ b/demo/demo_c_0.adb @@ -0,0 +1,106 @@ +M:demo_c_0 +F:G$someFunction$0$0({2}DF,SV:S),C,0,0,0,0,0 +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +S:G$some_variable$0$0({4}SL:U),E,0,0 +S:G$i$0$0({2}SI:S),E,0,0 +S:LsomeFunction$somevalue$1$1({1}SC:U),R,0,0,[r2] +S:G$P0$0$0({1}SC:U),I,0,0 +S:G$SP$0$0({1}SC:U),I,0,0 +S:G$DPL$0$0({1}SC:U),I,0,0 +S:G$DPH$0$0({1}SC:U),I,0,0 +S:G$PCON$0$0({1}SC:U),I,0,0 +S:G$TCON$0$0({1}SC:U),I,0,0 +S:G$TMOD$0$0({1}SC:U),I,0,0 +S:G$TL0$0$0({1}SC:U),I,0,0 +S:G$TL1$0$0({1}SC:U),I,0,0 +S:G$TH0$0$0({1}SC:U),I,0,0 +S:G$TH1$0$0({1}SC:U),I,0,0 +S:G$P1$0$0({1}SC:U),I,0,0 +S:G$SCON$0$0({1}SC:U),I,0,0 +S:G$SBUF$0$0({1}SC:U),I,0,0 +S:G$P2$0$0({1}SC:U),I,0,0 +S:G$IE$0$0({1}SC:U),I,0,0 +S:G$P3$0$0({1}SC:U),I,0,0 +S:G$IP$0$0({1}SC:U),I,0,0 +S:G$PSW$0$0({1}SC:U),I,0,0 +S:G$ACC$0$0({1}SC:U),I,0,0 +S:G$A$0$0({1}SC:U),I,0,0 +S:G$B$0$0({1}SC:U),I,0,0 +S:G$P0_0$0$0({1}SX:U),J,0,0 +S:G$P0_1$0$0({1}SX:U),J,0,0 +S:G$P0_2$0$0({1}SX:U),J,0,0 +S:G$P0_3$0$0({1}SX:U),J,0,0 +S:G$P0_4$0$0({1}SX:U),J,0,0 +S:G$P0_5$0$0({1}SX:U),J,0,0 +S:G$P0_6$0$0({1}SX:U),J,0,0 +S:G$P0_7$0$0({1}SX:U),J,0,0 +S:G$IT0$0$0({1}SX:U),J,0,0 +S:G$IE0$0$0({1}SX:U),J,0,0 +S:G$IT1$0$0({1}SX:U),J,0,0 +S:G$IE1$0$0({1}SX:U),J,0,0 +S:G$TR0$0$0({1}SX:U),J,0,0 +S:G$TF0$0$0({1}SX:U),J,0,0 +S:G$TR1$0$0({1}SX:U),J,0,0 +S:G$TF1$0$0({1}SX:U),J,0,0 +S:G$P1_0$0$0({1}SX:U),J,0,0 +S:G$P1_1$0$0({1}SX:U),J,0,0 +S:G$P1_2$0$0({1}SX:U),J,0,0 +S:G$P1_3$0$0({1}SX:U),J,0,0 +S:G$P1_4$0$0({1}SX:U),J,0,0 +S:G$P1_5$0$0({1}SX:U),J,0,0 +S:G$P1_6$0$0({1}SX:U),J,0,0 +S:G$P1_7$0$0({1}SX:U),J,0,0 +S:G$RI$0$0({1}SX:U),J,0,0 +S:G$TI$0$0({1}SX:U),J,0,0 +S:G$RB8$0$0({1}SX:U),J,0,0 +S:G$TB8$0$0({1}SX:U),J,0,0 +S:G$REN$0$0({1}SX:U),J,0,0 +S:G$SM2$0$0({1}SX:U),J,0,0 +S:G$SM1$0$0({1}SX:U),J,0,0 +S:G$SM0$0$0({1}SX:U),J,0,0 +S:G$P2_0$0$0({1}SX:U),J,0,0 +S:G$P2_1$0$0({1}SX:U),J,0,0 +S:G$P2_2$0$0({1}SX:U),J,0,0 +S:G$P2_3$0$0({1}SX:U),J,0,0 +S:G$P2_4$0$0({1}SX:U),J,0,0 +S:G$P2_5$0$0({1}SX:U),J,0,0 +S:G$P2_6$0$0({1}SX:U),J,0,0 +S:G$P2_7$0$0({1}SX:U),J,0,0 +S:G$EX0$0$0({1}SX:U),J,0,0 +S:G$ET0$0$0({1}SX:U),J,0,0 +S:G$EX1$0$0({1}SX:U),J,0,0 +S:G$ET1$0$0({1}SX:U),J,0,0 +S:G$ES$0$0({1}SX:U),J,0,0 +S:G$EA$0$0({1}SX:U),J,0,0 +S:G$P3_0$0$0({1}SX:U),J,0,0 +S:G$P3_1$0$0({1}SX:U),J,0,0 +S:G$P3_2$0$0({1}SX:U),J,0,0 +S:G$P3_3$0$0({1}SX:U),J,0,0 +S:G$P3_4$0$0({1}SX:U),J,0,0 +S:G$P3_5$0$0({1}SX:U),J,0,0 +S:G$P3_6$0$0({1}SX:U),J,0,0 +S:G$P3_7$0$0({1}SX:U),J,0,0 +S:G$RXD$0$0({1}SX:U),J,0,0 +S:G$TXD$0$0({1}SX:U),J,0,0 +S:G$INT0$0$0({1}SX:U),J,0,0 +S:G$INT1$0$0({1}SX:U),J,0,0 +S:G$T0$0$0({1}SX:U),J,0,0 +S:G$T1$0$0({1}SX:U),J,0,0 +S:G$WR$0$0({1}SX:U),J,0,0 +S:G$RD$0$0({1}SX:U),J,0,0 +S:G$PX0$0$0({1}SX:U),J,0,0 +S:G$PT0$0$0({1}SX:U),J,0,0 +S:G$PX1$0$0({1}SX:U),J,0,0 +S:G$PT1$0$0({1}SX:U),J,0,0 +S:G$PS$0$0({1}SX:U),J,0,0 +S:G$P$0$0({1}SX:U),J,0,0 +S:G$FL$0$0({1}SX:U),J,0,0 +S:G$OV$0$0({1}SX:U),J,0,0 +S:G$RS0$0$0({1}SX:U),J,0,0 +S:G$RS1$0$0({1}SX:U),J,0,0 +S:G$F0$0$0({1}SX:U),J,0,0 +S:G$AC$0$0({1}SX:U),J,0,0 +S:G$CY$0$0({1}SX:U),J,0,0 +S:G$someFunction$0$0({2}DF,SV:S),C,0,0 +S:G$main$0$0({2}DF,SI:S),C,0,0 diff --git a/demo/demo_c_0.asm b/demo/demo_c_0.asm new file mode 100644 index 0000000..8338791 --- /dev/null +++ b/demo/demo_c_0.asm @@ -0,0 +1,529 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ANSI-C Compiler +; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) +; This file was generated Tue Oct 27 23:03:10 2009 +;-------------------------------------------------------- + .module demo_c_0 + .optsdcc -mmcs51 --model-small + +;-------------------------------------------------------- +; Public variables in this module +;-------------------------------------------------------- + .globl _main + .globl _someFunction + .globl _CY + .globl _AC + .globl _F0 + .globl _RS1 + .globl _RS0 + .globl _OV + .globl _FL + .globl _P + .globl _PS + .globl _PT1 + .globl _PX1 + .globl _PT0 + .globl _PX0 + .globl _RD + .globl _WR + .globl _T1 + .globl _T0 + .globl _INT1 + .globl _INT0 + .globl _TXD + .globl _RXD + .globl _P3_7 + .globl _P3_6 + .globl _P3_5 + .globl _P3_4 + .globl _P3_3 + .globl _P3_2 + .globl _P3_1 + .globl _P3_0 + .globl _EA + .globl _ES + .globl _ET1 + .globl _EX1 + .globl _ET0 + .globl _EX0 + .globl _P2_7 + .globl _P2_6 + .globl _P2_5 + .globl _P2_4 + .globl _P2_3 + .globl _P2_2 + .globl _P2_1 + .globl _P2_0 + .globl _SM0 + .globl _SM1 + .globl _SM2 + .globl _REN + .globl _TB8 + .globl _RB8 + .globl _TI + .globl _RI + .globl _P1_7 + .globl _P1_6 + .globl _P1_5 + .globl _P1_4 + .globl _P1_3 + .globl _P1_2 + .globl _P1_1 + .globl _P1_0 + .globl _TF1 + .globl _TR1 + .globl _TF0 + .globl _TR0 + .globl _IE1 + .globl _IT1 + .globl _IE0 + .globl _IT0 + .globl _P0_7 + .globl _P0_6 + .globl _P0_5 + .globl _P0_4 + .globl _P0_3 + .globl _P0_2 + .globl _P0_1 + .globl _P0_0 + .globl _B + .globl _A + .globl _ACC + .globl _PSW + .globl _IP + .globl _P3 + .globl _IE + .globl _P2 + .globl _SBUF + .globl _SCON + .globl _P1 + .globl _TH1 + .globl _TH0 + .globl _TL1 + .globl _TL0 + .globl _TMOD + .globl _TCON + .globl _PCON + .globl _DPH + .globl _DPL + .globl _SP + .globl _P0 + .globl _i + .globl _some_variable +;-------------------------------------------------------- +; special function registers +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0$0$0 == 0x0080 +_P0 = 0x0080 +G$SP$0$0 == 0x0081 +_SP = 0x0081 +G$DPL$0$0 == 0x0082 +_DPL = 0x0082 +G$DPH$0$0 == 0x0083 +_DPH = 0x0083 +G$PCON$0$0 == 0x0087 +_PCON = 0x0087 +G$TCON$0$0 == 0x0088 +_TCON = 0x0088 +G$TMOD$0$0 == 0x0089 +_TMOD = 0x0089 +G$TL0$0$0 == 0x008a +_TL0 = 0x008a +G$TL1$0$0 == 0x008b +_TL1 = 0x008b +G$TH0$0$0 == 0x008c +_TH0 = 0x008c +G$TH1$0$0 == 0x008d +_TH1 = 0x008d +G$P1$0$0 == 0x0090 +_P1 = 0x0090 +G$SCON$0$0 == 0x0098 +_SCON = 0x0098 +G$SBUF$0$0 == 0x0099 +_SBUF = 0x0099 +G$P2$0$0 == 0x00a0 +_P2 = 0x00a0 +G$IE$0$0 == 0x00a8 +_IE = 0x00a8 +G$P3$0$0 == 0x00b0 +_P3 = 0x00b0 +G$IP$0$0 == 0x00b8 +_IP = 0x00b8 +G$PSW$0$0 == 0x00d0 +_PSW = 0x00d0 +G$ACC$0$0 == 0x00e0 +_ACC = 0x00e0 +G$A$0$0 == 0x00e0 +_A = 0x00e0 +G$B$0$0 == 0x00f0 +_B = 0x00f0 +;-------------------------------------------------------- +; special function bits +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0_0$0$0 == 0x0080 +_P0_0 = 0x0080 +G$P0_1$0$0 == 0x0081 +_P0_1 = 0x0081 +G$P0_2$0$0 == 0x0082 +_P0_2 = 0x0082 +G$P0_3$0$0 == 0x0083 +_P0_3 = 0x0083 +G$P0_4$0$0 == 0x0084 +_P0_4 = 0x0084 +G$P0_5$0$0 == 0x0085 +_P0_5 = 0x0085 +G$P0_6$0$0 == 0x0086 +_P0_6 = 0x0086 +G$P0_7$0$0 == 0x0087 +_P0_7 = 0x0087 +G$IT0$0$0 == 0x0088 +_IT0 = 0x0088 +G$IE0$0$0 == 0x0089 +_IE0 = 0x0089 +G$IT1$0$0 == 0x008a +_IT1 = 0x008a +G$IE1$0$0 == 0x008b +_IE1 = 0x008b +G$TR0$0$0 == 0x008c +_TR0 = 0x008c +G$TF0$0$0 == 0x008d +_TF0 = 0x008d +G$TR1$0$0 == 0x008e +_TR1 = 0x008e +G$TF1$0$0 == 0x008f +_TF1 = 0x008f +G$P1_0$0$0 == 0x0090 +_P1_0 = 0x0090 +G$P1_1$0$0 == 0x0091 +_P1_1 = 0x0091 +G$P1_2$0$0 == 0x0092 +_P1_2 = 0x0092 +G$P1_3$0$0 == 0x0093 +_P1_3 = 0x0093 +G$P1_4$0$0 == 0x0094 +_P1_4 = 0x0094 +G$P1_5$0$0 == 0x0095 +_P1_5 = 0x0095 +G$P1_6$0$0 == 0x0096 +_P1_6 = 0x0096 +G$P1_7$0$0 == 0x0097 +_P1_7 = 0x0097 +G$RI$0$0 == 0x0098 +_RI = 0x0098 +G$TI$0$0 == 0x0099 +_TI = 0x0099 +G$RB8$0$0 == 0x009a +_RB8 = 0x009a +G$TB8$0$0 == 0x009b +_TB8 = 0x009b +G$REN$0$0 == 0x009c +_REN = 0x009c +G$SM2$0$0 == 0x009d +_SM2 = 0x009d +G$SM1$0$0 == 0x009e +_SM1 = 0x009e +G$SM0$0$0 == 0x009f +_SM0 = 0x009f +G$P2_0$0$0 == 0x00a0 +_P2_0 = 0x00a0 +G$P2_1$0$0 == 0x00a1 +_P2_1 = 0x00a1 +G$P2_2$0$0 == 0x00a2 +_P2_2 = 0x00a2 +G$P2_3$0$0 == 0x00a3 +_P2_3 = 0x00a3 +G$P2_4$0$0 == 0x00a4 +_P2_4 = 0x00a4 +G$P2_5$0$0 == 0x00a5 +_P2_5 = 0x00a5 +G$P2_6$0$0 == 0x00a6 +_P2_6 = 0x00a6 +G$P2_7$0$0 == 0x00a7 +_P2_7 = 0x00a7 +G$EX0$0$0 == 0x00a8 +_EX0 = 0x00a8 +G$ET0$0$0 == 0x00a9 +_ET0 = 0x00a9 +G$EX1$0$0 == 0x00aa +_EX1 = 0x00aa +G$ET1$0$0 == 0x00ab +_ET1 = 0x00ab +G$ES$0$0 == 0x00ac +_ES = 0x00ac +G$EA$0$0 == 0x00af +_EA = 0x00af +G$P3_0$0$0 == 0x00b0 +_P3_0 = 0x00b0 +G$P3_1$0$0 == 0x00b1 +_P3_1 = 0x00b1 +G$P3_2$0$0 == 0x00b2 +_P3_2 = 0x00b2 +G$P3_3$0$0 == 0x00b3 +_P3_3 = 0x00b3 +G$P3_4$0$0 == 0x00b4 +_P3_4 = 0x00b4 +G$P3_5$0$0 == 0x00b5 +_P3_5 = 0x00b5 +G$P3_6$0$0 == 0x00b6 +_P3_6 = 0x00b6 +G$P3_7$0$0 == 0x00b7 +_P3_7 = 0x00b7 +G$RXD$0$0 == 0x00b0 +_RXD = 0x00b0 +G$TXD$0$0 == 0x00b1 +_TXD = 0x00b1 +G$INT0$0$0 == 0x00b2 +_INT0 = 0x00b2 +G$INT1$0$0 == 0x00b3 +_INT1 = 0x00b3 +G$T0$0$0 == 0x00b4 +_T0 = 0x00b4 +G$T1$0$0 == 0x00b5 +_T1 = 0x00b5 +G$WR$0$0 == 0x00b6 +_WR = 0x00b6 +G$RD$0$0 == 0x00b7 +_RD = 0x00b7 +G$PX0$0$0 == 0x00b8 +_PX0 = 0x00b8 +G$PT0$0$0 == 0x00b9 +_PT0 = 0x00b9 +G$PX1$0$0 == 0x00ba +_PX1 = 0x00ba +G$PT1$0$0 == 0x00bb +_PT1 = 0x00bb +G$PS$0$0 == 0x00bc +_PS = 0x00bc +G$P$0$0 == 0x00d0 +_P = 0x00d0 +G$FL$0$0 == 0x00d1 +_FL = 0x00d1 +G$OV$0$0 == 0x00d2 +_OV = 0x00d2 +G$RS0$0$0 == 0x00d3 +_RS0 = 0x00d3 +G$RS1$0$0 == 0x00d4 +_RS1 = 0x00d4 +G$F0$0$0 == 0x00d5 +_F0 = 0x00d5 +G$AC$0$0 == 0x00d6 +_AC = 0x00d6 +G$CY$0$0 == 0x00d7 +_CY = 0x00d7 +;-------------------------------------------------------- +; overlayable register banks +;-------------------------------------------------------- + .area REG_BANK_0 (REL,OVR,DATA) + .ds 8 +;-------------------------------------------------------- +; internal ram data +;-------------------------------------------------------- + .area DSEG (DATA) +G$some_variable$0$0==. +_some_variable:: + .ds 4 +G$i$0$0==. +_i:: + .ds 2 +;-------------------------------------------------------- +; overlayable items in internal ram +;-------------------------------------------------------- + .area OSEG (OVR,DATA) +;-------------------------------------------------------- +; Stack segment in internal ram +;-------------------------------------------------------- + .area SSEG (DATA) +__start__stack: + .ds 1 + +;-------------------------------------------------------- +; indirectly addressable internal ram data +;-------------------------------------------------------- + .area ISEG (DATA) +;-------------------------------------------------------- +; absolute internal ram data +;-------------------------------------------------------- + .area IABS (ABS,DATA) + .area IABS (ABS,DATA) +;-------------------------------------------------------- +; bit data +;-------------------------------------------------------- + .area BSEG (BIT) +;-------------------------------------------------------- +; paged external ram data +;-------------------------------------------------------- + .area PSEG (PAG,XDATA) +;-------------------------------------------------------- +; external ram data +;-------------------------------------------------------- + .area XSEG (XDATA) +;-------------------------------------------------------- +; absolute external ram data +;-------------------------------------------------------- + .area XABS (ABS,XDATA) +;-------------------------------------------------------- +; external initialized ram data +;-------------------------------------------------------- + .area XISEG (XDATA) + .area HOME (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area CSEG (CODE) +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + .area HOME (CODE) +__interrupt_vect: + ljmp __sdcc_gsinit_startup +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area HOME (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area GSINIT (CODE) + .globl __sdcc_gsinit_startup + .globl __sdcc_program_startup + .globl __start__stack + .globl __mcs51_genXINIT + .globl __mcs51_genXRAMCLEAR + .globl __mcs51_genRAMCLEAR + G$main$0$0 ==. + C$demo_c_0.c$10$1$1 ==. +; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here + clr a + mov _some_variable,a + mov (_some_variable + 1),a + mov (_some_variable + 2),a + mov (_some_variable + 3),a + .area GSFINAL (CODE) + ljmp __sdcc_program_startup +;-------------------------------------------------------- +; Home +;-------------------------------------------------------- + .area HOME (CODE) + .area HOME (CODE) +__sdcc_program_startup: + lcall _main +; return from main will lock up + sjmp . +;-------------------------------------------------------- +; code +;-------------------------------------------------------- + .area CSEG (CODE) +;------------------------------------------------------------ +;Allocation info for local variables in function 'someFunction' +;------------------------------------------------------------ +;somevalue Allocated to registers r2 +;------------------------------------------------------------ + G$someFunction$0$0 ==. + C$demo_c_0.c$20$0$0 ==. +; demo_c_0.c:20: void someFunction(unsigned char somevalue) +; ----------------------------------------- +; function someFunction +; ----------------------------------------- +_someFunction: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 + mov r2,dpl + C$demo_c_0.c$23$1$1 ==. +; demo_c_0.c:23: P1=somevalue; + mov _P1,r2 + C$demo_c_0.c$24$1$1 ==. +; demo_c_0.c:24: P3=somevalue^0xFF; + mov a,#0xFF + xrl a,r2 + mov _P3,a + C$demo_c_0.c$25$1$1 ==. + XG$someFunction$0$0 ==. + ret +;------------------------------------------------------------ +;Allocation info for local variables in function 'main' +;------------------------------------------------------------ +;------------------------------------------------------------ + G$main$0$0 ==. + C$demo_c_0.c$28$1$1 ==. +; demo_c_0.c:28: int main() +; ----------------------------------------- +; function main +; ----------------------------------------- +_main: + C$demo_c_0.c$31$1$1 ==. +; demo_c_0.c:31: while(1) { +00102$: + C$demo_c_0.c$32$2$2 ==. +; demo_c_0.c:32: for(i=0; i<255; i++) { + clr a + mov _i,a + mov (_i + 1),a +00104$: + clr c + mov a,_i + subb a,#0xFF + mov a,(_i + 1) + xrl a,#0x80 + subb a,#0x80 + jnc 00107$ + C$demo_c_0.c$33$3$3 ==. +; demo_c_0.c:33: someFunction(i+2); + mov r2,_i + mov a,#0x02 + add a,r2 + mov dpl,a + lcall _someFunction + C$demo_c_0.c$34$3$3 ==. +; demo_c_0.c:34: some_variable++; + inc _some_variable + clr a + cjne a,_some_variable,00114$ + inc (_some_variable + 1) + cjne a,(_some_variable + 1),00114$ + inc (_some_variable + 2) + cjne a,(_some_variable + 2),00114$ + inc (_some_variable + 3) +00114$: + C$demo_c_0.c$32$2$2 ==. +; demo_c_0.c:32: for(i=0; i<255; i++) { + inc _i + clr a + cjne a,_i,00104$ + inc (_i + 1) + sjmp 00104$ +00107$: + C$demo_c_0.c$36$2$2 ==. +; demo_c_0.c:36: some_variable-=22; + mov a,_some_variable + add a,#0xea + mov _some_variable,a + mov a,(_some_variable + 1) + addc a,#0xff + mov (_some_variable + 1),a + mov a,(_some_variable + 2) + addc a,#0xff + mov (_some_variable + 2),a + mov a,(_some_variable + 3) + addc a,#0xff + mov (_some_variable + 3),a + C$demo_c_0.c$40$1$1 ==. +; demo_c_0.c:40: return 0; + C$demo_c_0.c$41$1$1 ==. + XG$main$0$0 ==. + sjmp 00102$ + .area CSEG (CODE) + .area CONST (CODE) + .area XINIT (CODE) + .area CABS (ABS,CODE) diff --git a/demo/demo_c_0.c b/demo/demo_c_0.c new file mode 100644 index 0000000..9655334 --- /dev/null +++ b/demo/demo_c_0.c @@ -0,0 +1,41 @@ +/** + * Very very simple demonstration code written in C language + * @file demo_c_0.c + */ + +// This file defines registers avaliable in AT89x51 MCUs +// See /usr/share/sdcc/include/mcs51/ for alternatives +#include <at89x51.h> + +unsigned long some_variable=0; ///< Documentation for this variable comes here +int i; ///< General purpose interator + +/** + * These lines are a doxygen documentation for this function + * See doxygen manual for more details (http://www.stack.nl/~dimitri/doxygen/manual.html) + * Note: Try to click on the 1st line of the function declaration and then press Ctrl+E + * <b style="color: #FF0000">Some bold text</b> + * @param somevalue Some agrument + */ +void someFunction(unsigned char somevalue) +{ + // P1 and P3 are variables defined in "at89x51.h" + P1=somevalue; + P3=somevalue^0xFF; +} + +/** Main loop */ +int main() +{ + // Infinite loop + while(1) { + for(i=0; i<255; i++) { + someFunction(i+2); + some_variable++; + } + some_variable-=22; + } + + // Report success + return 0; +} diff --git a/demo/demo_c_0.cdb b/demo/demo_c_0.cdb new file mode 100644 index 0000000..8886635 --- /dev/null +++ b/demo/demo_c_0.cdb @@ -0,0 +1,278 @@ +M:demo_c_0 +F:G$someFunction$0$0({2}DF,SV:S),C,0,0,0,0,0 +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +S:G$some_variable$0$0({4}SL:U),E,0,0 +S:G$i$0$0({2}SI:S),E,0,0 +S:LsomeFunction$somevalue$1$1({1}SC:U),R,0,0,[r2] +S:G$P0$0$0({1}SC:U),I,0,0 +S:G$SP$0$0({1}SC:U),I,0,0 +S:G$DPL$0$0({1}SC:U),I,0,0 +S:G$DPH$0$0({1}SC:U),I,0,0 +S:G$PCON$0$0({1}SC:U),I,0,0 +S:G$TCON$0$0({1}SC:U),I,0,0 +S:G$TMOD$0$0({1}SC:U),I,0,0 +S:G$TL0$0$0({1}SC:U),I,0,0 +S:G$TL1$0$0({1}SC:U),I,0,0 +S:G$TH0$0$0({1}SC:U),I,0,0 +S:G$TH1$0$0({1}SC:U),I,0,0 +S:G$P1$0$0({1}SC:U),I,0,0 +S:G$SCON$0$0({1}SC:U),I,0,0 +S:G$SBUF$0$0({1}SC:U),I,0,0 +S:G$P2$0$0({1}SC:U),I,0,0 +S:G$IE$0$0({1}SC:U),I,0,0 +S:G$P3$0$0({1}SC:U),I,0,0 +S:G$IP$0$0({1}SC:U),I,0,0 +S:G$PSW$0$0({1}SC:U),I,0,0 +S:G$ACC$0$0({1}SC:U),I,0,0 +S:G$A$0$0({1}SC:U),I,0,0 +S:G$B$0$0({1}SC:U),I,0,0 +S:G$P0_0$0$0({1}SX:U),J,0,0 +S:G$P0_1$0$0({1}SX:U),J,0,0 +S:G$P0_2$0$0({1}SX:U),J,0,0 +S:G$P0_3$0$0({1}SX:U),J,0,0 +S:G$P0_4$0$0({1}SX:U),J,0,0 +S:G$P0_5$0$0({1}SX:U),J,0,0 +S:G$P0_6$0$0({1}SX:U),J,0,0 +S:G$P0_7$0$0({1}SX:U),J,0,0 +S:G$IT0$0$0({1}SX:U),J,0,0 +S:G$IE0$0$0({1}SX:U),J,0,0 +S:G$IT1$0$0({1}SX:U),J,0,0 +S:G$IE1$0$0({1}SX:U),J,0,0 +S:G$TR0$0$0({1}SX:U),J,0,0 +S:G$TF0$0$0({1}SX:U),J,0,0 +S:G$TR1$0$0({1}SX:U),J,0,0 +S:G$TF1$0$0({1}SX:U),J,0,0 +S:G$P1_0$0$0({1}SX:U),J,0,0 +S:G$P1_1$0$0({1}SX:U),J,0,0 +S:G$P1_2$0$0({1}SX:U),J,0,0 +S:G$P1_3$0$0({1}SX:U),J,0,0 +S:G$P1_4$0$0({1}SX:U),J,0,0 +S:G$P1_5$0$0({1}SX:U),J,0,0 +S:G$P1_6$0$0({1}SX:U),J,0,0 +S:G$P1_7$0$0({1}SX:U),J,0,0 +S:G$RI$0$0({1}SX:U),J,0,0 +S:G$TI$0$0({1}SX:U),J,0,0 +S:G$RB8$0$0({1}SX:U),J,0,0 +S:G$TB8$0$0({1}SX:U),J,0,0 +S:G$REN$0$0({1}SX:U),J,0,0 +S:G$SM2$0$0({1}SX:U),J,0,0 +S:G$SM1$0$0({1}SX:U),J,0,0 +S:G$SM0$0$0({1}SX:U),J,0,0 +S:G$P2_0$0$0({1}SX:U),J,0,0 +S:G$P2_1$0$0({1}SX:U),J,0,0 +S:G$P2_2$0$0({1}SX:U),J,0,0 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/usr/share/sdcc/lib/small +-l mcs51 +-l libsdcc +-l libint +-l liblong +-l libfloat +demo_c_0.rel + +-e diff --git a/demo/demo_c_0.lst b/demo/demo_c_0.lst new file mode 100644 index 0000000..ec4c901 --- /dev/null +++ b/demo/demo_c_0.lst @@ -0,0 +1,529 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Tue Oct 27 23:03:10 2009 + 5 ;-------------------------------------------------------- + 6 .module demo_c_0 + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _someFunction + 14 .globl _CY + 15 .globl _AC + 16 .globl _F0 + 17 .globl _RS1 + 18 .globl _RS0 + 19 .globl _OV + 20 .globl _FL + 21 .globl _P + 22 .globl _PS + 23 .globl _PT1 + 24 .globl _PX1 + 25 .globl _PT0 + 26 .globl _PX0 + 27 .globl _RD + 28 .globl _WR + 29 .globl _T1 + 30 .globl _T0 + 31 .globl _INT1 + 32 .globl _INT0 + 33 .globl _TXD + 34 .globl _RXD + 35 .globl _P3_7 + 36 .globl _P3_6 + 37 .globl _P3_5 + 38 .globl _P3_4 + 39 .globl _P3_3 + 40 .globl _P3_2 + 41 .globl _P3_1 + 42 .globl _P3_0 + 43 .globl _EA + 44 .globl _ES + 45 .globl _ET1 + 46 .globl _EX1 + 47 .globl _ET0 + 48 .globl _EX0 + 49 .globl _P2_7 + 50 .globl _P2_6 + 51 .globl _P2_5 + 52 .globl _P2_4 + 53 .globl _P2_3 + 54 .globl _P2_2 + 55 .globl _P2_1 + 56 .globl _P2_0 + 57 .globl _SM0 + 58 .globl _SM1 + 59 .globl _SM2 + 60 .globl _REN + 61 .globl _TB8 + 62 .globl _RB8 + 63 .globl _TI + 64 .globl _RI + 65 .globl _P1_7 + 66 .globl _P1_6 + 67 .globl _P1_5 + 68 .globl _P1_4 + 69 .globl _P1_3 + 70 .globl _P1_2 + 71 .globl _P1_1 + 72 .globl _P1_0 + 73 .globl _TF1 + 74 .globl _TR1 + 75 .globl _TF0 + 76 .globl _TR0 + 77 .globl _IE1 + 78 .globl _IT1 + 79 .globl _IE0 + 80 .globl _IT0 + 81 .globl _P0_7 + 82 .globl _P0_6 + 83 .globl _P0_5 + 84 .globl _P0_4 + 85 .globl _P0_3 + 86 .globl _P0_2 + 87 .globl _P0_1 + 88 .globl _P0_0 + 89 .globl _B + 90 .globl _A + 91 .globl _ACC + 92 .globl _PSW + 93 .globl _IP + 94 .globl _P3 + 95 .globl _IE + 96 .globl _P2 + 97 .globl _SBUF + 98 .globl _SCON + 99 .globl _P1 + 100 .globl _TH1 + 101 .globl _TH0 + 102 .globl _TL1 + 103 .globl _TL0 + 104 .globl _TMOD + 105 .globl _TCON + 106 .globl _PCON + 107 .globl _DPH + 108 .globl _DPL + 109 .globl _SP + 110 .globl _P0 + 111 .globl _i + 112 .globl _some_variable + 113 ;-------------------------------------------------------- + 114 ; special function registers + 115 ;-------------------------------------------------------- + 116 .area RSEG (DATA) + 0080 117 G$P0$0$0 == 0x0080 + 0080 118 _P0 = 0x0080 + 0081 119 G$SP$0$0 == 0x0081 + 0081 120 _SP = 0x0081 + 0082 121 G$DPL$0$0 == 0x0082 + 0082 122 _DPL = 0x0082 + 0083 123 G$DPH$0$0 == 0x0083 + 0083 124 _DPH = 0x0083 + 0087 125 G$PCON$0$0 == 0x0087 + 0087 126 _PCON = 0x0087 + 0088 127 G$TCON$0$0 == 0x0088 + 0088 128 _TCON = 0x0088 + 0089 129 G$TMOD$0$0 == 0x0089 + 0089 130 _TMOD = 0x0089 + 008A 131 G$TL0$0$0 == 0x008a + 008A 132 _TL0 = 0x008a + 008B 133 G$TL1$0$0 == 0x008b + 008B 134 _TL1 = 0x008b + 008C 135 G$TH0$0$0 == 0x008c + 008C 136 _TH0 = 0x008c + 008D 137 G$TH1$0$0 == 0x008d + 008D 138 _TH1 = 0x008d + 0090 139 G$P1$0$0 == 0x0090 + 0090 140 _P1 = 0x0090 + 0098 141 G$SCON$0$0 == 0x0098 + 0098 142 _SCON = 0x0098 + 0099 143 G$SBUF$0$0 == 0x0099 + 0099 144 _SBUF = 0x0099 + 00A0 145 G$P2$0$0 == 0x00a0 + 00A0 146 _P2 = 0x00a0 + 00A8 147 G$IE$0$0 == 0x00a8 + 00A8 148 _IE = 0x00a8 + 00B0 149 G$P3$0$0 == 0x00b0 + 00B0 150 _P3 = 0x00b0 + 00B8 151 G$IP$0$0 == 0x00b8 + 00B8 152 _IP = 0x00b8 + 00D0 153 G$PSW$0$0 == 0x00d0 + 00D0 154 _PSW = 0x00d0 + 00E0 155 G$ACC$0$0 == 0x00e0 + 00E0 156 _ACC = 0x00e0 + 00E0 157 G$A$0$0 == 0x00e0 + 00E0 158 _A = 0x00e0 + 00F0 159 G$B$0$0 == 0x00f0 + 00F0 160 _B = 0x00f0 + 161 ;-------------------------------------------------------- + 162 ; special function bits + 163 ;-------------------------------------------------------- + 164 .area RSEG (DATA) + 0080 165 G$P0_0$0$0 == 0x0080 + 0080 166 _P0_0 = 0x0080 + 0081 167 G$P0_1$0$0 == 0x0081 + 0081 168 _P0_1 = 0x0081 + 0082 169 G$P0_2$0$0 == 0x0082 + 0082 170 _P0_2 = 0x0082 + 0083 171 G$P0_3$0$0 == 0x0083 + 0083 172 _P0_3 = 0x0083 + 0084 173 G$P0_4$0$0 == 0x0084 + 0084 174 _P0_4 = 0x0084 + 0085 175 G$P0_5$0$0 == 0x0085 + 0085 176 _P0_5 = 0x0085 + 0086 177 G$P0_6$0$0 == 0x0086 + 0086 178 _P0_6 = 0x0086 + 0087 179 G$P0_7$0$0 == 0x0087 + 0087 180 _P0_7 = 0x0087 + 0088 181 G$IT0$0$0 == 0x0088 + 0088 182 _IT0 = 0x0088 + 0089 183 G$IE0$0$0 == 0x0089 + 0089 184 _IE0 = 0x0089 + 008A 185 G$IT1$0$0 == 0x008a + 008A 186 _IT1 = 0x008a + 008B 187 G$IE1$0$0 == 0x008b + 008B 188 _IE1 = 0x008b + 008C 189 G$TR0$0$0 == 0x008c + 008C 190 _TR0 = 0x008c + 008D 191 G$TF0$0$0 == 0x008d + 008D 192 _TF0 = 0x008d + 008E 193 G$TR1$0$0 == 0x008e + 008E 194 _TR1 = 0x008e + 008F 195 G$TF1$0$0 == 0x008f + 008F 196 _TF1 = 0x008f + 0090 197 G$P1_0$0$0 == 0x0090 + 0090 198 _P1_0 = 0x0090 + 0091 199 G$P1_1$0$0 == 0x0091 + 0091 200 _P1_1 = 0x0091 + 0092 201 G$P1_2$0$0 == 0x0092 + 0092 202 _P1_2 = 0x0092 + 0093 203 G$P1_3$0$0 == 0x0093 + 0093 204 _P1_3 = 0x0093 + 0094 205 G$P1_4$0$0 == 0x0094 + 0094 206 _P1_4 = 0x0094 + 0095 207 G$P1_5$0$0 == 0x0095 + 0095 208 _P1_5 = 0x0095 + 0096 209 G$P1_6$0$0 == 0x0096 + 0096 210 _P1_6 = 0x0096 + 0097 211 G$P1_7$0$0 == 0x0097 + 0097 212 _P1_7 = 0x0097 + 0098 213 G$RI$0$0 == 0x0098 + 0098 214 _RI = 0x0098 + 0099 215 G$TI$0$0 == 0x0099 + 0099 216 _TI = 0x0099 + 009A 217 G$RB8$0$0 == 0x009a + 009A 218 _RB8 = 0x009a + 009B 219 G$TB8$0$0 == 0x009b + 009B 220 _TB8 = 0x009b + 009C 221 G$REN$0$0 == 0x009c + 009C 222 _REN = 0x009c + 009D 223 G$SM2$0$0 == 0x009d + 009D 224 _SM2 = 0x009d + 009E 225 G$SM1$0$0 == 0x009e + 009E 226 _SM1 = 0x009e + 009F 227 G$SM0$0$0 == 0x009f + 009F 228 _SM0 = 0x009f + 00A0 229 G$P2_0$0$0 == 0x00a0 + 00A0 230 _P2_0 = 0x00a0 + 00A1 231 G$P2_1$0$0 == 0x00a1 + 00A1 232 _P2_1 = 0x00a1 + 00A2 233 G$P2_2$0$0 == 0x00a2 + 00A2 234 _P2_2 = 0x00a2 + 00A3 235 G$P2_3$0$0 == 0x00a3 + 00A3 236 _P2_3 = 0x00a3 + 00A4 237 G$P2_4$0$0 == 0x00a4 + 00A4 238 _P2_4 = 0x00a4 + 00A5 239 G$P2_5$0$0 == 0x00a5 + 00A5 240 _P2_5 = 0x00a5 + 00A6 241 G$P2_6$0$0 == 0x00a6 + 00A6 242 _P2_6 = 0x00a6 + 00A7 243 G$P2_7$0$0 == 0x00a7 + 00A7 244 _P2_7 = 0x00a7 + 00A8 245 G$EX0$0$0 == 0x00a8 + 00A8 246 _EX0 = 0x00a8 + 00A9 247 G$ET0$0$0 == 0x00a9 + 00A9 248 _ET0 = 0x00a9 + 00AA 249 G$EX1$0$0 == 0x00aa + 00AA 250 _EX1 = 0x00aa + 00AB 251 G$ET1$0$0 == 0x00ab + 00AB 252 _ET1 = 0x00ab + 00AC 253 G$ES$0$0 == 0x00ac + 00AC 254 _ES = 0x00ac + 00AF 255 G$EA$0$0 == 0x00af + 00AF 256 _EA = 0x00af + 00B0 257 G$P3_0$0$0 == 0x00b0 + 00B0 258 _P3_0 = 0x00b0 + 00B1 259 G$P3_1$0$0 == 0x00b1 + 00B1 260 _P3_1 = 0x00b1 + 00B2 261 G$P3_2$0$0 == 0x00b2 + 00B2 262 _P3_2 = 0x00b2 + 00B3 263 G$P3_3$0$0 == 0x00b3 + 00B3 264 _P3_3 = 0x00b3 + 00B4 265 G$P3_4$0$0 == 0x00b4 + 00B4 266 _P3_4 = 0x00b4 + 00B5 267 G$P3_5$0$0 == 0x00b5 + 00B5 268 _P3_5 = 0x00b5 + 00B6 269 G$P3_6$0$0 == 0x00b6 + 00B6 270 _P3_6 = 0x00b6 + 00B7 271 G$P3_7$0$0 == 0x00b7 + 00B7 272 _P3_7 = 0x00b7 + 00B0 273 G$RXD$0$0 == 0x00b0 + 00B0 274 _RXD = 0x00b0 + 00B1 275 G$TXD$0$0 == 0x00b1 + 00B1 276 _TXD = 0x00b1 + 00B2 277 G$INT0$0$0 == 0x00b2 + 00B2 278 _INT0 = 0x00b2 + 00B3 279 G$INT1$0$0 == 0x00b3 + 00B3 280 _INT1 = 0x00b3 + 00B4 281 G$T0$0$0 == 0x00b4 + 00B4 282 _T0 = 0x00b4 + 00B5 283 G$T1$0$0 == 0x00b5 + 00B5 284 _T1 = 0x00b5 + 00B6 285 G$WR$0$0 == 0x00b6 + 00B6 286 _WR = 0x00b6 + 00B7 287 G$RD$0$0 == 0x00b7 + 00B7 288 _RD = 0x00b7 + 00B8 289 G$PX0$0$0 == 0x00b8 + 00B8 290 _PX0 = 0x00b8 + 00B9 291 G$PT0$0$0 == 0x00b9 + 00B9 292 _PT0 = 0x00b9 + 00BA 293 G$PX1$0$0 == 0x00ba + 00BA 294 _PX1 = 0x00ba + 00BB 295 G$PT1$0$0 == 0x00bb + 00BB 296 _PT1 = 0x00bb + 00BC 297 G$PS$0$0 == 0x00bc + 00BC 298 _PS = 0x00bc + 00D0 299 G$P$0$0 == 0x00d0 + 00D0 300 _P = 0x00d0 + 00D1 301 G$FL$0$0 == 0x00d1 + 00D1 302 _FL = 0x00d1 + 00D2 303 G$OV$0$0 == 0x00d2 + 00D2 304 _OV = 0x00d2 + 00D3 305 G$RS0$0$0 == 0x00d3 + 00D3 306 _RS0 = 0x00d3 + 00D4 307 G$RS1$0$0 == 0x00d4 + 00D4 308 _RS1 = 0x00d4 + 00D5 309 G$F0$0$0 == 0x00d5 + 00D5 310 _F0 = 0x00d5 + 00D6 311 G$AC$0$0 == 0x00d6 + 00D6 312 _AC = 0x00d6 + 00D7 313 G$CY$0$0 == 0x00d7 + 00D7 314 _CY = 0x00d7 + 315 ;-------------------------------------------------------- + 316 ; overlayable register banks + 317 ;-------------------------------------------------------- + 318 .area REG_BANK_0 (REL,OVR,DATA) + 0000 319 .ds 8 + 320 ;-------------------------------------------------------- + 321 ; internal ram data + 322 ;-------------------------------------------------------- + 323 .area DSEG (DATA) + 0000 324 G$some_variable$0$0==. + 0000 325 _some_variable:: + 0000 326 .ds 4 + 0004 327 G$i$0$0==. + 0004 328 _i:: + 0004 329 .ds 2 + 330 ;-------------------------------------------------------- + 331 ; overlayable items in internal ram + 332 ;-------------------------------------------------------- + 333 .area OSEG (OVR,DATA) + 334 ;-------------------------------------------------------- + 335 ; Stack segment in internal ram + 336 ;-------------------------------------------------------- + 337 .area SSEG (DATA) + 0000 338 __start__stack: + 0000 339 .ds 1 + 340 + 341 ;-------------------------------------------------------- + 342 ; indirectly addressable internal ram data + 343 ;-------------------------------------------------------- + 344 .area ISEG (DATA) + 345 ;-------------------------------------------------------- + 346 ; absolute internal ram data + 347 ;-------------------------------------------------------- + 348 .area IABS (ABS,DATA) + 349 .area IABS (ABS,DATA) + 350 ;-------------------------------------------------------- + 351 ; bit data + 352 ;-------------------------------------------------------- + 353 .area BSEG (BIT) + 354 ;-------------------------------------------------------- + 355 ; paged external ram data + 356 ;-------------------------------------------------------- + 357 .area PSEG (PAG,XDATA) + 358 ;-------------------------------------------------------- + 359 ; external ram data + 360 ;-------------------------------------------------------- + 361 .area XSEG (XDATA) + 362 ;-------------------------------------------------------- + 363 ; absolute external ram data + 364 ;-------------------------------------------------------- + 365 .area XABS (ABS,XDATA) + 366 ;-------------------------------------------------------- + 367 ; external initialized ram data + 368 ;-------------------------------------------------------- + 369 .area XISEG (XDATA) + 370 .area HOME (CODE) + 371 .area GSINIT0 (CODE) + 372 .area GSINIT1 (CODE) + 373 .area GSINIT2 (CODE) + 374 .area GSINIT3 (CODE) + 375 .area GSINIT4 (CODE) + 376 .area GSINIT5 (CODE) + 377 .area GSINIT (CODE) + 378 .area GSFINAL (CODE) + 379 .area CSEG (CODE) + 380 ;-------------------------------------------------------- + 381 ; interrupt vector + 382 ;-------------------------------------------------------- + 383 .area HOME (CODE) + 0000 384 __interrupt_vect: + 0000 02s00r00 385 ljmp __sdcc_gsinit_startup + 386 ;-------------------------------------------------------- + 387 ; global & static initialisations + 388 ;-------------------------------------------------------- + 389 .area HOME (CODE) + 390 .area GSINIT (CODE) + 391 .area GSFINAL (CODE) + 392 .area GSINIT (CODE) + 393 .globl __sdcc_gsinit_startup + 394 .globl __sdcc_program_startup + 395 .globl __start__stack + 396 .globl __mcs51_genXINIT + 397 .globl __mcs51_genXRAMCLEAR + 398 .globl __mcs51_genRAMCLEAR + 0000 399 G$main$0$0 ==. + 0000 400 C$demo_c_0.c$10$1$1 ==. + 401 ; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here + 0000 E4 402 clr a + 0001 F5*00 403 mov _some_variable,a + 0003 F5*01 404 mov (_some_variable + 1),a + 0005 F5*02 405 mov (_some_variable + 2),a + 0007 F5*03 406 mov (_some_variable + 3),a + 407 .area GSFINAL (CODE) + 0000 02s00r03 408 ljmp __sdcc_program_startup + 409 ;-------------------------------------------------------- + 410 ; Home + 411 ;-------------------------------------------------------- + 412 .area HOME (CODE) + 413 .area HOME (CODE) + 0003 414 __sdcc_program_startup: + 0003 12s00r0A 415 lcall _main + 416 ; return from main will lock up + 0006 80 FE 417 sjmp . + 418 ;-------------------------------------------------------- + 419 ; code + 420 ;-------------------------------------------------------- + 421 .area CSEG (CODE) + 422 ;------------------------------------------------------------ + 423 ;Allocation info for local variables in function 'someFunction' + 424 ;------------------------------------------------------------ + 425 ;somevalue Allocated to registers r2 + 426 ;------------------------------------------------------------ + 0000 427 G$someFunction$0$0 ==. + 0000 428 C$demo_c_0.c$20$0$0 ==. + 429 ; demo_c_0.c:20: void someFunction(unsigned char somevalue) + 430 ; ----------------------------------------- + 431 ; function someFunction + 432 ; ----------------------------------------- + 0000 433 _someFunction: + 0002 434 ar2 = 0x02 + 0003 435 ar3 = 0x03 + 0004 436 ar4 = 0x04 + 0005 437 ar5 = 0x05 + 0006 438 ar6 = 0x06 + 0007 439 ar7 = 0x07 + 0000 440 ar0 = 0x00 + 0001 441 ar1 = 0x01 + 0000 AA 82 442 mov r2,dpl + 0002 443 C$demo_c_0.c$23$1$1 ==. + 444 ; demo_c_0.c:23: P1=somevalue; + 0002 8A 90 445 mov _P1,r2 + 0004 446 C$demo_c_0.c$24$1$1 ==. + 447 ; demo_c_0.c:24: P3=somevalue^0xFF; + 0004 74 FF 448 mov a,#0xFF + 0006 6A 449 xrl a,r2 + 0007 F5 B0 450 mov _P3,a + 0009 451 C$demo_c_0.c$25$1$1 ==. + 0009 452 XG$someFunction$0$0 ==. + 0009 22 453 ret + 454 ;------------------------------------------------------------ + 455 ;Allocation info for local variables in function 'main' + 456 ;------------------------------------------------------------ + 457 ;------------------------------------------------------------ + 000A 458 G$main$0$0 ==. + 000A 459 C$demo_c_0.c$28$1$1 ==. + 460 ; demo_c_0.c:28: int main() + 461 ; ----------------------------------------- + 462 ; function main + 463 ; ----------------------------------------- + 000A 464 _main: + 000A 465 C$demo_c_0.c$31$1$1 ==. + 466 ; demo_c_0.c:31: while(1) { + 000A 467 00102$: + 000A 468 C$demo_c_0.c$32$2$2 ==. + 469 ; demo_c_0.c:32: for(i=0; i<255; i++) { + 000A E4 470 clr a + 000B F5*04 471 mov _i,a + 000D F5*05 472 mov (_i + 1),a + 000F 473 00104$: + 000F C3 474 clr c + 0010 E5*04 475 mov a,_i + 0012 94 FF 476 subb a,#0xFF + 0014 E5*05 477 mov a,(_i + 1) + 0016 64 80 478 xrl a,#0x80 + 0018 94 80 479 subb a,#0x80 + 001A 50 26 480 jnc 00107$ + 001C 481 C$demo_c_0.c$33$3$3 ==. + 482 ; demo_c_0.c:33: someFunction(i+2); + 001C AA*04 483 mov r2,_i + 001E 74 02 484 mov a,#0x02 + 0020 2A 485 add a,r2 + 0021 F5 82 486 mov dpl,a + 0023 12s00r00 487 lcall _someFunction + 0026 488 C$demo_c_0.c$34$3$3 ==. + 489 ; demo_c_0.c:34: some_variable++; + 0026 05*00 490 inc _some_variable + 0028 E4 491 clr a + 0029 B5*00 0C 492 cjne a,_some_variable,00114$ + 002C 05*01 493 inc (_some_variable + 1) + 002E B5*01 07 494 cjne a,(_some_variable + 1),00114$ + 0031 05*02 495 inc (_some_variable + 2) + 0033 B5*02 02 496 cjne a,(_some_variable + 2),00114$ + 0036 05*03 497 inc (_some_variable + 3) + 0038 498 00114$: + 0038 499 C$demo_c_0.c$32$2$2 ==. + 500 ; demo_c_0.c:32: for(i=0; i<255; i++) { + 0038 05*04 501 inc _i + 003A E4 502 clr a + 003B B5*04 D1 503 cjne a,_i,00104$ + 003E 05*05 504 inc (_i + 1) + 0040 80 CD 505 sjmp 00104$ + 0042 506 00107$: + 0042 507 C$demo_c_0.c$36$2$2 ==. + 508 ; demo_c_0.c:36: some_variable-=22; + 0042 E5*00 509 mov a,_some_variable + 0044 24 EA 510 add a,#0xea + 0046 F5*00 511 mov _some_variable,a + 0048 E5*01 512 mov a,(_some_variable + 1) + 004A 34 FF 513 addc a,#0xff + 004C F5*01 514 mov (_some_variable + 1),a + 004E E5*02 515 mov a,(_some_variable + 2) + 0050 34 FF 516 addc a,#0xff + 0052 F5*02 517 mov (_some_variable + 2),a + 0054 E5*03 518 mov a,(_some_variable + 3) + 0056 34 FF 519 addc a,#0xff + 0058 F5*03 520 mov (_some_variable + 3),a + 005A 521 C$demo_c_0.c$40$1$1 ==. + 522 ; demo_c_0.c:40: return 0; + 005A 523 C$demo_c_0.c$41$1$1 ==. + 005A 524 XG$main$0$0 ==. + 005A 80 AE 525 sjmp 00102$ + 526 .area CSEG (CODE) + 527 .area CONST (CODE) + 528 .area XINIT (CODE) + 529 .area CABS (ABS,CODE) diff --git a/demo/demo_c_0.map b/demo/demo_c_0.map new file mode 100644 index 0000000..d1247dd --- /dev/null +++ b/demo/demo_c_0.map @@ -0,0 +1,488 @@ + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CABS 0000 0000 = 0. bytes (ABS,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:FFFFFF00 s_BSEG + 0C:0000 l_BIT_BANK + 0C:0000 l_BSEG + 0C:0000 l_BSEG_BYTES + 0C:0000 l_CABS + 0C:0000 l_CONST + 0C:0000 l_GSINIT1 + 0C:0000 l_GSINIT5 + 0C:0000 l_IABS + 0C:0000 l_ISEG + 0C:0000 l_OSEG + 0C:0000 l_PSEG + 0C:0000 l_REG_BANK_1 + 0C:0000 l_REG_BANK_2 + 0C:0000 l_REG_BANK_3 + 0C:0000 l_RSEG + 0C:0000 l_XABS + 0C:0000 l_XINIT + 0C:0000 l_XISEG + 0C:0000 l_XSEG + 0C:0000 l__CODE + 0C:0000 s_BSEG_BYTES + 0C:0000 s_CABS + 0C:0000 s_DSEG + 0C:0000 s_HOME + 0C:0000 s_IABS + 0C:0000 s_ISEG + 0C:0000 s_PSEG + 0C:0000 s_REG_BANK_0 + 0C:0000 s_XABS + 0C:0000 s_XISEG + 0C:0000 s_XSEG + 0C:0003 l_GSFINAL + 0C:0003 l_GSINIT0 + 0C:0008 l_HOME + 0C:0008 l_REG_BANK_0 + 0C:0008 s_GSINIT0 + 0C:0008 s_REG_BANK_1 + 0C:0009 l_GSINIT + 0C:000A l_GSINIT2 + 0C:000B s_GSINIT1 + 0C:000B s_GSINIT2 + 0C:000E s_RSEG + 0C:000E s_SSEG + 0C:0010 s_REG_BANK_2 + 0C:0015 s_GSINIT3 + 0C:0018 s_BIT_BANK + 0C:0018 s_OSEG + 0C:0018 s_REG_BANK_3 + 0C:0020 s__CODE + 0C:0022 l_GSINIT3 + 0C:002A l_GSINIT4 + 0C:0037 s_GSINIT4 + 0C:0060 l_CSEG + 0C:0061 s_GSINIT + 0C:0061 s_GSINIT5 + 0C:006A s_GSFINAL + 0C:006D s_CSEG + 0C:0080 l_DSEG + 0C:00CD s_CONST + 0C:00CD s_XINIT + 0C:00F2 l_SSEG + 0C:0100 l_IRAM + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +. .ABS. 0000 0000 = 0. bytes (ABS,CON) + + Value Global + -------- -------------------------------- + 0080 G$P0$0$0 + 0080 G$P0_0$0$0 + 0080 _P0 + 0080 _P0_0 + 0081 G$P0_1$0$0 + 0081 G$SP$0$0 + 0081 _P0_1 + 0081 _SP + 0082 G$DPL$0$0 + 0082 G$P0_2$0$0 + 0082 _DPL + 0082 _P0_2 + 0083 G$DPH$0$0 + 0083 G$P0_3$0$0 + 0083 _DPH + 0083 _P0_3 + 0084 G$P0_4$0$0 + 0084 _P0_4 + 0085 G$P0_5$0$0 + 0085 _P0_5 + 0086 G$P0_6$0$0 + 0086 _P0_6 + 0087 G$P0_7$0$0 + 0087 G$PCON$0$0 + 0087 _P0_7 + 0087 _PCON + 0088 G$IT0$0$0 + 0088 G$TCON$0$0 + 0088 _IT0 + 0088 _TCON + 0089 G$IE0$0$0 + 0089 G$TMOD$0$0 + 0089 _IE0 + 0089 _TMOD + 008A G$IT1$0$0 + 008A G$TL0$0$0 + 008A _IT1 + 008A _TL0 + 008B G$IE1$0$0 + 008B G$TL1$0$0 + 008B _IE1 + 008B _TL1 + 008C G$TH0$0$0 + 008C G$TR0$0$0 + 008C _TH0 + 008C _TR0 + 008D G$TF0$0$0 + 008D G$TH1$0$0 + 008D _TF0 + 008D _TH1 + 008E G$TR1$0$0 + 008E _TR1 + 008F G$TF1$0$0 + 008F _TF1 + 0090 G$P1$0$0 + 0090 G$P1_0$0$0 + 0090 _P1 + 0090 _P1_0 + 0091 G$P1_1$0$0 + 0091 _P1_1 + 0092 G$P1_2$0$0 + 0092 _P1_2 + 0093 G$P1_3$0$0 + 0093 _P1_3 + 0094 G$P1_4$0$0 + 0094 _P1_4 + 0095 G$P1_5$0$0 + 0095 _P1_5 + 0096 G$P1_6$0$0 + 0096 _P1_6 + 0097 G$P1_7$0$0 + 0097 _P1_7 + 0098 G$RI$0$0 + 0098 G$SCON$0$0 + 0098 _RI + 0098 _SCON + 0099 G$SBUF$0$0 + 0099 G$TI$0$0 + 0099 _SBUF + 0099 _TI + 009A G$RB8$0$0 + 009A _RB8 + 009B G$TB8$0$0 + 009B _TB8 + 009C G$REN$0$0 + 009C _REN + 009D G$SM2$0$0 + 009D _SM2 + 009E G$SM1$0$0 + 009E _SM1 + 009F G$SM0$0$0 + 009F _SM0 + 00A0 G$P2$0$0 + 00A0 G$P2_0$0$0 + 00A0 _P2 + 00A0 _P2_0 + 00A0 __XPAGE + 00A1 G$P2_1$0$0 + 00A1 _P2_1 + 00A2 G$P2_2$0$0 + 00A2 _P2_2 + 00A3 G$P2_3$0$0 + 00A3 _P2_3 + 00A4 G$P2_4$0$0 + 00A4 _P2_4 + 00A5 G$P2_5$0$0 + 00A5 _P2_5 + 00A6 G$P2_6$0$0 + 00A6 _P2_6 + 00A7 G$P2_7$0$0 + 00A7 _P2_7 + 00A8 G$EX0$0$0 + 00A8 G$IE$0$0 + 00A8 _EX0 + 00A8 _IE + 00A9 G$ET0$0$0 + 00A9 _ET0 + 00AA G$EX1$0$0 + 00AA _EX1 + 00AB G$ET1$0$0 + 00AB _ET1 + 00AC G$ES$0$0 + 00AC _ES + 00AF G$EA$0$0 + 00AF _EA + 00B0 G$P3$0$0 + 00B0 G$P3_0$0$0 + 00B0 G$RXD$0$0 + 00B0 _P3 + 00B0 _P3_0 + 00B0 _RXD + 00B1 G$P3_1$0$0 + 00B1 G$TXD$0$0 + 00B1 _P3_1 + 00B1 _TXD + 00B2 G$INT0$0$0 + 00B2 G$P3_2$0$0 + 00B2 _INT0 + 00B2 _P3_2 + 00B3 G$INT1$0$0 + 00B3 G$P3_3$0$0 + 00B3 _INT1 + 00B3 _P3_3 + 00B4 G$P3_4$0$0 + 00B4 G$T0$0$0 + 00B4 _P3_4 + 00B4 _T0 + 00B5 G$P3_5$0$0 + 00B5 G$T1$0$0 + 00B5 _P3_5 + 00B5 _T1 + 00B6 G$P3_6$0$0 + 00B6 G$WR$0$0 + 00B6 _P3_6 + 00B6 _WR + 00B7 G$P3_7$0$0 + 00B7 G$RD$0$0 + 00B7 _P3_7 + 00B7 _RD + 00B8 G$IP$0$0 + 00B8 G$PX0$0$0 + 00B8 _IP + 00B8 _PX0 + 00B9 G$PT0$0$0 + 00B9 _PT0 + 00BA G$PX1$0$0 + 00BA _PX1 + 00BB G$PT1$0$0 + 00BB _PT1 + 00BC G$PS$0$0 + 00BC _PS + 00D0 G$P$0$0 + 00D0 G$PSW$0$0 + 00D0 _P + 00D0 _PSW + 00D1 G$FL$0$0 + 00D1 _FL + 00D2 G$OV$0$0 + 00D2 _OV + 00D3 G$RS0$0$0 + 00D3 _RS0 + 00D4 G$RS1$0$0 + 00D4 _RS1 + 00D5 G$F0$0$0 + 00D5 _F0 + 00D6 G$AC$0$0 + 00D6 _AC + 00D7 G$CY$0$0 + 00D7 _CY + 00E0 G$A$0$0 + 00E0 G$ACC$0$0 + 00E0 _A + 00E0 _ACC + 00F0 G$B$0$0 + 00F0 _B + + + + + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +DSEG 0000 0080 = 128. bytes (REL,CON) + + Value Global + -------- -------------------------------- + 0008 G$some_variable$0$0 + 0008 _some_variable + 000C G$i$0$0 + 000C _i + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +SSEG 000E 00F2 = 242. bytes (REL,OVR) + + Value Global + -------- -------------------------------- + 000E __start__stack + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +HOME 0000 0008 = 8. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0000 A$demo_c_0$385 + 0C:0003 A$demo_c_0$415 + 0C:0003 __sdcc_program_startup + 0C:0006 A$demo_c_0$417 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT0 0008 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0008 __sdcc_gsinit_startup + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT3 0015 0022 = 34. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0015 __mcs51_genXINIT + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT4 0037 002A = 42. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0037 __mcs51_genRAMCLEAR + 0C:003D __mcs51_genXRAMCLEAR + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT 0061 0009 = 9. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0061 A$demo_c_0$402 + 0C:0061 C$demo_c_0.c$10$1$1 + 0C:0062 A$demo_c_0$403 + 0C:0064 A$demo_c_0$404 + 0C:0066 A$demo_c_0$405 + 0C:0068 A$demo_c_0$406 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSFINAL 006A 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:006A A$demo_c_0$408 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CSEG 006D 0060 = 96. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:006D A$demo_c_0$442 + 0C:006D C$demo_c_0.c$20$0$0 + 0C:006D G$someFunction$0$0 + 0C:006D _someFunction + 0C:006F A$demo_c_0$445 + 0C:006F C$demo_c_0.c$23$1$1 + 0C:0071 A$demo_c_0$448 + 0C:0071 C$demo_c_0.c$24$1$1 + 0C:0073 A$demo_c_0$449 + 0C:0074 A$demo_c_0$450 + 0C:0076 A$demo_c_0$453 + 0C:0076 C$demo_c_0.c$25$1$1 + 0C:0076 XG$someFunction$0$0 + 0C:0077 A$demo_c_0$470 + 0C:0077 C$demo_c_0.c$28$1$1 + 0C:0077 C$demo_c_0.c$31$1$1 + 0C:0077 G$main$0$0 + 0C:0077 _main + 0C:0078 A$demo_c_0$471 + 0C:007A A$demo_c_0$472 + 0C:007C A$demo_c_0$474 + 0C:007D A$demo_c_0$475 + 0C:007F A$demo_c_0$476 + 0C:0081 A$demo_c_0$477 + 0C:0083 A$demo_c_0$478 + 0C:0085 A$demo_c_0$479 + 0C:0087 A$demo_c_0$480 + 0C:0089 A$demo_c_0$483 + 0C:0089 C$demo_c_0.c$33$3$3 + 0C:008B A$demo_c_0$484 + 0C:008D A$demo_c_0$485 + 0C:008E A$demo_c_0$486 + 0C:0090 A$demo_c_0$487 + 0C:0093 A$demo_c_0$490 + 0C:0093 C$demo_c_0.c$34$3$3 + 0C:0095 A$demo_c_0$491 + 0C:0096 A$demo_c_0$492 + 0C:0099 A$demo_c_0$493 + 0C:009B A$demo_c_0$494 + 0C:009E A$demo_c_0$495 + 0C:00A0 A$demo_c_0$496 + 0C:00A3 A$demo_c_0$497 + 0C:00A5 A$demo_c_0$501 + 0C:00A5 C$demo_c_0.c$32$2$2 + 0C:00A7 A$demo_c_0$502 + 0C:00A8 A$demo_c_0$503 + 0C:00AB A$demo_c_0$504 + 0C:00AD A$demo_c_0$505 + 0C:00AF A$demo_c_0$509 + 0C:00AF C$demo_c_0.c$36$2$2 + 0C:00B1 A$demo_c_0$510 + 0C:00B3 A$demo_c_0$511 + 0C:00B5 A$demo_c_0$512 + 0C:00B7 A$demo_c_0$513 + 0C:00B9 A$demo_c_0$514 + 0C:00BB A$demo_c_0$515 + 0C:00BD A$demo_c_0$516 + 0C:00BF A$demo_c_0$517 + 0C:00C1 A$demo_c_0$518 + 0C:00C3 A$demo_c_0$519 + 0C:00C5 A$demo_c_0$520 + 0C:00C7 A$demo_c_0$525 + 0C:00C7 C$demo_c_0.c$40$1$1 + 0C:00C7 C$demo_c_0.c$41$1$1 + 0C:00C7 XG$main$0$0 + 0C:00C9 __sdcc_external_startup + + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 1. + +Files Linked [ module(s) ] + +demo_c_0.rel + +Libraries Linked [ object file ] + +/usr/share/sdcc/lib/small/mcs51.lib [ crtclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxinit.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtpagesfr.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtstart.rel ] +/usr/share/sdcc/lib/small/libsdcc.lib [ _startup.rel ] + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 2. + +User Base Address Definitions + +HOME = 0x0000 +ISEG = 0x0000 +BSEG = 0x0000 + +
\ No newline at end of file diff --git a/demo/demo_c_0.mem b/demo/demo_c_0.mem new file mode 100644 index 0000000..01837e4 --- /dev/null +++ b/demo/demo_c_0.mem @@ -0,0 +1,28 @@ +Internal RAM layout: + 0 1 2 3 4 5 6 7 8 9 A B C D E F +0x00:|0|0|0|0|0|0|0|0|a|a|a|a|a|a|S|S| +0x10:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x20:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x30:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x40:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x50:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x60:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x70:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x80:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x90:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xa0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xb0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xc0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xd0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xe0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xf0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute + +Stack starts at: 0x0e (sp set to 0x0d) with 242 bytes available. + +Other memory: + Name Start End Size Max + ---------------- -------- -------- -------- -------- + PAGED EXT. RAM 0 0 + EXTERNAL RAM 0 0 + ROM/EPROM/FLASH 0x0000 0x00cc 205 2048 diff --git a/demo/demo_c_0.rel b/demo/demo_c_0.rel new file mode 100644 index 0000000..172db17 --- /dev/null +++ b/demo/demo_c_0.rel @@ -0,0 +1,378 @@ +;!FILE demo_c_0.asm +XH +H 1A areas 117 global symbols +M demo_c_0 +O -mmcs51 --model-small +S G$EX0$0$0 Def00A8 +S G$IT0$0$0 Def0088 +S G$TH1$0$0 Def008D +S _P1 Def0090 +S _A Def00E0 +S G$RXD$0$0 Def00B0 +S G$EX1$0$0 Def00AA +S G$TB8$0$0 Def009B +S G$IT1$0$0 Def008A +S G$IE$0$0 Def00A8 +S _P2 Def00A0 +S _B Def00F0 +S _SP Def0081 +S _P3 Def00B0 +S _PS Def00BC +S G$TXD$0$0 Def00B1 +S G$SM0$0$0 Def009F +S G$TL0$0$0 Def008A +S _T0 Def00B4 +S G$SM1$0$0 Def009E +S G$TL1$0$0 Def008B +S _T1 Def00B5 +S _OV Def00D2 +S G$FL$0$0 Def00D1 +S G$SM2$0$0 Def009D +S _ACC Def00E0 +S __mcs51_genRAMCLEAR Ref0000 +S G$PT0$0$0 Def00B9 +S G$RS0$0$0 Def00D3 +S G$PT1$0$0 Def00BB +S _WR Def00B6 +S G$F0$0$0 Def00D5 +S G$RS1$0$0 Def00D4 +S G$RD$0$0 Def00B7 +S G$TR0$0$0 Def008C +S G$TR1$0$0 Def008E +S G$PX0$0$0 Def00B8 +S G$ES$0$0 Def00AC +S G$PX1$0$0 Def00BA +S G$IP$0$0 Def00B8 +S G$PSW$0$0 Def00D0 +S G$RI$0$0 Def0098 +S _P0_0 Def0080 +S G$CY$0$0 Def00D7 +S _PCON Def0087 +S _SBUF Def0099 +S _P0_1 Def0081 +S _P1_0 Def0090 +S _P Def00D0 +S G$TI$0$0 Def0099 +S _P0_2 Def0082 +S _P1_1 Def0091 +S _P2_0 Def00A0 +S _P0_3 Def0083 +S _P1_2 Def0092 +S _P2_1 Def00A1 +S _P3_0 Def00B0 +S _SCON Def0098 +S _P0_4 Def0084 +S _P1_3 Def0093 +S _P2_2 Def00A2 +S _P3_1 Def00B1 +S G$P0$0$0 Def0080 +S _TCON Def0088 +S _TMOD Def0089 +S _P0_5 Def0085 +S _P1_4 Def0094 +S _P2_3 Def00A3 +S _P3_2 Def00B2 +S G$A$0$0 Def00E0 +S G$P1$0$0 Def0090 +S _P0_6 Def0086 +S _P1_5 Def0095 +S _P2_4 Def00A4 +S _P3_3 Def00B3 +S G$B$0$0 Def00F0 +S G$P2$0$0 Def00A0 +S _P0_7 Def0087 +S _P1_6 Def0096 +S _P2_5 Def00A5 +S _P3_4 Def00B4 +S G$PS$0$0 Def00BC +S G$P3$0$0 Def00B0 +S G$SP$0$0 Def0081 +S _P1_7 Def0097 +S _P2_6 Def00A6 +S _P3_5 Def00B5 +S G$T0$0$0 Def00B4 +S _P2_7 Def00A7 +S _P3_6 Def00B6 +S G$OV$0$0 Def00D2 +S G$T1$0$0 Def00B5 +S _P3_7 Def00B7 +S G$ACC$0$0 Def00E0 +S _INT0 Def00B2 +S _DPH Def0083 +S _INT1 Def00B3 +S G$WR$0$0 Def00B6 +S _IE0 Def0089 +S _IE1 Def008B +S _DPL Def0082 +S G$P0_0$0$0 Def0080 +S G$P$0$0 Def00D0 +S G$P1_0$0$0 Def0090 +S G$P0_1$0$0 Def0081 +S G$SBUF$0$0 Def0099 +S G$PCON$0$0 Def0087 +S _AC Def00D6 +S G$P2_0$0$0 Def00A0 +S G$P1_1$0$0 Def0091 +S G$P0_2$0$0 Def0082 +S _REN Def009C +S G$P3_0$0$0 Def00B0 +S G$P2_1$0$0 Def00A1 +S G$P1_2$0$0 Def0092 +S G$P0_3$0$0 Def0083 +S _EA Def00AF +S G$P3_1$0$0 Def00B1 +S G$P2_2$0$0 Def00A2 +S G$P1_3$0$0 Def0093 +S G$P0_4$0$0 Def0084 +S G$SCON$0$0 Def0098 +S G$P3_2$0$0 Def00B2 +S G$P2_3$0$0 Def00A3 +S G$P1_4$0$0 Def0094 +S G$P0_5$0$0 Def0085 +S G$TMOD$0$0 Def0089 +S G$TCON$0$0 Def0088 +S G$P3_3$0$0 Def00B3 +S G$P2_4$0$0 Def00A4 +S G$P1_5$0$0 Def0095 +S G$P0_6$0$0 Def0086 +S _ET0 Def00A9 +S G$P3_4$0$0 Def00B4 +S G$P2_5$0$0 Def00A5 +S G$P1_6$0$0 Def0096 +S G$P0_7$0$0 Def0087 +S _TF0 Def008D +S _ET1 Def00AB +S G$P3_5$0$0 Def00B5 +S G$P2_6$0$0 Def00A6 +S G$P1_7$0$0 Def0097 +S _TF1 Def008F +S G$P3_6$0$0 Def00B6 +S G$P2_7$0$0 Def00A7 +S _TH0 Def008C +S _RB8 Def009A +S __mcs51_genXINIT Ref0000 +S G$P3_7$0$0 Def00B7 +S _TH1 Def008D +S _IT0 Def0088 +S _EX0 Def00A8 +S _IE Def00A8 +S _IT1 Def008A +S _TB8 Def009B +S _EX1 Def00AA +S _RXD Def00B0 +S G$INT0$0$0 Def00B2 +S G$INT1$0$0 Def00B3 +S G$DPH$0$0 Def0083 +S _TL0 Def008A +S _SM0 Def009F +S _TXD Def00B1 +S _TL1 Def008B +S _SM1 Def009E +S G$IE0$0$0 Def0089 +S _SM2 Def009D +S _FL Def00D1 +S G$IE1$0$0 Def008B +S G$DPL$0$0 Def0082 +S _PT0 Def00B9 +S _PT1 Def00BB +S _RS0 Def00D3 +S _TR0 Def008C +S _RD Def00B7 +S _RS1 Def00D4 +S _F0 Def00D5 +S _TR1 Def008E +S G$AC$0$0 Def00D6 +S _ES Def00AC +S _PX0 Def00B8 +S G$REN$0$0 Def009C +S _IP Def00B8 +S _PX1 Def00BA +S G$EA$0$0 Def00AF +S _PSW Def00D0 +S __sdcc_gsinit_startup Ref0000 +S _RI Def0098 +S _CY Def00D7 +S G$ET0$0$0 Def00A9 +S _TI Def0099 +S G$ET1$0$0 Def00AB +S G$TF0$0$0 Def008D +S G$TF1$0$0 Def008F +S __mcs51_genXRAMCLEAR Ref0000 +S G$RB8$0$0 Def009A +S G$TH0$0$0 Def008C +S _P0 Def0080 +A _CODE size 0 flags 0 addr 0 +A RSEG size 0 flags 0 addr 0 +A REG_BANK_0 size 8 flags 4 addr 0 +A DSEG size 6 flags 0 addr 0 +S _i Def0004 +S G$some_variable$0$0 Def0000 +S G$i$0$0 Def0004 +S _some_variable Def0000 +A OSEG size 0 flags 4 addr 0 +A SSEG size 1 flags 0 addr 0 +S __start__stack Def0000 +A ISEG size 0 flags 0 addr 0 +A IABS size 0 flags 8 addr 0 +A BSEG size 0 flags 80 addr 0 +A PSEG size 0 flags 50 addr 0 +A XSEG size 0 flags 40 addr 0 +A XABS size 0 flags 48 addr 0 +A XISEG size 0 flags 40 addr 0 +A HOME size 8 flags 20 addr 0 +S __sdcc_program_startup Def0003 +S A$demo_c_0$415 Def0003 +S A$demo_c_0$417 Def0006 +S A$demo_c_0$385 Def0000 +A GSINIT0 size 0 flags 20 addr 0 +A GSINIT1 size 0 flags 20 addr 0 +A GSINIT2 size 0 flags 20 addr 0 +A GSINIT3 size 0 flags 20 addr 0 +A GSINIT4 size 0 flags 20 addr 0 +A GSINIT5 size 0 flags 20 addr 0 +A GSINIT size 9 flags 20 addr 0 +S A$demo_c_0$402 Def0000 +S A$demo_c_0$403 Def0001 +S A$demo_c_0$404 Def0003 +S A$demo_c_0$405 Def0005 +S A$demo_c_0$406 Def0007 +S C$demo_c_0.c$10$1$1 Def0000 +A GSFINAL size 3 flags 20 addr 0 +S A$demo_c_0$408 Def0000 +A CSEG size 5C flags 20 addr 0 +S A$demo_c_0$494 Def002E +S A$demo_c_0$485 Def0020 +S A$demo_c_0$476 Def0012 +S A$demo_c_0$449 Def0006 +S C$demo_c_0.c$40$1$1 Def005A +S C$demo_c_0.c$31$1$1 Def000A +S A$demo_c_0$495 Def0031 +S A$demo_c_0$486 Def0021 +S A$demo_c_0$477 Def0014 +S C$demo_c_0.c$41$1$1 Def005A +S C$demo_c_0.c$23$1$1 Def0002 +S A$demo_c_0$496 Def0033 +S A$demo_c_0$487 Def0023 +S A$demo_c_0$478 Def0016 +S C$demo_c_0.c$24$1$1 Def0004 +S A$demo_c_0$497 Def0036 +S A$demo_c_0$479 Def0018 +S C$demo_c_0.c$32$2$2 Def0038 +S C$demo_c_0.c$25$1$1 Def0009 +S _main Def000A +S XG$someFunction$0$0 Def0009 +S C$demo_c_0.c$33$3$3 Def001C +S C$demo_c_0.c$28$1$1 Def000A +S C$demo_c_0.c$36$2$2 Def0042 +S C$demo_c_0.c$34$3$3 Def0026 +S G$someFunction$0$0 Def0000 +S XG$main$0$0 Def005A +S G$main$0$0 Def000A +S A$demo_c_0$510 Def0044 +S A$demo_c_0$501 Def0038 +S A$demo_c_0$520 Def0058 +S A$demo_c_0$511 Def0046 +S A$demo_c_0$502 Def003A +S A$demo_c_0$512 Def0048 +S A$demo_c_0$503 Def003B +S A$demo_c_0$513 Def004A +S A$demo_c_0$504 Def003E +S A$demo_c_0$450 Def0007 +S A$demo_c_0$514 Def004C +S A$demo_c_0$505 Def0040 +S A$demo_c_0$442 Def0000 +S _someFunction Def0000 +S A$demo_c_0$515 Def004E +S A$demo_c_0$470 Def000A +S A$demo_c_0$525 Def005A +S A$demo_c_0$516 Def0050 +S A$demo_c_0$480 Def001A +S A$demo_c_0$471 Def000B +S A$demo_c_0$453 Def0009 +S A$demo_c_0$517 Def0052 +S A$demo_c_0$490 Def0026 +S A$demo_c_0$472 Def000D +S A$demo_c_0$445 Def0002 +S C$demo_c_0.c$20$0$0 Def0000 +S A$demo_c_0$518 Def0054 +S A$demo_c_0$509 Def0042 +S A$demo_c_0$491 Def0028 +S A$demo_c_0$519 Def0056 +S A$demo_c_0$492 Def0029 +S A$demo_c_0$483 Def001C +S A$demo_c_0$474 Def000F +S A$demo_c_0$493 Def002C +S A$demo_c_0$484 Def001E +S A$demo_c_0$475 Def0010 +S A$demo_c_0$448 Def0004 +A CONST size 0 flags 20 addr 0 +A XINIT size 0 flags 20 addr 0 +A CABS size 0 flags 28 addr 0 +T 00 00 +R 00 00 00 02 +T 00 00 +R 00 00 00 03 +T 00 00 +R 00 00 00 03 +T 00 04 +R 00 00 00 03 +T 00 04 +R 00 00 00 03 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 0D +T 00 00 02 00 00 +R 00 00 00 0D 02 03 00 BA +T 00 00 E4 F5 00 00 00 F5 00 00 01 F5 +R 00 00 00 14 F1 21 04 00 03 F1 21 08 00 03 +T 00 06 00 00 02 F5 00 00 03 +R 00 00 00 14 F1 21 02 00 03 F1 21 06 00 03 +T 00 00 02 00 03 +R 00 00 00 15 00 03 00 0D +T 00 03 +R 00 00 00 0D +T 00 03 12 00 0A 80 FE +R 00 00 00 0D 00 03 00 16 +T 00 00 +R 00 00 00 16 +T 00 00 AA 82 8A 90 74 FF 6A F5 B0 22 +R 00 00 00 16 +T 00 0A +R 00 00 00 16 +T 00 0A +R 00 00 00 16 +T 00 0A E4 F5 00 00 04 F5 00 00 05 +R 00 00 00 16 F1 21 04 00 03 F1 21 08 00 03 +T 00 0F +R 00 00 00 16 +T 00 0F C3 E5 00 00 04 94 FF E5 00 00 05 64 80 94 +R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03 +T 00 19 80 50 26 AA 00 00 04 74 02 2A F5 82 12 +R 00 00 00 16 F1 21 06 00 03 +T 00 24 00 00 05 00 00 00 E4 B5 +R 00 00 00 16 00 02 00 16 F1 21 05 00 03 +T 00 2A 00 00 00 0C 05 00 00 01 B5 +R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03 +T 00 2F 00 00 01 07 05 00 00 02 B5 +R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03 +T 00 34 00 00 02 02 05 00 00 03 +R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03 +T 00 38 +R 00 00 00 16 +T 00 38 05 00 00 04 E4 B5 00 00 04 D1 05 +R 00 00 00 16 F1 21 03 00 03 F1 21 08 00 03 +T 00 3F 00 00 05 80 CD +R 00 00 00 16 F1 21 02 00 03 +T 00 42 +R 00 00 00 16 +T 00 42 E5 00 00 00 24 EA F5 00 00 00 E5 +R 00 00 00 16 F1 21 03 00 03 F1 21 09 00 03 +T 00 49 00 00 01 34 FF F5 00 00 01 E5 +R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03 +T 00 4F 00 00 02 34 FF F5 00 00 02 E5 +R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03 +T 00 55 00 00 03 34 FF F5 00 00 03 80 AE +R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03 diff --git a/demo/demo_c_0.rst b/demo/demo_c_0.rst new file mode 100644 index 0000000..cc9b36a --- /dev/null +++ b/demo/demo_c_0.rst @@ -0,0 +1,529 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Tue Oct 27 23:03:10 2009 + 5 ;-------------------------------------------------------- + 6 .module demo_c_0 + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _someFunction + 14 .globl _CY + 15 .globl _AC + 16 .globl _F0 + 17 .globl _RS1 + 18 .globl _RS0 + 19 .globl _OV + 20 .globl _FL + 21 .globl _P + 22 .globl _PS + 23 .globl _PT1 + 24 .globl _PX1 + 25 .globl _PT0 + 26 .globl _PX0 + 27 .globl _RD + 28 .globl _WR + 29 .globl _T1 + 30 .globl _T0 + 31 .globl _INT1 + 32 .globl _INT0 + 33 .globl _TXD + 34 .globl _RXD + 35 .globl _P3_7 + 36 .globl _P3_6 + 37 .globl _P3_5 + 38 .globl _P3_4 + 39 .globl _P3_3 + 40 .globl _P3_2 + 41 .globl _P3_1 + 42 .globl _P3_0 + 43 .globl _EA + 44 .globl _ES + 45 .globl _ET1 + 46 .globl _EX1 + 47 .globl _ET0 + 48 .globl _EX0 + 49 .globl _P2_7 + 50 .globl _P2_6 + 51 .globl _P2_5 + 52 .globl _P2_4 + 53 .globl _P2_3 + 54 .globl _P2_2 + 55 .globl _P2_1 + 56 .globl _P2_0 + 57 .globl _SM0 + 58 .globl _SM1 + 59 .globl _SM2 + 60 .globl _REN + 61 .globl _TB8 + 62 .globl _RB8 + 63 .globl _TI + 64 .globl _RI + 65 .globl _P1_7 + 66 .globl _P1_6 + 67 .globl _P1_5 + 68 .globl _P1_4 + 69 .globl _P1_3 + 70 .globl _P1_2 + 71 .globl _P1_1 + 72 .globl _P1_0 + 73 .globl _TF1 + 74 .globl _TR1 + 75 .globl _TF0 + 76 .globl _TR0 + 77 .globl _IE1 + 78 .globl _IT1 + 79 .globl _IE0 + 80 .globl _IT0 + 81 .globl _P0_7 + 82 .globl _P0_6 + 83 .globl _P0_5 + 84 .globl _P0_4 + 85 .globl _P0_3 + 86 .globl _P0_2 + 87 .globl _P0_1 + 88 .globl _P0_0 + 89 .globl _B + 90 .globl _A + 91 .globl _ACC + 92 .globl _PSW + 93 .globl _IP + 94 .globl _P3 + 95 .globl _IE + 96 .globl _P2 + 97 .globl _SBUF + 98 .globl _SCON + 99 .globl _P1 + 100 .globl _TH1 + 101 .globl _TH0 + 102 .globl _TL1 + 103 .globl _TL0 + 104 .globl _TMOD + 105 .globl _TCON + 106 .globl _PCON + 107 .globl _DPH + 108 .globl _DPL + 109 .globl _SP + 110 .globl _P0 + 111 .globl _i + 112 .globl _some_variable + 113 ;-------------------------------------------------------- + 114 ; special function registers + 115 ;-------------------------------------------------------- + 116 .area RSEG (DATA) + 0080 117 G$P0$0$0 == 0x0080 + 0080 118 _P0 = 0x0080 + 0081 119 G$SP$0$0 == 0x0081 + 0081 120 _SP = 0x0081 + 0082 121 G$DPL$0$0 == 0x0082 + 0082 122 _DPL = 0x0082 + 0083 123 G$DPH$0$0 == 0x0083 + 0083 124 _DPH = 0x0083 + 0087 125 G$PCON$0$0 == 0x0087 + 0087 126 _PCON = 0x0087 + 0088 127 G$TCON$0$0 == 0x0088 + 0088 128 _TCON = 0x0088 + 0089 129 G$TMOD$0$0 == 0x0089 + 0089 130 _TMOD = 0x0089 + 008A 131 G$TL0$0$0 == 0x008a + 008A 132 _TL0 = 0x008a + 008B 133 G$TL1$0$0 == 0x008b + 008B 134 _TL1 = 0x008b + 008C 135 G$TH0$0$0 == 0x008c + 008C 136 _TH0 = 0x008c + 008D 137 G$TH1$0$0 == 0x008d + 008D 138 _TH1 = 0x008d + 0090 139 G$P1$0$0 == 0x0090 + 0090 140 _P1 = 0x0090 + 0098 141 G$SCON$0$0 == 0x0098 + 0098 142 _SCON = 0x0098 + 0099 143 G$SBUF$0$0 == 0x0099 + 0099 144 _SBUF = 0x0099 + 00A0 145 G$P2$0$0 == 0x00a0 + 00A0 146 _P2 = 0x00a0 + 00A8 147 G$IE$0$0 == 0x00a8 + 00A8 148 _IE = 0x00a8 + 00B0 149 G$P3$0$0 == 0x00b0 + 00B0 150 _P3 = 0x00b0 + 00B8 151 G$IP$0$0 == 0x00b8 + 00B8 152 _IP = 0x00b8 + 00D0 153 G$PSW$0$0 == 0x00d0 + 00D0 154 _PSW = 0x00d0 + 00E0 155 G$ACC$0$0 == 0x00e0 + 00E0 156 _ACC = 0x00e0 + 00E0 157 G$A$0$0 == 0x00e0 + 00E0 158 _A = 0x00e0 + 00F0 159 G$B$0$0 == 0x00f0 + 00F0 160 _B = 0x00f0 + 161 ;-------------------------------------------------------- + 162 ; special function bits + 163 ;-------------------------------------------------------- + 164 .area RSEG (DATA) + 0080 165 G$P0_0$0$0 == 0x0080 + 0080 166 _P0_0 = 0x0080 + 0081 167 G$P0_1$0$0 == 0x0081 + 0081 168 _P0_1 = 0x0081 + 0082 169 G$P0_2$0$0 == 0x0082 + 0082 170 _P0_2 = 0x0082 + 0083 171 G$P0_3$0$0 == 0x0083 + 0083 172 _P0_3 = 0x0083 + 0084 173 G$P0_4$0$0 == 0x0084 + 0084 174 _P0_4 = 0x0084 + 0085 175 G$P0_5$0$0 == 0x0085 + 0085 176 _P0_5 = 0x0085 + 0086 177 G$P0_6$0$0 == 0x0086 + 0086 178 _P0_6 = 0x0086 + 0087 179 G$P0_7$0$0 == 0x0087 + 0087 180 _P0_7 = 0x0087 + 0088 181 G$IT0$0$0 == 0x0088 + 0088 182 _IT0 = 0x0088 + 0089 183 G$IE0$0$0 == 0x0089 + 0089 184 _IE0 = 0x0089 + 008A 185 G$IT1$0$0 == 0x008a + 008A 186 _IT1 = 0x008a + 008B 187 G$IE1$0$0 == 0x008b + 008B 188 _IE1 = 0x008b + 008C 189 G$TR0$0$0 == 0x008c + 008C 190 _TR0 = 0x008c + 008D 191 G$TF0$0$0 == 0x008d + 008D 192 _TF0 = 0x008d + 008E 193 G$TR1$0$0 == 0x008e + 008E 194 _TR1 = 0x008e + 008F 195 G$TF1$0$0 == 0x008f + 008F 196 _TF1 = 0x008f + 0090 197 G$P1_0$0$0 == 0x0090 + 0090 198 _P1_0 = 0x0090 + 0091 199 G$P1_1$0$0 == 0x0091 + 0091 200 _P1_1 = 0x0091 + 0092 201 G$P1_2$0$0 == 0x0092 + 0092 202 _P1_2 = 0x0092 + 0093 203 G$P1_3$0$0 == 0x0093 + 0093 204 _P1_3 = 0x0093 + 0094 205 G$P1_4$0$0 == 0x0094 + 0094 206 _P1_4 = 0x0094 + 0095 207 G$P1_5$0$0 == 0x0095 + 0095 208 _P1_5 = 0x0095 + 0096 209 G$P1_6$0$0 == 0x0096 + 0096 210 _P1_6 = 0x0096 + 0097 211 G$P1_7$0$0 == 0x0097 + 0097 212 _P1_7 = 0x0097 + 0098 213 G$RI$0$0 == 0x0098 + 0098 214 _RI = 0x0098 + 0099 215 G$TI$0$0 == 0x0099 + 0099 216 _TI = 0x0099 + 009A 217 G$RB8$0$0 == 0x009a + 009A 218 _RB8 = 0x009a + 009B 219 G$TB8$0$0 == 0x009b + 009B 220 _TB8 = 0x009b + 009C 221 G$REN$0$0 == 0x009c + 009C 222 _REN = 0x009c + 009D 223 G$SM2$0$0 == 0x009d + 009D 224 _SM2 = 0x009d + 009E 225 G$SM1$0$0 == 0x009e + 009E 226 _SM1 = 0x009e + 009F 227 G$SM0$0$0 == 0x009f + 009F 228 _SM0 = 0x009f + 00A0 229 G$P2_0$0$0 == 0x00a0 + 00A0 230 _P2_0 = 0x00a0 + 00A1 231 G$P2_1$0$0 == 0x00a1 + 00A1 232 _P2_1 = 0x00a1 + 00A2 233 G$P2_2$0$0 == 0x00a2 + 00A2 234 _P2_2 = 0x00a2 + 00A3 235 G$P2_3$0$0 == 0x00a3 + 00A3 236 _P2_3 = 0x00a3 + 00A4 237 G$P2_4$0$0 == 0x00a4 + 00A4 238 _P2_4 = 0x00a4 + 00A5 239 G$P2_5$0$0 == 0x00a5 + 00A5 240 _P2_5 = 0x00a5 + 00A6 241 G$P2_6$0$0 == 0x00a6 + 00A6 242 _P2_6 = 0x00a6 + 00A7 243 G$P2_7$0$0 == 0x00a7 + 00A7 244 _P2_7 = 0x00a7 + 00A8 245 G$EX0$0$0 == 0x00a8 + 00A8 246 _EX0 = 0x00a8 + 00A9 247 G$ET0$0$0 == 0x00a9 + 00A9 248 _ET0 = 0x00a9 + 00AA 249 G$EX1$0$0 == 0x00aa + 00AA 250 _EX1 = 0x00aa + 00AB 251 G$ET1$0$0 == 0x00ab + 00AB 252 _ET1 = 0x00ab + 00AC 253 G$ES$0$0 == 0x00ac + 00AC 254 _ES = 0x00ac + 00AF 255 G$EA$0$0 == 0x00af + 00AF 256 _EA = 0x00af + 00B0 257 G$P3_0$0$0 == 0x00b0 + 00B0 258 _P3_0 = 0x00b0 + 00B1 259 G$P3_1$0$0 == 0x00b1 + 00B1 260 _P3_1 = 0x00b1 + 00B2 261 G$P3_2$0$0 == 0x00b2 + 00B2 262 _P3_2 = 0x00b2 + 00B3 263 G$P3_3$0$0 == 0x00b3 + 00B3 264 _P3_3 = 0x00b3 + 00B4 265 G$P3_4$0$0 == 0x00b4 + 00B4 266 _P3_4 = 0x00b4 + 00B5 267 G$P3_5$0$0 == 0x00b5 + 00B5 268 _P3_5 = 0x00b5 + 00B6 269 G$P3_6$0$0 == 0x00b6 + 00B6 270 _P3_6 = 0x00b6 + 00B7 271 G$P3_7$0$0 == 0x00b7 + 00B7 272 _P3_7 = 0x00b7 + 00B0 273 G$RXD$0$0 == 0x00b0 + 00B0 274 _RXD = 0x00b0 + 00B1 275 G$TXD$0$0 == 0x00b1 + 00B1 276 _TXD = 0x00b1 + 00B2 277 G$INT0$0$0 == 0x00b2 + 00B2 278 _INT0 = 0x00b2 + 00B3 279 G$INT1$0$0 == 0x00b3 + 00B3 280 _INT1 = 0x00b3 + 00B4 281 G$T0$0$0 == 0x00b4 + 00B4 282 _T0 = 0x00b4 + 00B5 283 G$T1$0$0 == 0x00b5 + 00B5 284 _T1 = 0x00b5 + 00B6 285 G$WR$0$0 == 0x00b6 + 00B6 286 _WR = 0x00b6 + 00B7 287 G$RD$0$0 == 0x00b7 + 00B7 288 _RD = 0x00b7 + 00B8 289 G$PX0$0$0 == 0x00b8 + 00B8 290 _PX0 = 0x00b8 + 00B9 291 G$PT0$0$0 == 0x00b9 + 00B9 292 _PT0 = 0x00b9 + 00BA 293 G$PX1$0$0 == 0x00ba + 00BA 294 _PX1 = 0x00ba + 00BB 295 G$PT1$0$0 == 0x00bb + 00BB 296 _PT1 = 0x00bb + 00BC 297 G$PS$0$0 == 0x00bc + 00BC 298 _PS = 0x00bc + 00D0 299 G$P$0$0 == 0x00d0 + 00D0 300 _P = 0x00d0 + 00D1 301 G$FL$0$0 == 0x00d1 + 00D1 302 _FL = 0x00d1 + 00D2 303 G$OV$0$0 == 0x00d2 + 00D2 304 _OV = 0x00d2 + 00D3 305 G$RS0$0$0 == 0x00d3 + 00D3 306 _RS0 = 0x00d3 + 00D4 307 G$RS1$0$0 == 0x00d4 + 00D4 308 _RS1 = 0x00d4 + 00D5 309 G$F0$0$0 == 0x00d5 + 00D5 310 _F0 = 0x00d5 + 00D6 311 G$AC$0$0 == 0x00d6 + 00D6 312 _AC = 0x00d6 + 00D7 313 G$CY$0$0 == 0x00d7 + 00D7 314 _CY = 0x00d7 + 315 ;-------------------------------------------------------- + 316 ; overlayable register banks + 317 ;-------------------------------------------------------- + 318 .area REG_BANK_0 (REL,OVR,DATA) + 0000 319 .ds 8 + 320 ;-------------------------------------------------------- + 321 ; internal ram data + 322 ;-------------------------------------------------------- + 323 .area DSEG (DATA) + 0000 324 G$some_variable$0$0==. + 0008 325 _some_variable:: + 0008 326 .ds 4 + 0004 327 G$i$0$0==. + 000C 328 _i:: + 000C 329 .ds 2 + 330 ;-------------------------------------------------------- + 331 ; overlayable items in internal ram + 332 ;-------------------------------------------------------- + 333 .area OSEG (OVR,DATA) + 334 ;-------------------------------------------------------- + 335 ; Stack segment in internal ram + 336 ;-------------------------------------------------------- + 337 .area SSEG (DATA) + 000E 338 __start__stack: + 000E 339 .ds 1 + 340 + 341 ;-------------------------------------------------------- + 342 ; indirectly addressable internal ram data + 343 ;-------------------------------------------------------- + 344 .area ISEG (DATA) + 345 ;-------------------------------------------------------- + 346 ; absolute internal ram data + 347 ;-------------------------------------------------------- + 348 .area IABS (ABS,DATA) + 349 .area IABS (ABS,DATA) + 350 ;-------------------------------------------------------- + 351 ; bit data + 352 ;-------------------------------------------------------- + 353 .area BSEG (BIT) + 354 ;-------------------------------------------------------- + 355 ; paged external ram data + 356 ;-------------------------------------------------------- + 357 .area PSEG (PAG,XDATA) + 358 ;-------------------------------------------------------- + 359 ; external ram data + 360 ;-------------------------------------------------------- + 361 .area XSEG (XDATA) + 362 ;-------------------------------------------------------- + 363 ; absolute external ram data + 364 ;-------------------------------------------------------- + 365 .area XABS (ABS,XDATA) + 366 ;-------------------------------------------------------- + 367 ; external initialized ram data + 368 ;-------------------------------------------------------- + 369 .area XISEG (XDATA) + 370 .area HOME (CODE) + 371 .area GSINIT0 (CODE) + 372 .area GSINIT1 (CODE) + 373 .area GSINIT2 (CODE) + 374 .area GSINIT3 (CODE) + 375 .area GSINIT4 (CODE) + 376 .area GSINIT5 (CODE) + 377 .area GSINIT (CODE) + 378 .area GSFINAL (CODE) + 379 .area CSEG (CODE) + 380 ;-------------------------------------------------------- + 381 ; interrupt vector + 382 ;-------------------------------------------------------- + 383 .area HOME (CODE) + 0000 384 __interrupt_vect: + 0000 02 00 08 385 ljmp __sdcc_gsinit_startup + 386 ;-------------------------------------------------------- + 387 ; global & static initialisations + 388 ;-------------------------------------------------------- + 389 .area HOME (CODE) + 390 .area GSINIT (CODE) + 391 .area GSFINAL (CODE) + 392 .area GSINIT (CODE) + 393 .globl __sdcc_gsinit_startup + 394 .globl __sdcc_program_startup + 395 .globl __start__stack + 396 .globl __mcs51_genXINIT + 397 .globl __mcs51_genXRAMCLEAR + 398 .globl __mcs51_genRAMCLEAR + 0000 399 G$main$0$0 ==. + 0000 400 C$demo_c_0.c$10$1$1 ==. + 401 ; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here + 0061 E4 402 clr a + 0062 F5 08 403 mov _some_variable,a + 0064 F5 09 404 mov (_some_variable + 1),a + 0066 F5 0A 405 mov (_some_variable + 2),a + 0068 F5 0B 406 mov (_some_variable + 3),a + 407 .area GSFINAL (CODE) + 006A 02 00 03 408 ljmp __sdcc_program_startup + 409 ;-------------------------------------------------------- + 410 ; Home + 411 ;-------------------------------------------------------- + 412 .area HOME (CODE) + 413 .area HOME (CODE) + 0003 414 __sdcc_program_startup: + 0003 12 00 77 415 lcall _main + 416 ; return from main will lock up + 0006 80 FE 417 sjmp . + 418 ;-------------------------------------------------------- + 419 ; code + 420 ;-------------------------------------------------------- + 421 .area CSEG (CODE) + 422 ;------------------------------------------------------------ + 423 ;Allocation info for local variables in function 'someFunction' + 424 ;------------------------------------------------------------ + 425 ;somevalue Allocated to registers r2 + 426 ;------------------------------------------------------------ + 0000 427 G$someFunction$0$0 ==. + 0000 428 C$demo_c_0.c$20$0$0 ==. + 429 ; demo_c_0.c:20: void someFunction(unsigned char somevalue) + 430 ; ----------------------------------------- + 431 ; function someFunction + 432 ; ----------------------------------------- + 006D 433 _someFunction: + 0002 434 ar2 = 0x02 + 0003 435 ar3 = 0x03 + 0004 436 ar4 = 0x04 + 0005 437 ar5 = 0x05 + 0006 438 ar6 = 0x06 + 0007 439 ar7 = 0x07 + 0000 440 ar0 = 0x00 + 0001 441 ar1 = 0x01 + 006D AA 82 442 mov r2,dpl + 0002 443 C$demo_c_0.c$23$1$1 ==. + 444 ; demo_c_0.c:23: P1=somevalue; + 006F 8A 90 445 mov _P1,r2 + 0004 446 C$demo_c_0.c$24$1$1 ==. + 447 ; demo_c_0.c:24: P3=somevalue^0xFF; + 0071 74 FF 448 mov a,#0xFF + 0073 6A 449 xrl a,r2 + 0074 F5 B0 450 mov _P3,a + 0009 451 C$demo_c_0.c$25$1$1 ==. + 0009 452 XG$someFunction$0$0 ==. + 0076 22 453 ret + 454 ;------------------------------------------------------------ + 455 ;Allocation info for local variables in function 'main' + 456 ;------------------------------------------------------------ + 457 ;------------------------------------------------------------ + 000A 458 G$main$0$0 ==. + 000A 459 C$demo_c_0.c$28$1$1 ==. + 460 ; demo_c_0.c:28: int main() + 461 ; ----------------------------------------- + 462 ; function main + 463 ; ----------------------------------------- + 0077 464 _main: + 000A 465 C$demo_c_0.c$31$1$1 ==. + 466 ; demo_c_0.c:31: while(1) { + 0077 467 00102$: + 000A 468 C$demo_c_0.c$32$2$2 ==. + 469 ; demo_c_0.c:32: for(i=0; i<255; i++) { + 0077 E4 470 clr a + 0078 F5 0C 471 mov _i,a + 007A F5 0D 472 mov (_i + 1),a + 007C 473 00104$: + 007C C3 474 clr c + 007D E5 0C 475 mov a,_i + 007F 94 FF 476 subb a,#0xFF + 0081 E5 0D 477 mov a,(_i + 1) + 0083 64 80 478 xrl a,#0x80 + 0085 94 80 479 subb a,#0x80 + 0087 50 26 480 jnc 00107$ + 001C 481 C$demo_c_0.c$33$3$3 ==. + 482 ; demo_c_0.c:33: someFunction(i+2); + 0089 AA 0C 483 mov r2,_i + 008B 74 02 484 mov a,#0x02 + 008D 2A 485 add a,r2 + 008E F5 82 486 mov dpl,a + 0090 12 00 6D 487 lcall _someFunction + 0026 488 C$demo_c_0.c$34$3$3 ==. + 489 ; demo_c_0.c:34: some_variable++; + 0093 05 08 490 inc _some_variable + 0095 E4 491 clr a + 0096 B5 08 0C 492 cjne a,_some_variable,00114$ + 0099 05 09 493 inc (_some_variable + 1) + 009B B5 09 07 494 cjne a,(_some_variable + 1),00114$ + 009E 05 0A 495 inc (_some_variable + 2) + 00A0 B5 0A 02 496 cjne a,(_some_variable + 2),00114$ + 00A3 05 0B 497 inc (_some_variable + 3) + 00A5 498 00114$: + 0038 499 C$demo_c_0.c$32$2$2 ==. + 500 ; demo_c_0.c:32: for(i=0; i<255; i++) { + 00A5 05 0C 501 inc _i + 00A7 E4 502 clr a + 00A8 B5 0C D1 503 cjne a,_i,00104$ + 00AB 05 0D 504 inc (_i + 1) + 00AD 80 CD 505 sjmp 00104$ + 00AF 506 00107$: + 0042 507 C$demo_c_0.c$36$2$2 ==. + 508 ; demo_c_0.c:36: some_variable-=22; + 00AF E5 08 509 mov a,_some_variable + 00B1 24 EA 510 add a,#0xea + 00B3 F5 08 511 mov _some_variable,a + 00B5 E5 09 512 mov a,(_some_variable + 1) + 00B7 34 FF 513 addc a,#0xff + 00B9 F5 09 514 mov (_some_variable + 1),a + 00BB E5 0A 515 mov a,(_some_variable + 2) + 00BD 34 FF 516 addc a,#0xff + 00BF F5 0A 517 mov (_some_variable + 2),a + 00C1 E5 0B 518 mov a,(_some_variable + 3) + 00C3 34 FF 519 addc a,#0xff + 00C5 F5 0B 520 mov (_some_variable + 3),a + 005A 521 C$demo_c_0.c$40$1$1 ==. + 522 ; demo_c_0.c:40: return 0; + 005A 523 C$demo_c_0.c$41$1$1 ==. + 005A 524 XG$main$0$0 ==. + 00C7 80 AE 525 sjmp 00102$ + 526 .area CSEG (CODE) + 527 .area CONST (CODE) + 528 .area XINIT (CODE) + 529 .area CABS (ABS,CODE) diff --git a/demo/demo_c_0.sym b/demo/demo_c_0.sym new file mode 100644 index 0000000..9d943ba --- /dev/null +++ b/demo/demo_c_0.sym @@ -0,0 +1,659 @@ + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 1. + +Symbol Table + + A 00D6 + D A$demo_c_0$385 0000 GR + 14 A$demo_c_0$402 0000 GR + 14 A$demo_c_0$403 0001 GR + 14 A$demo_c_0$404 0003 GR + 14 A$demo_c_0$405 0005 GR + 14 A$demo_c_0$406 0007 GR + 15 A$demo_c_0$408 0000 GR + D A$demo_c_0$415 0003 GR + D A$demo_c_0$417 0006 GR + 16 A$demo_c_0$442 0000 GR + 16 A$demo_c_0$445 0002 GR + 16 A$demo_c_0$448 0004 GR + 16 A$demo_c_0$449 0006 GR + 16 A$demo_c_0$450 0007 GR + 16 A$demo_c_0$453 0009 GR + 16 A$demo_c_0$470 000A GR + 16 A$demo_c_0$471 000B GR + 16 A$demo_c_0$472 000D GR + 16 A$demo_c_0$474 000F GR + 16 A$demo_c_0$475 0010 GR + 16 A$demo_c_0$476 0012 GR + 16 A$demo_c_0$477 0014 GR + 16 A$demo_c_0$478 0016 GR + 16 A$demo_c_0$479 0018 GR + 16 A$demo_c_0$480 001A GR + 16 A$demo_c_0$483 001C GR + 16 A$demo_c_0$484 001E GR + 16 A$demo_c_0$485 0020 GR + 16 A$demo_c_0$486 0021 GR + 16 A$demo_c_0$487 0023 GR + 16 A$demo_c_0$490 0026 GR + 16 A$demo_c_0$491 0028 GR + 16 A$demo_c_0$492 0029 GR + 16 A$demo_c_0$493 002C GR + 16 A$demo_c_0$494 002E GR + 16 A$demo_c_0$495 0031 GR + 16 A$demo_c_0$496 0033 GR + 16 A$demo_c_0$497 0036 GR + 16 A$demo_c_0$501 0038 GR + 16 A$demo_c_0$502 003A GR + 16 A$demo_c_0$503 003B GR + 16 A$demo_c_0$504 003E GR + 16 A$demo_c_0$505 0040 GR + 16 A$demo_c_0$509 0042 GR + 16 A$demo_c_0$510 0044 GR + 16 A$demo_c_0$511 0046 GR + 16 A$demo_c_0$512 0048 GR + 16 A$demo_c_0$513 004A GR + 16 A$demo_c_0$514 004C GR + 16 A$demo_c_0$515 004E GR + 16 A$demo_c_0$516 0050 GR + 16 A$demo_c_0$517 0052 GR + 16 A$demo_c_0$518 0054 GR + 16 A$demo_c_0$519 0056 GR + 16 A$demo_c_0$520 0058 GR + 16 A$demo_c_0$525 005A GR + AC 00D6 + ACC 00E0 + ACC.0 00E0 + ACC.1 00E1 + ACC.2 00E2 + ACC.3 00E3 + ACC.4 00E4 + ACC.5 00E5 + ACC.6 00E6 + ACC.7 00E7 + B 00F0 + B.0 00F0 + B.1 00F1 + B.2 00F2 + B.3 00F3 + B.4 00F4 + B.5 00F5 + B.6 00F6 + B.7 00F7 + 14 C$demo_c_0.c$10$1$1 = 0000 GR + 16 C$demo_c_0.c$20$0$0 = 0000 GR + 16 C$demo_c_0.c$23$1$1 = 0002 GR + 16 C$demo_c_0.c$24$1$1 = 0004 GR + 16 C$demo_c_0.c$25$1$1 = 0009 GR + 16 C$demo_c_0.c$28$1$1 = 000A GR + 16 C$demo_c_0.c$31$1$1 = 000A GR + 16 C$demo_c_0.c$32$2$2 = 0038 GR + 16 C$demo_c_0.c$33$3$3 = 001C GR + 16 C$demo_c_0.c$34$3$3 = 0026 GR + 16 C$demo_c_0.c$36$2$2 = 0042 GR + 16 C$demo_c_0.c$40$1$1 = 005A GR + 16 C$demo_c_0.c$41$1$1 = 005A GR + CPRL2 00C8 + CT2 00C9 + CY 00D7 + DPH 0083 + DPL 0082 + EA 00AF + ES 00AC + ET0 00A9 + ET1 00AB + ET2 00AD + EX0 00A8 + EX1 00AA + EXEN2 00CB + EXF2 00CE + F0 00D5 + G$A$0$0 = 00E0 G + G$AC$0$0 = 00D6 G + G$ACC$0$0 = 00E0 G + G$B$0$0 = 00F0 G + G$CY$0$0 = 00D7 G + G$DPH$0$0 = 0083 G + G$DPL$0$0 = 0082 G + G$EA$0$0 = 00AF G + G$ES$0$0 = 00AC G + G$ET0$0$0 = 00A9 G + G$ET1$0$0 = 00AB G + G$EX0$0$0 = 00A8 G + G$EX1$0$0 = 00AA G + G$F0$0$0 = 00D5 G + G$FL$0$0 = 00D1 G + G$IE$0$0 = 00A8 G + G$IE0$0$0 = 0089 G + G$IE1$0$0 = 008B G + G$INT0$0$0 = 00B2 G + G$INT1$0$0 = 00B3 G + G$IP$0$0 = 00B8 G + G$IT0$0$0 = 0088 G + G$IT1$0$0 = 008A G + G$OV$0$0 = 00D2 G + G$P$0$0 = 00D0 G + G$P0$0$0 = 0080 G + G$P0_0$0$0 = 0080 G + G$P0_1$0$0 = 0081 G + G$P0_2$0$0 = 0082 G + G$P0_3$0$0 = 0083 G + G$P0_4$0$0 = 0084 G + G$P0_5$0$0 = 0085 G + G$P0_6$0$0 = 0086 G + G$P0_7$0$0 = 0087 G + G$P1$0$0 = 0090 G + G$P1_0$0$0 = 0090 G + G$P1_1$0$0 = 0091 G + G$P1_2$0$0 = 0092 G + G$P1_3$0$0 = 0093 G + G$P1_4$0$0 = 0094 G + G$P1_5$0$0 = 0095 G + G$P1_6$0$0 = 0096 G + G$P1_7$0$0 = 0097 G + G$P2$0$0 = 00A0 G + G$P2_0$0$0 = 00A0 G + G$P2_1$0$0 = 00A1 G + G$P2_2$0$0 = 00A2 G + G$P2_3$0$0 = 00A3 G + G$P2_4$0$0 = 00A4 G + G$P2_5$0$0 = 00A5 G + G$P2_6$0$0 = 00A6 G + G$P2_7$0$0 = 00A7 G + G$P3$0$0 = 00B0 G + G$P3_0$0$0 = 00B0 G + G$P3_1$0$0 = 00B1 G + G$P3_2$0$0 = 00B2 G + G$P3_3$0$0 = 00B3 G + G$P3_4$0$0 = 00B4 G + G$P3_5$0$0 = 00B5 G + G$P3_6$0$0 = 00B6 G + G$P3_7$0$0 = 00B7 G + G$PCON$0$0 = 0087 G + G$PS$0$0 = 00BC G + G$PSW$0$0 = 00D0 G + G$PT0$0$0 = 00B9 G + G$PT1$0$0 = 00BB G + G$PX0$0$0 = 00B8 G + G$PX1$0$0 = 00BA G + G$RB8$0$0 = 009A G + G$RD$0$0 = 00B7 G + G$REN$0$0 = 009C G + G$RI$0$0 = 0098 G + G$RS0$0$0 = 00D3 G + G$RS1$0$0 = 00D4 G + G$RXD$0$0 = 00B0 G + G$SBUF$0$0 = 0099 G + G$SCON$0$0 = 0098 G + G$SM0$0$0 = 009F G + G$SM1$0$0 = 009E G + G$SM2$0$0 = 009D G + G$SP$0$0 = 0081 G + G$T0$0$0 = 00B4 G + G$T1$0$0 = 00B5 G + G$TB8$0$0 = 009B G + G$TCON$0$0 = 0088 G + G$TF0$0$0 = 008D G + G$TF1$0$0 = 008F G + G$TH0$0$0 = 008C G + G$TH1$0$0 = 008D G + G$TI$0$0 = 0099 G + G$TL0$0$0 = 008A G + G$TL1$0$0 = 008B G + G$TMOD$0$0 = 0089 G + G$TR0$0$0 = 008C G + G$TR1$0$0 = 008E G + G$TXD$0$0 = 00B1 G + G$WR$0$0 = 00B6 G + 3 G$i$0$0 = 0004 GR + 16 G$main$0$0 = 000A GR + 16 G$someFunction$0$0 = 0000 GR + 3 G$some_variable$0$0 = 0000 GR + IE 00A8 + IE.0 00A8 + IE.1 00A9 + IE.2 00AA + IE.3 00AB + IE.4 00AC + IE.5 00AD + IE.7 00AF + IE0 0089 + IE1 008B + INT0 00B2 + INT1 00B3 + IP 00B8 + IP.0 00B8 + IP.1 00B9 + IP.2 00BA + IP.3 00BB + IP.4 00BC + IP.5 00BD + IT0 0088 + IT1 008A + OV 00D2 + P 00D0 + P0 0080 + P0.0 0080 + P0.1 0081 + P0.2 0082 + P0.3 0083 + P0.4 0084 + P0.5 0085 + P0.6 0086 + P0.7 0087 + P1 0090 + P1.0 0090 + P1.1 0091 + P1.2 0092 + P1.3 0093 + P1.4 0094 + P1.5 0095 + P1.6 0096 + P1.7 0097 + P2 00A0 + P2.0 00A0 + P2.1 00A1 + P2.2 00A2 + P2.3 00A3 + P2.4 00A4 + P2.5 00A5 + P2.6 00A6 + P2.7 00A7 + P3 00B0 + P3.0 00B0 + P3.1 00B1 + P3.2 00B2 + P3.3 00B3 + P3.4 00B4 + P3.5 00B5 + P3.6 00B6 + P3.7 00B7 + PCON 0087 + PS 00BC + PSW 00D0 + PSW.0 00D0 + PSW.1 00D1 + PSW.2 00D2 + PSW.3 00D3 + PSW.4 00D4 + PSW.5 00D5 + PSW.6 00D6 + PSW.7 00D7 + PT0 00B9 + PT1 00BB + PT2 00BD + PX0 00B8 + PX1 00BA + RB8 009A + RCAP2H 00CB + RCAP2L 00CA + RCLK 00CD + REN 009C + RI 0098 + RS0 00D3 + RS1 00D4 + RXD 00B0 + SBUF 0099 + SCON 0098 + SCON.0 0098 + SCON.1 0099 + SCON.2 009A + SCON.3 009B + SCON.4 009C + SCON.5 009D + SCON.6 009E + SCON.7 009F + SM0 009F + SM1 009E + SM2 009D + SP 0081 + T2CON 00C8 + T2CON.0 00C8 + T2CON.1 00C9 + T2CON.2 00CA + T2CON.3 00CB + T2CON.4 00CC + T2CON.5 00CD + T2CON.6 00CE + T2CON.7 00CF + TB8 009B + TCLK 00CC + TCON 0088 + TCON.0 0088 + TCON.1 0089 + TCON.2 008A + TCON.3 008B + TCON.4 008C + TCON.5 008D + TCON.6 008E + TCON.7 008F + TF0 008D + TF1 008F + TF2 00CF + TH0 008C + TH1 008D + TH2 00CD + TI 0099 + TL0 008A + TL1 008B + TL2 00CC + TMOD 0089 + TR0 008C + TR1 008E + TR2 00CA + TXD 00B1 + 16 XG$main$0$0 = 005A GR + 16 XG$someFunction$0$0 = 0009 GR + _A = 00E0 G + _AC = 00D6 G + _ACC = 00E0 G + _B = 00F0 G + _CY = 00D7 G + _DPH = 0083 G + _DPL = 0082 G + _EA = 00AF G + _ES = 00AC G + _ET0 = 00A9 G + _ET1 = 00AB G + _EX0 = 00A8 G + _EX1 = 00AA G + _F0 = 00D5 G + _FL = 00D1 G + _IE = 00A8 G + _IE0 = 0089 G + _IE1 = 008B G + _INT0 = 00B2 G + _INT1 = 00B3 G + _IP = 00B8 G + _IT0 = 0088 G + _IT1 = 008A G + _OV = 00D2 G + _P = 00D0 G + _P0 = 0080 G + _P0_0 = 0080 G + _P0_1 = 0081 G + _P0_2 = 0082 G + _P0_3 = 0083 G + _P0_4 = 0084 G + _P0_5 = 0085 G + _P0_6 = 0086 G + _P0_7 = 0087 G + _P1 = 0090 G + _P1_0 = 0090 G + _P1_1 = 0091 G + _P1_2 = 0092 G + _P1_3 = 0093 G + _P1_4 = 0094 G + _P1_5 = 0095 G + _P1_6 = 0096 G + _P1_7 = 0097 G + _P2 = 00A0 G + _P2_0 = 00A0 G + _P2_1 = 00A1 G + _P2_2 = 00A2 G + _P2_3 = 00A3 G + _P2_4 = 00A4 G + _P2_5 = 00A5 G + _P2_6 = 00A6 G + _P2_7 = 00A7 G + _P3 = 00B0 G + _P3_0 = 00B0 G + _P3_1 = 00B1 G + _P3_2 = 00B2 G + _P3_3 = 00B3 G + _P3_4 = 00B4 G + _P3_5 = 00B5 G + _P3_6 = 00B6 G + _P3_7 = 00B7 G + _PCON = 0087 G + _PS = 00BC G + _PSW = 00D0 G + _PT0 = 00B9 G + _PT1 = 00BB G + _PX0 = 00B8 G + _PX1 = 00BA G + _RB8 = 009A G + _RD = 00B7 G + _REN = 009C G + _RI = 0098 G + _RS0 = 00D3 G + _RS1 = 00D4 G + _RXD = 00B0 G + _SBUF = 0099 G + _SCON = 0098 G + _SM0 = 009F G + _SM1 = 009E G + _SM2 = 009D G + _SP = 0081 G + _T0 = 00B4 G + _T1 = 00B5 G + _TB8 = 009B G + _TCON = 0088 G + _TF0 = 008D G + _TF1 = 008F G + _TH0 = 008C G + _TH1 = 008D G + _TI = 0099 G + _TL0 = 008A G + _TL1 = 008B G + _TMOD = 0089 G + _TR0 = 008C G + _TR1 = 008E G + _TXD = 00B1 G + _WR = 00B6 G + D __interrupt_vect 0000 R + __mcs51_genRAMCLEAR **** GX + __mcs51_genXINIT **** GX + __mcs51_genXRAMCLEAR **** GX + __sdcc_gsinit_startup **** GX + D __sdcc_program_startup 0003 GR + 5 __start__stack 0000 GR + 3 _i 0004 GR + 16 _main 000A GR + 16 _someFunction 0000 GR + 3 _some_variable 0000 GR + a 00D6 + ac 00D6 + acc 00E0 + acc.0 00E0 + acc.1 00E1 + acc.2 00E2 + acc.3 00E3 + acc.4 00E4 + acc.5 00E5 + acc.6 00E6 + acc.7 00E7 + ar0 = 0000 + ar1 = 0001 + ar2 = 0002 + ar3 = 0003 + ar4 = 0004 + ar5 = 0005 + ar6 = 0006 + ar7 = 0007 + b 00F0 + b.0 00F0 + b.1 00F1 + b.2 00F2 + b.3 00F3 + b.4 00F4 + b.5 00F5 + b.6 00F6 + b.7 00F7 + cprl2 00C8 + ct2 00C9 + cy 00D7 + dph 0083 + dpl 0082 + ea 00AF + es 00AC + et0 00A9 + et1 00AB + et2 00AD + ex0 00A8 + ex1 00AA + exen2 00CB + exf2 00CE + f0 00D5 + ie 00A8 + ie.0 00A8 + ie.1 00A9 + ie.2 00AA + ie.3 00AB + ie.4 00AC + ie.5 00AD + ie.7 00AF + ie0 0089 + ie1 008B + int0 00B2 + int1 00B3 + ip 00B8 + ip.0 00B8 + ip.1 00B9 + ip.2 00BA + ip.3 00BB + ip.4 00BC + ip.5 00BD + it0 0088 + it1 008A + ov 00D2 + p 00D0 + p0 0080 + p0.0 0080 + p0.1 0081 + p0.2 0082 + p0.3 0083 + p0.4 0084 + p0.5 0085 + p0.6 0086 + p0.7 0087 + p1 0090 + p1.0 0090 + p1.1 0091 + p1.2 0092 + p1.3 0093 + p1.4 0094 + p1.5 0095 + p1.6 0096 + p1.7 0097 + p2 00A0 + p2.0 00A0 + p2.1 00A1 + p2.2 00A2 + p2.3 00A3 + p2.4 00A4 + p2.5 00A5 + p2.6 00A6 + p2.7 00A7 + p3 00B0 + p3.0 00B0 + p3.1 00B1 + p3.2 00B2 + p3.3 00B3 + p3.4 00B4 + p3.5 00B5 + p3.6 00B6 + p3.7 00B7 + pcon 0087 + ps 00BC + psw 00D0 + psw.0 00D0 + psw.1 00D1 + psw.2 00D2 + psw.3 00D3 + psw.4 00D4 + psw.5 00D5 + psw.6 00D6 + psw.7 00D7 + pt0 00B9 + pt1 00BB + pt2 00BD + px0 00B8 + px1 00BA + rb8 009A + rcap2h 00CB + rcap2l 00CA + rclk 00CD + ren 009C + ri 0098 + rs0 00D3 + rs1 00D4 + rxd 00B0 + sbuf 0099 + scon 0098 + scon.0 0098 + scon.1 0099 + scon.2 009A + scon.3 009B + scon.4 009C + scon.5 009D + scon.6 009E + scon.7 009F + sm0 009F + sm1 009E + sm2 009D + sp 0081 + t2con 00C8 + t2con.0 00C8 + t2con.1 00C9 + t2con.2 00CA + t2con.3 00CB + t2con.4 00CC + t2con.5 00CD + t2con.6 00CE + t2con.7 00CF + tb8 009B + tclk 00CC + tcon 0088 + tcon.0 0088 + tcon.1 0089 + tcon.2 008A + tcon.3 008B + tcon.4 008C + tcon.5 008D + tcon.6 008E + tcon.7 008F + tf0 008D + tf1 008F + tf2 00CF + th0 008C + th1 008D + th2 00CD + ti 0099 + tl0 008A + tl1 008B + tl2 00CC + tmod 0089 + tr0 008C + tr1 008E + tr2 00CA + txd 00B1 + + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 2. + +Area Table + + 0 _CODE size 0 flags 0 + 1 RSEG size 0 flags 0 + 2 REG_BANK_0 size 8 flags 4 + 3 DSEG size 6 flags 0 + 4 OSEG size 0 flags 4 + 5 SSEG size 1 flags 0 + 6 ISEG size 0 flags 0 + 7 IABS size 0 flags 8 + 8 BSEG size 0 flags 80 + 9 PSEG size 0 flags 50 + A XSEG size 0 flags 40 + B XABS size 0 flags 48 + C XISEG size 0 flags 40 + D HOME size 8 flags 20 + E GSINIT0 size 0 flags 20 + F GSINIT1 size 0 flags 20 + 10 GSINIT2 size 0 flags 20 + 11 GSINIT3 size 0 flags 20 + 12 GSINIT4 size 0 flags 20 + 13 GSINIT5 size 0 flags 20 + 14 GSINIT size 9 flags 20 + 15 GSFINAL size 3 flags 20 + 16 CSEG size 5C flags 20 + 17 CONST size 0 flags 20 + 18 XINIT size 0 flags 20 + 19 CABS size 0 flags 28 diff --git a/demo/file.hex b/demo/file.hex new file mode 100644 index 0000000..b6d53b5 --- /dev/null +++ b/demo/file.hex @@ -0,0 +1,2 @@ +:0600000080FE33343334AE +:00000001FF
\ No newline at end of file diff --git a/demo/file.lst b/demo/file.lst new file mode 100644 index 0000000..5ca698c --- /dev/null +++ b/demo/file.lst @@ -0,0 +1,292 @@ +demo3 demo - 3 32/13/1907 PAGE 6 + 1 ; MCU 8051 IDE - Demostration code + 2 ; Compiler directives + 3 + 4 + 5 $DATE(32/13/1907)Â Â ; Places date + 6 ; $EJECT ; Places a fo + 7 ; $INCLUDE(file.asm) ; Inserts fil + 8 ; $LIST ; Allows list + 9 ; $NOLIST ; Stops outpu + 10 ; $NOMOD ; No predefin + demo3 demo - 3 32/13/1907 PAGE 7 + 11 $OBJECT(file.hex) ; Places obje + 12 ; $NOOBJECT ; No object f + 13 $PAGING ; Break outpu + 14 ; $NOPAGING ; Print listi + 15 $PAGELENGTH(10) ; No. of line + 16 $PAGEWIDTH(20) Â Â ; No. of colu + 17 $PRINT(file.lst) ; Places list + 18 ; $NOPRINT ; Listing wil + 19 ; $SYMBOLS ; Append symb + 20 ; $NOSYMBOLS ; Symbol tabl + demo3 demo - 3 32/13/1907 PAGE 8 + 21 $TITLE('demo - 3') ; Places stri + 22 + 23 + 24 ;; Summary of Cross Assembler Directi + 25 ;; ---------------------------------- + 26 + 0036 27 a EQU 54d ; Define symb + 001B 28 b0 DATA a / 2 ; Define inte + 0031 29 c IDATA (b0*2-5) ; Def + 0038 30 d BIT 070Q ; Define inte + demo3 demo - 3 32/13/1907 PAGE 9 + FFA5 31 e CODE 0FFA5h ; Define prog +****WARNING: Exceeding code memory capacity: e = 65445 + FFF2 33 var SET (A * 44) MOD 9 - 14 ; + 34 + 35 CSEG at 20h ; Select prog + 36 x: DB '34' ; Store byte + 37 y: DW 3334h ; Store word + 38 + 39 DSEG at 5d ; Select inte + 40 m: DS 1 ; Reserve byt + demo3 demo - 3 32/13/1907 PAGE 10 + 41 + 42 xseg ; Select exte + 43 n: DS 1 ; Reserve byt + 44 + 45 ISEG ; Select indi + 46 o: DS 1 ; Reserve byt + 47 + 48 NOLIST ; Disable code listin + 51 LIST ; Enable code listing + 52 + demo3 demo - 3 32/13/1907 PAGE 11 + 53 + 54 +1 mc macro label ; Define macr + 55 +1 sjmp main + 56 IF 2 <> 2 OR 1 = 4 + 57 EXITM ; Exit macro + 58 ENDIF + 59 sjmp label + 60 endm ; End of defi + 61 + 62 main: ORG 0 ; Set segment + demo3 demo - 3 32/13/1907 PAGE 12 + 63 IF 0 ; Begin conditional a + 64 USING 2 ; Sel + 65 ELSE ; Alternative conditi + 66 USING 2 ; Sel + 67 ENDIF ; End conditional ass + 68 + 69 mc main ; Macro instu + 70 + 71 END ; End of assembly lan +ASSEMBLY COMPLETE, NO ERRORS FOUND, 1 WARNING + + + + demo3 demo - 3 32/13/1907 PAGE 2 + +ERROR SUMMARY: +Line 31, WARNING: Exceeding code memory capacity: e = 65445 + demo3 demo - 3 32/13/1907 PAGE 3 + + + + + demo3 demo - 3 32/13/1907 PAGE 4 +SYMBOL TABLE: +A. . . . . . . . . . . . . . . . . . N NUMB 0036H NOT USED +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AR0. . . . . . . . . . . . . . . . . NUMB 0010H NOT USED REDEFINABLE +AR1. . . . . . . . . . . . . . . . . NUMB 0011H NOT USED REDEFINABLE +AR2. . . . . . . . . . . . . . . . . NUMB 0012H NOT USED REDEFINABLE +AR3. . . . . . . . . . . . . . . . . NUMB 0013H NOT USED REDEFINABLE +AR4. . . . . . . . . . . . . . . . . NUMB 0014H NOT USED REDEFINABLE +AR5. . . . . . . . . . . . . . . . . NUMB 0015H NOT USED REDEFINABLE +AR6. . . . . . . . . . . . . . . . . NUMB 0016H NOT USED REDEFINABLE +AR7. . . . . . . . . . . . . . . . . NUMB 0017H NOT USED REDEFINABLE +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED +B0 . . . . . . . . . . . . . . . . . D ADDR 001BH NOT USED +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +C. . . . . . . . . . . . . . . . . . I ADDR 0031H NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +D. . . . . . . . . . . . . . . . . . B ADDR 0038H NOT USED +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED + demo3 demo - 3 32/13/1907 PAGE 5 +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +E. . . . . . . . . . . . . . . . . . C ADDR FFA5H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +M. . . . . . . . . . . . . . . . . . D ADDR 0005H NOT USED +MAIN . . . . . . . . . . . . . . . . C ADDR 0000H +N. . . . . . . . . . . . . . . . . . X ADDR 0000H NOT USED +O. . . . . . . . . . . . . . . . . . I ADDR 0000H NOT USED +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED + demo3 demo - 3 32/13/1907 PAGE 6 +R. . . . . . . . . . . . . . . . . . B ADDR 0000H NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +VAR. . . . . . . . . . . . . . . . . NUMB FFF2H NOT USED REDEFINABLE +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED +X. . . . . . . . . . . . . . . . . . C ADDR 0002H NOT USED +Y. . . . . . . . . . . . . . . . . . C ADDR 0004H NOT USED
\ No newline at end of file diff --git a/demo/keypad_display b/demo/keypad_display Binary files differnew file mode 100644 index 0000000..4bea3f5 --- /dev/null +++ b/demo/keypad_display diff --git a/demo/keypad_display.adb b/demo/keypad_display.adb new file mode 100644 index 0000000..ff7f769 --- /dev/null +++ b/demo/keypad_display.adb @@ -0,0 +1,106 @@ +M:keypad_display +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +S:G$state$0$0({1}SC:S),E,0,0 +S:G$row$0$0({2}SI:S),E,0,0 +S:G$P0$0$0({1}SC:U),I,0,0 +S:G$SP$0$0({1}SC:U),I,0,0 +S:G$DPL$0$0({1}SC:U),I,0,0 +S:G$DPH$0$0({1}SC:U),I,0,0 +S:G$PCON$0$0({1}SC:U),I,0,0 +S:G$TCON$0$0({1}SC:U),I,0,0 +S:G$TMOD$0$0({1}SC:U),I,0,0 +S:G$TL0$0$0({1}SC:U),I,0,0 +S:G$TL1$0$0({1}SC:U),I,0,0 +S:G$TH0$0$0({1}SC:U),I,0,0 +S:G$TH1$0$0({1}SC:U),I,0,0 +S:G$P1$0$0({1}SC:U),I,0,0 +S:G$SCON$0$0({1}SC:U),I,0,0 +S:G$SBUF$0$0({1}SC:U),I,0,0 +S:G$P2$0$0({1}SC:U),I,0,0 +S:G$IE$0$0({1}SC:U),I,0,0 +S:G$P3$0$0({1}SC:U),I,0,0 +S:G$IP$0$0({1}SC:U),I,0,0 +S:G$PSW$0$0({1}SC:U),I,0,0 +S:G$ACC$0$0({1}SC:U),I,0,0 +S:G$B$0$0({1}SC:U),I,0,0 +S:G$P0_0$0$0({1}SX:U),J,0,0 +S:G$P0_1$0$0({1}SX:U),J,0,0 +S:G$P0_2$0$0({1}SX:U),J,0,0 +S:G$P0_3$0$0({1}SX:U),J,0,0 +S:G$P0_4$0$0({1}SX:U),J,0,0 +S:G$P0_5$0$0({1}SX:U),J,0,0 +S:G$P0_6$0$0({1}SX:U),J,0,0 +S:G$P0_7$0$0({1}SX:U),J,0,0 +S:G$IT0$0$0({1}SX:U),J,0,0 +S:G$IE0$0$0({1}SX:U),J,0,0 +S:G$IT1$0$0({1}SX:U),J,0,0 +S:G$IE1$0$0({1}SX:U),J,0,0 +S:G$TR0$0$0({1}SX:U),J,0,0 +S:G$TF0$0$0({1}SX:U),J,0,0 +S:G$TR1$0$0({1}SX:U),J,0,0 +S:G$TF1$0$0({1}SX:U),J,0,0 +S:G$P1_0$0$0({1}SX:U),J,0,0 +S:G$P1_1$0$0({1}SX:U),J,0,0 +S:G$P1_2$0$0({1}SX:U),J,0,0 +S:G$P1_3$0$0({1}SX:U),J,0,0 +S:G$P1_4$0$0({1}SX:U),J,0,0 +S:G$P1_5$0$0({1}SX:U),J,0,0 +S:G$P1_6$0$0({1}SX:U),J,0,0 +S:G$P1_7$0$0({1}SX:U),J,0,0 +S:G$RI$0$0({1}SX:U),J,0,0 +S:G$TI$0$0({1}SX:U),J,0,0 +S:G$RB8$0$0({1}SX:U),J,0,0 +S:G$TB8$0$0({1}SX:U),J,0,0 +S:G$REN$0$0({1}SX:U),J,0,0 +S:G$SM2$0$0({1}SX:U),J,0,0 +S:G$SM1$0$0({1}SX:U),J,0,0 +S:G$SM0$0$0({1}SX:U),J,0,0 +S:G$P2_0$0$0({1}SX:U),J,0,0 +S:G$P2_1$0$0({1}SX:U),J,0,0 +S:G$P2_2$0$0({1}SX:U),J,0,0 +S:G$P2_3$0$0({1}SX:U),J,0,0 +S:G$P2_4$0$0({1}SX:U),J,0,0 +S:G$P2_5$0$0({1}SX:U),J,0,0 +S:G$P2_6$0$0({1}SX:U),J,0,0 +S:G$P2_7$0$0({1}SX:U),J,0,0 +S:G$EX0$0$0({1}SX:U),J,0,0 +S:G$ET0$0$0({1}SX:U),J,0,0 +S:G$EX1$0$0({1}SX:U),J,0,0 +S:G$ET1$0$0({1}SX:U),J,0,0 +S:G$ES$0$0({1}SX:U),J,0,0 +S:G$EA$0$0({1}SX:U),J,0,0 +S:G$P3_0$0$0({1}SX:U),J,0,0 +S:G$P3_1$0$0({1}SX:U),J,0,0 +S:G$P3_2$0$0({1}SX:U),J,0,0 +S:G$P3_3$0$0({1}SX:U),J,0,0 +S:G$P3_4$0$0({1}SX:U),J,0,0 +S:G$P3_5$0$0({1}SX:U),J,0,0 +S:G$P3_6$0$0({1}SX:U),J,0,0 +S:G$P3_7$0$0({1}SX:U),J,0,0 +S:G$RXD$0$0({1}SX:U),J,0,0 +S:G$TXD$0$0({1}SX:U),J,0,0 +S:G$INT0$0$0({1}SX:U),J,0,0 +S:G$INT1$0$0({1}SX:U),J,0,0 +S:G$T0$0$0({1}SX:U),J,0,0 +S:G$T1$0$0({1}SX:U),J,0,0 +S:G$WR$0$0({1}SX:U),J,0,0 +S:G$RD$0$0({1}SX:U),J,0,0 +S:G$PX0$0$0({1}SX:U),J,0,0 +S:G$PT0$0$0({1}SX:U),J,0,0 +S:G$PX1$0$0({1}SX:U),J,0,0 +S:G$PT1$0$0({1}SX:U),J,0,0 +S:G$PS$0$0({1}SX:U),J,0,0 +S:G$P$0$0({1}SX:U),J,0,0 +S:G$F1$0$0({1}SX:U),J,0,0 +S:G$OV$0$0({1}SX:U),J,0,0 +S:G$RS0$0$0({1}SX:U),J,0,0 +S:G$RS1$0$0({1}SX:U),J,0,0 +S:G$F0$0$0({1}SX:U),J,0,0 +S:G$AC$0$0({1}SX:U),J,0,0 +S:G$CY$0$0({1}SX:U),J,0,0 +S:G$main$0$0({2}DF,SI:S),C,0,0 +S:Fkeypad_display$keypad$0$0({4}DA4,SC:S),D,0,0 +S:Fkeypad_display$display_0$0$0({4}DA4,SC:S),D,0,0 +S:Fkeypad_display$display_1$0$0({4}DA4,SC:S),D,0,0 +S:Fkeypad_display$display_2$0$0({4}DA4,SC:S),D,0,0 +S:Fkeypad_display$display_3$0$0({4}DA4,SC:S),D,0,0 diff --git a/demo/keypad_display.asm b/demo/keypad_display.asm new file mode 100644 index 0000000..a216cbe --- /dev/null +++ b/demo/keypad_display.asm @@ -0,0 +1,624 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ANSI-C Compiler +; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) +; This file was generated Tue Oct 27 23:03:55 2009 +;-------------------------------------------------------- + .module keypad_display + .optsdcc -mmcs51 --model-small + +;-------------------------------------------------------- +; Public variables in this module +;-------------------------------------------------------- + .globl _main + .globl _CY + .globl _AC + .globl _F0 + .globl _RS1 + .globl _RS0 + .globl _OV + .globl _F1 + .globl _P + .globl _PS + .globl _PT1 + .globl _PX1 + .globl _PT0 + .globl _PX0 + .globl _RD + .globl _WR + .globl _T1 + .globl _T0 + .globl _INT1 + .globl _INT0 + .globl _TXD + .globl _RXD + .globl _P3_7 + .globl _P3_6 + .globl _P3_5 + .globl _P3_4 + .globl _P3_3 + .globl _P3_2 + .globl _P3_1 + .globl _P3_0 + .globl _EA + .globl _ES + .globl _ET1 + .globl _EX1 + .globl _ET0 + .globl _EX0 + .globl _P2_7 + .globl _P2_6 + .globl _P2_5 + .globl _P2_4 + .globl _P2_3 + .globl _P2_2 + .globl _P2_1 + .globl _P2_0 + .globl _SM0 + .globl _SM1 + .globl _SM2 + .globl _REN + .globl _TB8 + .globl _RB8 + .globl _TI + .globl _RI + .globl _P1_7 + .globl _P1_6 + .globl _P1_5 + .globl _P1_4 + .globl _P1_3 + .globl _P1_2 + .globl _P1_1 + .globl _P1_0 + .globl _TF1 + .globl _TR1 + .globl _TF0 + .globl _TR0 + .globl _IE1 + .globl _IT1 + .globl _IE0 + .globl _IT0 + .globl _P0_7 + .globl _P0_6 + .globl _P0_5 + .globl _P0_4 + .globl _P0_3 + .globl _P0_2 + .globl _P0_1 + .globl _P0_0 + .globl _B + .globl _ACC + .globl _PSW + .globl _IP + .globl _P3 + .globl _IE + .globl _P2 + .globl _SBUF + .globl _SCON + .globl _P1 + .globl _TH1 + .globl _TH0 + .globl _TL1 + .globl _TL0 + .globl _TMOD + .globl _TCON + .globl _PCON + .globl _DPH + .globl _DPL + .globl _SP + .globl _P0 + .globl _row + .globl _state +;-------------------------------------------------------- +; special function registers +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0$0$0 == 0x0080 +_P0 = 0x0080 +G$SP$0$0 == 0x0081 +_SP = 0x0081 +G$DPL$0$0 == 0x0082 +_DPL = 0x0082 +G$DPH$0$0 == 0x0083 +_DPH = 0x0083 +G$PCON$0$0 == 0x0087 +_PCON = 0x0087 +G$TCON$0$0 == 0x0088 +_TCON = 0x0088 +G$TMOD$0$0 == 0x0089 +_TMOD = 0x0089 +G$TL0$0$0 == 0x008a +_TL0 = 0x008a +G$TL1$0$0 == 0x008b +_TL1 = 0x008b +G$TH0$0$0 == 0x008c +_TH0 = 0x008c +G$TH1$0$0 == 0x008d +_TH1 = 0x008d +G$P1$0$0 == 0x0090 +_P1 = 0x0090 +G$SCON$0$0 == 0x0098 +_SCON = 0x0098 +G$SBUF$0$0 == 0x0099 +_SBUF = 0x0099 +G$P2$0$0 == 0x00a0 +_P2 = 0x00a0 +G$IE$0$0 == 0x00a8 +_IE = 0x00a8 +G$P3$0$0 == 0x00b0 +_P3 = 0x00b0 +G$IP$0$0 == 0x00b8 +_IP = 0x00b8 +G$PSW$0$0 == 0x00d0 +_PSW = 0x00d0 +G$ACC$0$0 == 0x00e0 +_ACC = 0x00e0 +G$B$0$0 == 0x00f0 +_B = 0x00f0 +;-------------------------------------------------------- +; special function bits +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0_0$0$0 == 0x0080 +_P0_0 = 0x0080 +G$P0_1$0$0 == 0x0081 +_P0_1 = 0x0081 +G$P0_2$0$0 == 0x0082 +_P0_2 = 0x0082 +G$P0_3$0$0 == 0x0083 +_P0_3 = 0x0083 +G$P0_4$0$0 == 0x0084 +_P0_4 = 0x0084 +G$P0_5$0$0 == 0x0085 +_P0_5 = 0x0085 +G$P0_6$0$0 == 0x0086 +_P0_6 = 0x0086 +G$P0_7$0$0 == 0x0087 +_P0_7 = 0x0087 +G$IT0$0$0 == 0x0088 +_IT0 = 0x0088 +G$IE0$0$0 == 0x0089 +_IE0 = 0x0089 +G$IT1$0$0 == 0x008a +_IT1 = 0x008a +G$IE1$0$0 == 0x008b +_IE1 = 0x008b +G$TR0$0$0 == 0x008c +_TR0 = 0x008c +G$TF0$0$0 == 0x008d +_TF0 = 0x008d +G$TR1$0$0 == 0x008e +_TR1 = 0x008e +G$TF1$0$0 == 0x008f +_TF1 = 0x008f +G$P1_0$0$0 == 0x0090 +_P1_0 = 0x0090 +G$P1_1$0$0 == 0x0091 +_P1_1 = 0x0091 +G$P1_2$0$0 == 0x0092 +_P1_2 = 0x0092 +G$P1_3$0$0 == 0x0093 +_P1_3 = 0x0093 +G$P1_4$0$0 == 0x0094 +_P1_4 = 0x0094 +G$P1_5$0$0 == 0x0095 +_P1_5 = 0x0095 +G$P1_6$0$0 == 0x0096 +_P1_6 = 0x0096 +G$P1_7$0$0 == 0x0097 +_P1_7 = 0x0097 +G$RI$0$0 == 0x0098 +_RI = 0x0098 +G$TI$0$0 == 0x0099 +_TI = 0x0099 +G$RB8$0$0 == 0x009a +_RB8 = 0x009a +G$TB8$0$0 == 0x009b +_TB8 = 0x009b +G$REN$0$0 == 0x009c +_REN = 0x009c +G$SM2$0$0 == 0x009d +_SM2 = 0x009d +G$SM1$0$0 == 0x009e +_SM1 = 0x009e +G$SM0$0$0 == 0x009f +_SM0 = 0x009f +G$P2_0$0$0 == 0x00a0 +_P2_0 = 0x00a0 +G$P2_1$0$0 == 0x00a1 +_P2_1 = 0x00a1 +G$P2_2$0$0 == 0x00a2 +_P2_2 = 0x00a2 +G$P2_3$0$0 == 0x00a3 +_P2_3 = 0x00a3 +G$P2_4$0$0 == 0x00a4 +_P2_4 = 0x00a4 +G$P2_5$0$0 == 0x00a5 +_P2_5 = 0x00a5 +G$P2_6$0$0 == 0x00a6 +_P2_6 = 0x00a6 +G$P2_7$0$0 == 0x00a7 +_P2_7 = 0x00a7 +G$EX0$0$0 == 0x00a8 +_EX0 = 0x00a8 +G$ET0$0$0 == 0x00a9 +_ET0 = 0x00a9 +G$EX1$0$0 == 0x00aa +_EX1 = 0x00aa +G$ET1$0$0 == 0x00ab +_ET1 = 0x00ab +G$ES$0$0 == 0x00ac +_ES = 0x00ac +G$EA$0$0 == 0x00af +_EA = 0x00af +G$P3_0$0$0 == 0x00b0 +_P3_0 = 0x00b0 +G$P3_1$0$0 == 0x00b1 +_P3_1 = 0x00b1 +G$P3_2$0$0 == 0x00b2 +_P3_2 = 0x00b2 +G$P3_3$0$0 == 0x00b3 +_P3_3 = 0x00b3 +G$P3_4$0$0 == 0x00b4 +_P3_4 = 0x00b4 +G$P3_5$0$0 == 0x00b5 +_P3_5 = 0x00b5 +G$P3_6$0$0 == 0x00b6 +_P3_6 = 0x00b6 +G$P3_7$0$0 == 0x00b7 +_P3_7 = 0x00b7 +G$RXD$0$0 == 0x00b0 +_RXD = 0x00b0 +G$TXD$0$0 == 0x00b1 +_TXD = 0x00b1 +G$INT0$0$0 == 0x00b2 +_INT0 = 0x00b2 +G$INT1$0$0 == 0x00b3 +_INT1 = 0x00b3 +G$T0$0$0 == 0x00b4 +_T0 = 0x00b4 +G$T1$0$0 == 0x00b5 +_T1 = 0x00b5 +G$WR$0$0 == 0x00b6 +_WR = 0x00b6 +G$RD$0$0 == 0x00b7 +_RD = 0x00b7 +G$PX0$0$0 == 0x00b8 +_PX0 = 0x00b8 +G$PT0$0$0 == 0x00b9 +_PT0 = 0x00b9 +G$PX1$0$0 == 0x00ba +_PX1 = 0x00ba +G$PT1$0$0 == 0x00bb +_PT1 = 0x00bb +G$PS$0$0 == 0x00bc +_PS = 0x00bc +G$P$0$0 == 0x00d0 +_P = 0x00d0 +G$F1$0$0 == 0x00d1 +_F1 = 0x00d1 +G$OV$0$0 == 0x00d2 +_OV = 0x00d2 +G$RS0$0$0 == 0x00d3 +_RS0 = 0x00d3 +G$RS1$0$0 == 0x00d4 +_RS1 = 0x00d4 +G$F0$0$0 == 0x00d5 +_F0 = 0x00d5 +G$AC$0$0 == 0x00d6 +_AC = 0x00d6 +G$CY$0$0 == 0x00d7 +_CY = 0x00d7 +;-------------------------------------------------------- +; overlayable register banks +;-------------------------------------------------------- + .area REG_BANK_0 (REL,OVR,DATA) + .ds 8 +;-------------------------------------------------------- +; internal ram data +;-------------------------------------------------------- + .area DSEG (DATA) +G$state$0$0==. +_state:: + .ds 1 +G$row$0$0==. +_row:: + .ds 2 +;-------------------------------------------------------- +; overlayable items in internal ram +;-------------------------------------------------------- + .area OSEG (OVR,DATA) +;-------------------------------------------------------- +; Stack segment in internal ram +;-------------------------------------------------------- + .area SSEG (DATA) +__start__stack: + .ds 1 + +;-------------------------------------------------------- +; indirectly addressable internal ram data +;-------------------------------------------------------- + .area ISEG (DATA) +;-------------------------------------------------------- +; absolute internal ram data +;-------------------------------------------------------- + .area IABS (ABS,DATA) + .area IABS (ABS,DATA) +;-------------------------------------------------------- +; bit data +;-------------------------------------------------------- + .area BSEG (BIT) +;-------------------------------------------------------- +; paged external ram data +;-------------------------------------------------------- + .area PSEG (PAG,XDATA) +;-------------------------------------------------------- +; external ram data +;-------------------------------------------------------- + .area XSEG (XDATA) +;-------------------------------------------------------- +; absolute external ram data +;-------------------------------------------------------- + .area XABS (ABS,XDATA) +;-------------------------------------------------------- +; external initialized ram data +;-------------------------------------------------------- + .area XISEG (XDATA) + .area HOME (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area CSEG (CODE) +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + .area HOME (CODE) +__interrupt_vect: + ljmp __sdcc_gsinit_startup +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area HOME (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area GSINIT (CODE) + .globl __sdcc_gsinit_startup + .globl __sdcc_program_startup + .globl __start__stack + .globl __mcs51_genXINIT + .globl __mcs51_genXRAMCLEAR + .globl __mcs51_genRAMCLEAR + .area GSFINAL (CODE) + ljmp __sdcc_program_startup +;-------------------------------------------------------- +; Home +;-------------------------------------------------------- + .area HOME (CODE) + .area HOME (CODE) +__sdcc_program_startup: + lcall _main +; return from main will lock up + sjmp . +;-------------------------------------------------------- +; code +;-------------------------------------------------------- + .area CSEG (CODE) +;------------------------------------------------------------ +;Allocation info for local variables in function 'main' +;------------------------------------------------------------ +;------------------------------------------------------------ + G$main$0$0 ==. + C$keypad_display.c$38$0$0 ==. +; keypad_display.c:38: int main() +; ----------------------------------------- +; function main +; ----------------------------------------- +_main: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 + C$keypad_display.c$40$1$1 ==. +; keypad_display.c:40: while(1) { +00123$: + C$keypad_display.c$41$2$2 ==. +; keypad_display.c:41: for(row=0; row<4; row++) { + clr a + mov _row,a + mov (_row + 1),a +00118$: + clr c + mov a,_row + subb a,#0x04 + mov a,(_row + 1) + xrl a,#0x80 + subb a,#0x80 + jnc 00123$ + C$keypad_display.c$42$3$3 ==. +; keypad_display.c:42: P1=keypad[row]; + mov a,_row + add a,#_keypad + mov dpl,a + mov a,(_row + 1) + addc a,#(_keypad >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov _P1,a + C$keypad_display.c$48$3$3 ==. +; keypad_display.c:48: _endasm; + + mov _state, P1 + + C$keypad_display.c$53$3$3 ==. +; keypad_display.c:53: state&=0x0f; + anl _state,#0x0F + C$keypad_display.c$54$3$3 ==. +; keypad_display.c:54: state^=0x0f; + xrl _state,#0x0F + C$keypad_display.c$56$3$3 ==. +; keypad_display.c:56: if(state & 1) { + mov a,_state + jnb acc.0,00111$ + C$keypad_display.c$57$4$4 ==. +; keypad_display.c:57: state=0; + mov _state,#0x00 + sjmp 00112$ +00111$: + C$keypad_display.c$58$3$3 ==. +; keypad_display.c:58: } else if(state & 2) { + mov a,_state + jnb acc.1,00108$ + C$keypad_display.c$59$4$5 ==. +; keypad_display.c:59: state=1; + mov _state,#0x01 + sjmp 00112$ +00108$: + C$keypad_display.c$60$3$3 ==. +; keypad_display.c:60: } else if(state & 4) { + mov a,_state + jnb acc.2,00105$ + C$keypad_display.c$61$4$6 ==. +; keypad_display.c:61: state=2; + mov _state,#0x02 + sjmp 00112$ +00105$: + C$keypad_display.c$62$3$3 ==. +; keypad_display.c:62: } else if(state & 8) { + mov a,_state + jb acc.3,00142$ + ljmp 00120$ +00142$: + C$keypad_display.c$63$4$7 ==. +; keypad_display.c:63: state=3; + mov _state,#0x03 + C$keypad_display.c$65$3$3 ==. +; keypad_display.c:65: continue; +00112$: + C$keypad_display.c$68$3$3 ==. +; keypad_display.c:68: switch(row) { + clr a + cjne a,_row,00143$ + clr a + cjne a,(_row + 1),00143$ + sjmp 00113$ +00143$: + mov a,#0x01 + cjne a,_row,00144$ + clr a + cjne a,(_row + 1),00144$ + sjmp 00114$ +00144$: + mov a,#0x02 + cjne a,_row,00145$ + clr a + cjne a,(_row + 1),00145$ + sjmp 00115$ +00145$: + mov a,#0x03 + cjne a,_row,00146$ + clr a + cjne a,(_row + 1),00146$ + sjmp 00116$ +00146$: + C$keypad_display.c$69$4$9 ==. +; keypad_display.c:69: case 0: + sjmp 00120$ +00113$: + C$keypad_display.c$70$4$9 ==. +; keypad_display.c:70: P3=display_0[state]; + mov a,_state + mov dptr,#_display_0 + movc a,@a+dptr + mov _P3,a + C$keypad_display.c$71$4$9 ==. +; keypad_display.c:71: break; + C$keypad_display.c$72$4$9 ==. +; keypad_display.c:72: case 1: + sjmp 00120$ +00114$: + C$keypad_display.c$73$4$9 ==. +; keypad_display.c:73: P3=display_1[state]; + mov a,_state + mov dptr,#_display_1 + movc a,@a+dptr + mov _P3,a + C$keypad_display.c$74$4$9 ==. +; keypad_display.c:74: break; + C$keypad_display.c$75$4$9 ==. +; keypad_display.c:75: case 2: + sjmp 00120$ +00115$: + C$keypad_display.c$76$4$9 ==. +; keypad_display.c:76: P3=display_2[state]; + mov a,_state + mov dptr,#_display_2 + movc a,@a+dptr + mov _P3,a + C$keypad_display.c$77$4$9 ==. +; keypad_display.c:77: break; + C$keypad_display.c$78$4$9 ==. +; keypad_display.c:78: case 3: + sjmp 00120$ +00116$: + C$keypad_display.c$79$4$9 ==. +; keypad_display.c:79: P3=display_3[state]; + mov a,_state + mov dptr,#_display_3 + movc a,@a+dptr + mov _P3,a + C$keypad_display.c$81$2$2 ==. +; keypad_display.c:81: } +00120$: + C$keypad_display.c$41$2$2 ==. +; keypad_display.c:41: for(row=0; row<4; row++) { + inc _row + clr a + cjne a,_row,00147$ + inc (_row + 1) +00147$: + C$keypad_display.c$84$1$1 ==. + XG$main$0$0 ==. + ljmp 00118$ + .area CSEG (CODE) + .area CONST (CODE) +Fkeypad_display$keypad$0$0 == . +_keypad: + .db #0xEF + .db #0xDF + .db #0xBF + .db #0x7F +Fkeypad_display$display_0$0$0 == . +_display_0: + .db #0xF9 + .db #0x64 + .db #0x70 + .db #0x48 +Fkeypad_display$display_1$0$0 == . +_display_1: + .db #0x59 + .db #0x52 + .db #0x42 + .db #0x40 +Fkeypad_display$display_2$0$0 == . +_display_2: + .db #0xF8 + .db #0x40 + .db #0x50 + .db #0xC6 +Fkeypad_display$display_3$0$0 == . +_display_3: + .db #0x79 + .db #0xC0 + .db #0x49 + .db #0xC0 + .area XINIT (CODE) + .area CABS (ABS,CODE) diff --git a/demo/keypad_display.c b/demo/keypad_display.c new file mode 100644 index 0000000..e6cadf6 --- /dev/null +++ b/demo/keypad_display.c @@ -0,0 +1,84 @@ +/** + * Demonstration code for MCU 8051 IDE + * + * Create virtual multiplexed LED display + * [Main menu] -> [Virtual HW] -> [Open] + * and open file keypad_display.vhw . + * Then press F2 and F9 to start simulation. + * + * Notes: + * F9 - stop simulation + * F2 - shutdown simulator + * + * @file keypad_display.c + */ + +#include <8051.h> +#define USE_INLINE_ASM 1 + +static const char keypad[] = { + 0xEF, 0xDF, 0xBF, 0x7F +}; +static const char display_0[] = { + 0xf9, 0x64, 0x70, 0x48 +}; +static const char display_1[] = { + 0x59, 0x52, 0x42, 0x40 +}; +static const char display_2[] = { + 0xf8, 0x40, 0x50, 0xc6 +}; +static const char display_3[] = { + 0x79, 0xc0, 0x49, 0xc0 +}; + +char state; +int row; + +int main() +{ + while(1) { + for(row=0; row<4; row++) { + P1=keypad[row]; + + #if USE_INLINE_ASM + // Inline assembler + _asm + mov _state, P1 + _endasm; + #else + state=P1; + #endif + + state&=0x0f; + state^=0x0f; + + if(state & 1) { + state=0; + } else if(state & 2) { + state=1; + } else if(state & 4) { + state=2; + } else if(state & 8) { + state=3; + } else { + continue; + } + + switch(row) { + case 0: + P3=display_0[state]; + break; + case 1: + P3=display_1[state]; + break; + case 2: + P3=display_2[state]; + break; + case 3: + P3=display_3[state]; + break; + } + } + } +} diff --git a/demo/keypad_display.cdb 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+:0A00F900E50890012693F5B0800899 +:08010300E50890012A93F5B014 +:07010B000509E4B509020536 +:010112000AE2 +:030113000200697E +:04011A00EFDFBF7FD5 +:04011E00F9647048C8 +:0401220059524240AC +:04012600F84050C687 +:04012A0079C049C08F +:06003700E478FFF6D8FD9D +:080015007900E94400601B7A48 +:05001D000090012E78A7 +:030022000075A0C6 +:0A00250000E493F2A308B8000205FE +:08002F00A0D9F4DAF275A0FF7C +:08003D007800E84400600A7934 +:030045000075A0A3 +:0600480000E4F309D8FCFE +:08004E007800E84400600C7921 +:0B00560000900000E4F0A3D8FCD9FAF1 +:0300080075810AF5 +:0A000B00120116E5826003020003F3 +:0401160075820022CC +:00000001FF diff --git a/demo/keypad_display.lnk b/demo/keypad_display.lnk new file mode 100644 index 0000000..9287b22 --- /dev/null +++ b/demo/keypad_display.lnk @@ -0,0 +1,19 @@ +-myuxi +-Y +-a 0x0100 +-v 0x0000 +-w 0x0800 +-z +-b HOME = 0x0000 +-b ISEG = 0x0000 +-b BSEG = 0x0000 +-k /usr/libexec/sdcc/../share/sdcc/lib/small +-k /usr/share/sdcc/lib/small +-l mcs51 +-l libsdcc +-l libint +-l liblong +-l libfloat +keypad_display.rel + +-e diff --git a/demo/keypad_display.lst b/demo/keypad_display.lst new file mode 100644 index 0000000..439d5d9 --- /dev/null +++ b/demo/keypad_display.lst @@ -0,0 +1,624 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Tue Oct 27 23:03:55 2009 + 5 ;-------------------------------------------------------- + 6 .module keypad_display + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _CY + 14 .globl _AC + 15 .globl _F0 + 16 .globl _RS1 + 17 .globl _RS0 + 18 .globl _OV + 19 .globl _F1 + 20 .globl _P + 21 .globl _PS + 22 .globl _PT1 + 23 .globl _PX1 + 24 .globl _PT0 + 25 .globl _PX0 + 26 .globl _RD + 27 .globl _WR + 28 .globl _T1 + 29 .globl _T0 + 30 .globl _INT1 + 31 .globl _INT0 + 32 .globl _TXD + 33 .globl _RXD + 34 .globl _P3_7 + 35 .globl _P3_6 + 36 .globl _P3_5 + 37 .globl _P3_4 + 38 .globl _P3_3 + 39 .globl _P3_2 + 40 .globl _P3_1 + 41 .globl _P3_0 + 42 .globl _EA + 43 .globl _ES + 44 .globl _ET1 + 45 .globl _EX1 + 46 .globl _ET0 + 47 .globl _EX0 + 48 .globl _P2_7 + 49 .globl _P2_6 + 50 .globl _P2_5 + 51 .globl _P2_4 + 52 .globl _P2_3 + 53 .globl _P2_2 + 54 .globl _P2_1 + 55 .globl _P2_0 + 56 .globl _SM0 + 57 .globl _SM1 + 58 .globl _SM2 + 59 .globl _REN + 60 .globl _TB8 + 61 .globl _RB8 + 62 .globl _TI + 63 .globl _RI + 64 .globl _P1_7 + 65 .globl _P1_6 + 66 .globl _P1_5 + 67 .globl _P1_4 + 68 .globl _P1_3 + 69 .globl _P1_2 + 70 .globl _P1_1 + 71 .globl _P1_0 + 72 .globl _TF1 + 73 .globl _TR1 + 74 .globl _TF0 + 75 .globl _TR0 + 76 .globl _IE1 + 77 .globl _IT1 + 78 .globl _IE0 + 79 .globl _IT0 + 80 .globl _P0_7 + 81 .globl _P0_6 + 82 .globl _P0_5 + 83 .globl _P0_4 + 84 .globl _P0_3 + 85 .globl _P0_2 + 86 .globl _P0_1 + 87 .globl _P0_0 + 88 .globl _B + 89 .globl _ACC + 90 .globl _PSW + 91 .globl _IP + 92 .globl _P3 + 93 .globl _IE + 94 .globl _P2 + 95 .globl _SBUF + 96 .globl _SCON + 97 .globl _P1 + 98 .globl _TH1 + 99 .globl _TH0 + 100 .globl _TL1 + 101 .globl _TL0 + 102 .globl _TMOD + 103 .globl _TCON + 104 .globl _PCON + 105 .globl _DPH + 106 .globl _DPL + 107 .globl _SP + 108 .globl _P0 + 109 .globl _row + 110 .globl _state + 111 ;-------------------------------------------------------- + 112 ; special function registers + 113 ;-------------------------------------------------------- + 114 .area RSEG (DATA) + 0080 115 G$P0$0$0 == 0x0080 + 0080 116 _P0 = 0x0080 + 0081 117 G$SP$0$0 == 0x0081 + 0081 118 _SP = 0x0081 + 0082 119 G$DPL$0$0 == 0x0082 + 0082 120 _DPL = 0x0082 + 0083 121 G$DPH$0$0 == 0x0083 + 0083 122 _DPH = 0x0083 + 0087 123 G$PCON$0$0 == 0x0087 + 0087 124 _PCON = 0x0087 + 0088 125 G$TCON$0$0 == 0x0088 + 0088 126 _TCON = 0x0088 + 0089 127 G$TMOD$0$0 == 0x0089 + 0089 128 _TMOD = 0x0089 + 008A 129 G$TL0$0$0 == 0x008a + 008A 130 _TL0 = 0x008a + 008B 131 G$TL1$0$0 == 0x008b + 008B 132 _TL1 = 0x008b + 008C 133 G$TH0$0$0 == 0x008c + 008C 134 _TH0 = 0x008c + 008D 135 G$TH1$0$0 == 0x008d + 008D 136 _TH1 = 0x008d + 0090 137 G$P1$0$0 == 0x0090 + 0090 138 _P1 = 0x0090 + 0098 139 G$SCON$0$0 == 0x0098 + 0098 140 _SCON = 0x0098 + 0099 141 G$SBUF$0$0 == 0x0099 + 0099 142 _SBUF = 0x0099 + 00A0 143 G$P2$0$0 == 0x00a0 + 00A0 144 _P2 = 0x00a0 + 00A8 145 G$IE$0$0 == 0x00a8 + 00A8 146 _IE = 0x00a8 + 00B0 147 G$P3$0$0 == 0x00b0 + 00B0 148 _P3 = 0x00b0 + 00B8 149 G$IP$0$0 == 0x00b8 + 00B8 150 _IP = 0x00b8 + 00D0 151 G$PSW$0$0 == 0x00d0 + 00D0 152 _PSW = 0x00d0 + 00E0 153 G$ACC$0$0 == 0x00e0 + 00E0 154 _ACC = 0x00e0 + 00F0 155 G$B$0$0 == 0x00f0 + 00F0 156 _B = 0x00f0 + 157 ;-------------------------------------------------------- + 158 ; special function bits + 159 ;-------------------------------------------------------- + 160 .area RSEG (DATA) + 0080 161 G$P0_0$0$0 == 0x0080 + 0080 162 _P0_0 = 0x0080 + 0081 163 G$P0_1$0$0 == 0x0081 + 0081 164 _P0_1 = 0x0081 + 0082 165 G$P0_2$0$0 == 0x0082 + 0082 166 _P0_2 = 0x0082 + 0083 167 G$P0_3$0$0 == 0x0083 + 0083 168 _P0_3 = 0x0083 + 0084 169 G$P0_4$0$0 == 0x0084 + 0084 170 _P0_4 = 0x0084 + 0085 171 G$P0_5$0$0 == 0x0085 + 0085 172 _P0_5 = 0x0085 + 0086 173 G$P0_6$0$0 == 0x0086 + 0086 174 _P0_6 = 0x0086 + 0087 175 G$P0_7$0$0 == 0x0087 + 0087 176 _P0_7 = 0x0087 + 0088 177 G$IT0$0$0 == 0x0088 + 0088 178 _IT0 = 0x0088 + 0089 179 G$IE0$0$0 == 0x0089 + 0089 180 _IE0 = 0x0089 + 008A 181 G$IT1$0$0 == 0x008a + 008A 182 _IT1 = 0x008a + 008B 183 G$IE1$0$0 == 0x008b + 008B 184 _IE1 = 0x008b + 008C 185 G$TR0$0$0 == 0x008c + 008C 186 _TR0 = 0x008c + 008D 187 G$TF0$0$0 == 0x008d + 008D 188 _TF0 = 0x008d + 008E 189 G$TR1$0$0 == 0x008e + 008E 190 _TR1 = 0x008e + 008F 191 G$TF1$0$0 == 0x008f + 008F 192 _TF1 = 0x008f + 0090 193 G$P1_0$0$0 == 0x0090 + 0090 194 _P1_0 = 0x0090 + 0091 195 G$P1_1$0$0 == 0x0091 + 0091 196 _P1_1 = 0x0091 + 0092 197 G$P1_2$0$0 == 0x0092 + 0092 198 _P1_2 = 0x0092 + 0093 199 G$P1_3$0$0 == 0x0093 + 0093 200 _P1_3 = 0x0093 + 0094 201 G$P1_4$0$0 == 0x0094 + 0094 202 _P1_4 = 0x0094 + 0095 203 G$P1_5$0$0 == 0x0095 + 0095 204 _P1_5 = 0x0095 + 0096 205 G$P1_6$0$0 == 0x0096 + 0096 206 _P1_6 = 0x0096 + 0097 207 G$P1_7$0$0 == 0x0097 + 0097 208 _P1_7 = 0x0097 + 0098 209 G$RI$0$0 == 0x0098 + 0098 210 _RI = 0x0098 + 0099 211 G$TI$0$0 == 0x0099 + 0099 212 _TI = 0x0099 + 009A 213 G$RB8$0$0 == 0x009a + 009A 214 _RB8 = 0x009a + 009B 215 G$TB8$0$0 == 0x009b + 009B 216 _TB8 = 0x009b + 009C 217 G$REN$0$0 == 0x009c + 009C 218 _REN = 0x009c + 009D 219 G$SM2$0$0 == 0x009d + 009D 220 _SM2 = 0x009d + 009E 221 G$SM1$0$0 == 0x009e + 009E 222 _SM1 = 0x009e + 009F 223 G$SM0$0$0 == 0x009f + 009F 224 _SM0 = 0x009f + 00A0 225 G$P2_0$0$0 == 0x00a0 + 00A0 226 _P2_0 = 0x00a0 + 00A1 227 G$P2_1$0$0 == 0x00a1 + 00A1 228 _P2_1 = 0x00a1 + 00A2 229 G$P2_2$0$0 == 0x00a2 + 00A2 230 _P2_2 = 0x00a2 + 00A3 231 G$P2_3$0$0 == 0x00a3 + 00A3 232 _P2_3 = 0x00a3 + 00A4 233 G$P2_4$0$0 == 0x00a4 + 00A4 234 _P2_4 = 0x00a4 + 00A5 235 G$P2_5$0$0 == 0x00a5 + 00A5 236 _P2_5 = 0x00a5 + 00A6 237 G$P2_6$0$0 == 0x00a6 + 00A6 238 _P2_6 = 0x00a6 + 00A7 239 G$P2_7$0$0 == 0x00a7 + 00A7 240 _P2_7 = 0x00a7 + 00A8 241 G$EX0$0$0 == 0x00a8 + 00A8 242 _EX0 = 0x00a8 + 00A9 243 G$ET0$0$0 == 0x00a9 + 00A9 244 _ET0 = 0x00a9 + 00AA 245 G$EX1$0$0 == 0x00aa + 00AA 246 _EX1 = 0x00aa + 00AB 247 G$ET1$0$0 == 0x00ab + 00AB 248 _ET1 = 0x00ab + 00AC 249 G$ES$0$0 == 0x00ac + 00AC 250 _ES = 0x00ac + 00AF 251 G$EA$0$0 == 0x00af + 00AF 252 _EA = 0x00af + 00B0 253 G$P3_0$0$0 == 0x00b0 + 00B0 254 _P3_0 = 0x00b0 + 00B1 255 G$P3_1$0$0 == 0x00b1 + 00B1 256 _P3_1 = 0x00b1 + 00B2 257 G$P3_2$0$0 == 0x00b2 + 00B2 258 _P3_2 = 0x00b2 + 00B3 259 G$P3_3$0$0 == 0x00b3 + 00B3 260 _P3_3 = 0x00b3 + 00B4 261 G$P3_4$0$0 == 0x00b4 + 00B4 262 _P3_4 = 0x00b4 + 00B5 263 G$P3_5$0$0 == 0x00b5 + 00B5 264 _P3_5 = 0x00b5 + 00B6 265 G$P3_6$0$0 == 0x00b6 + 00B6 266 _P3_6 = 0x00b6 + 00B7 267 G$P3_7$0$0 == 0x00b7 + 00B7 268 _P3_7 = 0x00b7 + 00B0 269 G$RXD$0$0 == 0x00b0 + 00B0 270 _RXD = 0x00b0 + 00B1 271 G$TXD$0$0 == 0x00b1 + 00B1 272 _TXD = 0x00b1 + 00B2 273 G$INT0$0$0 == 0x00b2 + 00B2 274 _INT0 = 0x00b2 + 00B3 275 G$INT1$0$0 == 0x00b3 + 00B3 276 _INT1 = 0x00b3 + 00B4 277 G$T0$0$0 == 0x00b4 + 00B4 278 _T0 = 0x00b4 + 00B5 279 G$T1$0$0 == 0x00b5 + 00B5 280 _T1 = 0x00b5 + 00B6 281 G$WR$0$0 == 0x00b6 + 00B6 282 _WR = 0x00b6 + 00B7 283 G$RD$0$0 == 0x00b7 + 00B7 284 _RD = 0x00b7 + 00B8 285 G$PX0$0$0 == 0x00b8 + 00B8 286 _PX0 = 0x00b8 + 00B9 287 G$PT0$0$0 == 0x00b9 + 00B9 288 _PT0 = 0x00b9 + 00BA 289 G$PX1$0$0 == 0x00ba + 00BA 290 _PX1 = 0x00ba + 00BB 291 G$PT1$0$0 == 0x00bb + 00BB 292 _PT1 = 0x00bb + 00BC 293 G$PS$0$0 == 0x00bc + 00BC 294 _PS = 0x00bc + 00D0 295 G$P$0$0 == 0x00d0 + 00D0 296 _P = 0x00d0 + 00D1 297 G$F1$0$0 == 0x00d1 + 00D1 298 _F1 = 0x00d1 + 00D2 299 G$OV$0$0 == 0x00d2 + 00D2 300 _OV = 0x00d2 + 00D3 301 G$RS0$0$0 == 0x00d3 + 00D3 302 _RS0 = 0x00d3 + 00D4 303 G$RS1$0$0 == 0x00d4 + 00D4 304 _RS1 = 0x00d4 + 00D5 305 G$F0$0$0 == 0x00d5 + 00D5 306 _F0 = 0x00d5 + 00D6 307 G$AC$0$0 == 0x00d6 + 00D6 308 _AC = 0x00d6 + 00D7 309 G$CY$0$0 == 0x00d7 + 00D7 310 _CY = 0x00d7 + 311 ;-------------------------------------------------------- + 312 ; overlayable register banks + 313 ;-------------------------------------------------------- + 314 .area REG_BANK_0 (REL,OVR,DATA) + 0000 315 .ds 8 + 316 ;-------------------------------------------------------- + 317 ; internal ram data + 318 ;-------------------------------------------------------- + 319 .area DSEG (DATA) + 0000 320 G$state$0$0==. + 0000 321 _state:: + 0000 322 .ds 1 + 0001 323 G$row$0$0==. + 0001 324 _row:: + 0001 325 .ds 2 + 326 ;-------------------------------------------------------- + 327 ; overlayable items in internal ram + 328 ;-------------------------------------------------------- + 329 .area OSEG (OVR,DATA) + 330 ;-------------------------------------------------------- + 331 ; Stack segment in internal ram + 332 ;-------------------------------------------------------- + 333 .area SSEG (DATA) + 0000 334 __start__stack: + 0000 335 .ds 1 + 336 + 337 ;-------------------------------------------------------- + 338 ; indirectly addressable internal ram data + 339 ;-------------------------------------------------------- + 340 .area ISEG (DATA) + 341 ;-------------------------------------------------------- + 342 ; absolute internal ram data + 343 ;-------------------------------------------------------- + 344 .area IABS (ABS,DATA) + 345 .area IABS (ABS,DATA) + 346 ;-------------------------------------------------------- + 347 ; bit data + 348 ;-------------------------------------------------------- + 349 .area BSEG (BIT) + 350 ;-------------------------------------------------------- + 351 ; paged external ram data + 352 ;-------------------------------------------------------- + 353 .area PSEG (PAG,XDATA) + 354 ;-------------------------------------------------------- + 355 ; external ram data + 356 ;-------------------------------------------------------- + 357 .area XSEG (XDATA) + 358 ;-------------------------------------------------------- + 359 ; absolute external ram data + 360 ;-------------------------------------------------------- + 361 .area XABS (ABS,XDATA) + 362 ;-------------------------------------------------------- + 363 ; external initialized ram data + 364 ;-------------------------------------------------------- + 365 .area XISEG (XDATA) + 366 .area HOME (CODE) + 367 .area GSINIT0 (CODE) + 368 .area GSINIT1 (CODE) + 369 .area GSINIT2 (CODE) + 370 .area GSINIT3 (CODE) + 371 .area GSINIT4 (CODE) + 372 .area GSINIT5 (CODE) + 373 .area GSINIT (CODE) + 374 .area GSFINAL (CODE) + 375 .area CSEG (CODE) + 376 ;-------------------------------------------------------- + 377 ; interrupt vector + 378 ;-------------------------------------------------------- + 379 .area HOME (CODE) + 0000 380 __interrupt_vect: + 0000 02s00r00 381 ljmp __sdcc_gsinit_startup + 382 ;-------------------------------------------------------- + 383 ; global & static initialisations + 384 ;-------------------------------------------------------- + 385 .area HOME (CODE) + 386 .area GSINIT (CODE) + 387 .area GSFINAL (CODE) + 388 .area GSINIT (CODE) + 389 .globl __sdcc_gsinit_startup + 390 .globl __sdcc_program_startup + 391 .globl __start__stack + 392 .globl __mcs51_genXINIT + 393 .globl __mcs51_genXRAMCLEAR + 394 .globl __mcs51_genRAMCLEAR + 395 .area GSFINAL (CODE) + 0000 02s00r03 396 ljmp __sdcc_program_startup + 397 ;-------------------------------------------------------- + 398 ; Home + 399 ;-------------------------------------------------------- + 400 .area HOME (CODE) + 401 .area HOME (CODE) + 0003 402 __sdcc_program_startup: + 0003 12s00r00 403 lcall _main + 404 ; return from main will lock up + 0006 80 FE 405 sjmp . + 406 ;-------------------------------------------------------- + 407 ; code + 408 ;-------------------------------------------------------- + 409 .area CSEG (CODE) + 410 ;------------------------------------------------------------ + 411 ;Allocation info for local variables in function 'main' + 412 ;------------------------------------------------------------ + 413 ;------------------------------------------------------------ + 0000 414 G$main$0$0 ==. + 0000 415 C$keypad_display.c$38$0$0 ==. + 416 ; keypad_display.c:38: int main() + 417 ; ----------------------------------------- + 418 ; function main + 419 ; ----------------------------------------- + 0000 420 _main: + 0002 421 ar2 = 0x02 + 0003 422 ar3 = 0x03 + 0004 423 ar4 = 0x04 + 0005 424 ar5 = 0x05 + 0006 425 ar6 = 0x06 + 0007 426 ar7 = 0x07 + 0000 427 ar0 = 0x00 + 0001 428 ar1 = 0x01 + 0000 429 C$keypad_display.c$40$1$1 ==. + 430 ; keypad_display.c:40: while(1) { + 0000 431 00123$: + 0000 432 C$keypad_display.c$41$2$2 ==. + 433 ; keypad_display.c:41: for(row=0; row<4; row++) { + 0000 E4 434 clr a + 0001 F5*01 435 mov _row,a + 0003 F5*02 436 mov (_row + 1),a + 0005 437 00118$: + 0005 C3 438 clr c + 0006 E5*01 439 mov a,_row + 0008 94 04 440 subb a,#0x04 + 000A E5*02 441 mov a,(_row + 1) + 000C 64 80 442 xrl a,#0x80 + 000E 94 80 443 subb a,#0x80 + 0010 50 EE 444 jnc 00123$ + 0012 445 C$keypad_display.c$42$3$3 ==. + 446 ; keypad_display.c:42: P1=keypad[row]; + 0012 E5*01 447 mov a,_row + 0014 24r00 448 add a,#_keypad + 0016 F5 82 449 mov dpl,a + 0018 E5*02 450 mov a,(_row + 1) + 001A 34s00 451 addc a,#(_keypad >> 8) + 001C F5 83 452 mov dph,a + 001E E4 453 clr a + 001F 93 454 movc a,@a+dptr + 0020 F5 90 455 mov _P1,a + 0022 456 C$keypad_display.c$48$3$3 ==. + 457 ; keypad_display.c:48: _endasm; + 458 + 0022 85 90*00 459 mov _state, P1 + 460 + 0025 461 C$keypad_display.c$53$3$3 ==. + 462 ; keypad_display.c:53: state&=0x0f; + 0025 53r00 0F 463 anl _state,#0x0F + 0028 464 C$keypad_display.c$54$3$3 ==. + 465 ; keypad_display.c:54: state^=0x0f; + 0028 63r00 0F 466 xrl _state,#0x0F + 002B 467 C$keypad_display.c$56$3$3 ==. + 468 ; keypad_display.c:56: if(state & 1) { + 002B E5*00 469 mov a,_state + 002D 30 E0 05 470 jnb acc.0,00111$ + 0030 471 C$keypad_display.c$57$4$4 ==. + 472 ; keypad_display.c:57: state=0; + 0030 75*00 00 473 mov _state,#0x00 + 0033 80 1F 474 sjmp 00112$ + 0035 475 00111$: + 0035 476 C$keypad_display.c$58$3$3 ==. + 477 ; keypad_display.c:58: } else if(state & 2) { + 0035 E5*00 478 mov a,_state + 0037 30 E1 05 479 jnb acc.1,00108$ + 003A 480 C$keypad_display.c$59$4$5 ==. + 481 ; keypad_display.c:59: state=1; + 003A 75*00 01 482 mov _state,#0x01 + 003D 80 15 483 sjmp 00112$ + 003F 484 00108$: + 003F 485 C$keypad_display.c$60$3$3 ==. + 486 ; keypad_display.c:60: } else if(state & 4) { + 003F E5*00 487 mov a,_state + 0041 30 E2 05 488 jnb acc.2,00105$ + 0044 489 C$keypad_display.c$61$4$6 ==. + 490 ; keypad_display.c:61: state=2; + 0044 75*00 02 491 mov _state,#0x02 + 0047 80 0B 492 sjmp 00112$ + 0049 493 00105$: + 0049 494 C$keypad_display.c$62$3$3 ==. + 495 ; keypad_display.c:62: } else if(state & 8) { + 0049 E5*00 496 mov a,_state + 004B 20 E3 03 497 jb acc.3,00142$ + 004E 02s00rA7 498 ljmp 00120$ + 0051 499 00142$: + 0051 500 C$keypad_display.c$63$4$7 ==. + 501 ; keypad_display.c:63: state=3; + 0051 75*00 03 502 mov _state,#0x03 + 0054 503 C$keypad_display.c$65$3$3 ==. + 504 ; keypad_display.c:65: continue; + 0054 505 00112$: + 0054 506 C$keypad_display.c$68$3$3 ==. + 507 ; keypad_display.c:68: switch(row) { + 0054 E4 508 clr a + 0055 B5*01 06 509 cjne a,_row,00143$ + 0058 E4 510 clr a + 0059 B5*02 02 511 cjne a,(_row + 1),00143$ + 005C 80 23 512 sjmp 00113$ + 005E 513 00143$: + 005E 74 01 514 mov a,#0x01 + 0060 B5*01 06 515 cjne a,_row,00144$ + 0063 E4 516 clr a + 0064 B5*02 02 517 cjne a,(_row + 1),00144$ + 0067 80 22 518 sjmp 00114$ + 0069 519 00144$: + 0069 74 02 520 mov a,#0x02 + 006B B5*01 06 521 cjne a,_row,00145$ + 006E E4 522 clr a + 006F B5*02 02 523 cjne a,(_row + 1),00145$ + 0072 80 21 524 sjmp 00115$ + 0074 525 00145$: + 0074 74 03 526 mov a,#0x03 + 0076 B5*01 06 527 cjne a,_row,00146$ + 0079 E4 528 clr a + 007A B5*02 02 529 cjne a,(_row + 1),00146$ + 007D 80 20 530 sjmp 00116$ + 007F 531 00146$: + 007F 532 C$keypad_display.c$69$4$9 ==. + 533 ; keypad_display.c:69: case 0: + 007F 80 26 534 sjmp 00120$ + 0081 535 00113$: + 0081 536 C$keypad_display.c$70$4$9 ==. + 537 ; keypad_display.c:70: P3=display_0[state]; + 0081 E5*00 538 mov a,_state + 0083 90s00r04 539 mov dptr,#_display_0 + 0086 93 540 movc a,@a+dptr + 0087 F5 B0 541 mov _P3,a + 0089 542 C$keypad_display.c$71$4$9 ==. + 543 ; keypad_display.c:71: break; + 0089 544 C$keypad_display.c$72$4$9 ==. + 545 ; keypad_display.c:72: case 1: + 0089 80 1C 546 sjmp 00120$ + 008B 547 00114$: + 008B 548 C$keypad_display.c$73$4$9 ==. + 549 ; keypad_display.c:73: P3=display_1[state]; + 008B E5*00 550 mov a,_state + 008D 90s00r08 551 mov dptr,#_display_1 + 0090 93 552 movc a,@a+dptr + 0091 F5 B0 553 mov _P3,a + 0093 554 C$keypad_display.c$74$4$9 ==. + 555 ; keypad_display.c:74: break; + 0093 556 C$keypad_display.c$75$4$9 ==. + 557 ; keypad_display.c:75: case 2: + 0093 80 12 558 sjmp 00120$ + 0095 559 00115$: + 0095 560 C$keypad_display.c$76$4$9 ==. + 561 ; keypad_display.c:76: P3=display_2[state]; + 0095 E5*00 562 mov a,_state + 0097 90s00r0C 563 mov dptr,#_display_2 + 009A 93 564 movc a,@a+dptr + 009B F5 B0 565 mov _P3,a + 009D 566 C$keypad_display.c$77$4$9 ==. + 567 ; keypad_display.c:77: break; + 009D 568 C$keypad_display.c$78$4$9 ==. + 569 ; keypad_display.c:78: case 3: + 009D 80 08 570 sjmp 00120$ + 009F 571 00116$: + 009F 572 C$keypad_display.c$79$4$9 ==. + 573 ; keypad_display.c:79: P3=display_3[state]; + 009F E5*00 574 mov a,_state + 00A1 90s00r10 575 mov dptr,#_display_3 + 00A4 93 576 movc a,@a+dptr + 00A5 F5 B0 577 mov _P3,a + 00A7 578 C$keypad_display.c$81$2$2 ==. + 579 ; keypad_display.c:81: } + 00A7 580 00120$: + 00A7 581 C$keypad_display.c$41$2$2 ==. + 582 ; keypad_display.c:41: for(row=0; row<4; row++) { + 00A7 05*01 583 inc _row + 00A9 E4 584 clr a + 00AA B5*01 02 585 cjne a,_row,00147$ + 00AD 05*02 586 inc (_row + 1) + 00AF 587 00147$: + 00AF 588 C$keypad_display.c$84$1$1 ==. + 00AF 589 XG$main$0$0 ==. + 00AF 02s00r05 590 ljmp 00118$ + 591 .area CSEG (CODE) + 592 .area CONST (CODE) + 0000 593 Fkeypad_display$keypad$0$0 == . + 0000 594 _keypad: + 0000 EF 595 .db #0xEF + 0001 DF 596 .db #0xDF + 0002 BF 597 .db #0xBF + 0003 7F 598 .db #0x7F + 0004 599 Fkeypad_display$display_0$0$0 == . + 0004 600 _display_0: + 0004 F9 601 .db #0xF9 + 0005 64 602 .db #0x64 + 0006 70 603 .db #0x70 + 0007 48 604 .db #0x48 + 0008 605 Fkeypad_display$display_1$0$0 == . + 0008 606 _display_1: + 0008 59 607 .db #0x59 + 0009 52 608 .db #0x52 + 000A 42 609 .db #0x42 + 000B 40 610 .db #0x40 + 000C 611 Fkeypad_display$display_2$0$0 == . + 000C 612 _display_2: + 000C F8 613 .db #0xF8 + 000D 40 614 .db #0x40 + 000E 50 615 .db #0x50 + 000F C6 616 .db #0xC6 + 0010 617 Fkeypad_display$display_3$0$0 == . + 0010 618 _display_3: + 0010 79 619 .db #0x79 + 0011 C0 620 .db #0xC0 + 0012 49 621 .db #0x49 + 0013 C0 622 .db #0xC0 + 623 .area XINIT (CODE) + 624 .area CABS (ABS,CODE) diff --git a/demo/keypad_display.map b/demo/keypad_display.map new file mode 100644 index 0000000..276738d --- /dev/null +++ b/demo/keypad_display.map @@ -0,0 +1,536 @@ + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CABS 0000 0000 = 0. bytes (ABS,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:FFFFFF00 s_BSEG + 0C:0000 l_BIT_BANK + 0C:0000 l_BSEG + 0C:0000 l_BSEG_BYTES + 0C:0000 l_CABS + 0C:0000 l_GSINIT + 0C:0000 l_GSINIT1 + 0C:0000 l_GSINIT5 + 0C:0000 l_IABS + 0C:0000 l_ISEG + 0C:0000 l_OSEG + 0C:0000 l_PSEG + 0C:0000 l_REG_BANK_1 + 0C:0000 l_REG_BANK_2 + 0C:0000 l_REG_BANK_3 + 0C:0000 l_RSEG + 0C:0000 l_XABS + 0C:0000 l_XINIT + 0C:0000 l_XISEG + 0C:0000 l_XSEG + 0C:0000 l__CODE + 0C:0000 s_BSEG_BYTES + 0C:0000 s_CABS + 0C:0000 s_DSEG + 0C:0000 s_HOME + 0C:0000 s_IABS + 0C:0000 s_ISEG + 0C:0000 s_PSEG + 0C:0000 s_REG_BANK_0 + 0C:0000 s_XABS + 0C:0000 s_XISEG + 0C:0000 s_XSEG + 0C:0003 l_GSFINAL + 0C:0003 l_GSINIT0 + 0C:0008 l_HOME + 0C:0008 l_REG_BANK_0 + 0C:0008 s_GSINIT0 + 0C:0008 s_REG_BANK_1 + 0C:000A l_GSINIT2 + 0C:000B s_GSINIT1 + 0C:000B s_GSINIT2 + 0C:000B s_RSEG + 0C:000B s_SSEG + 0C:0010 s_REG_BANK_2 + 0C:0014 l_CONST + 0C:0015 s_GSINIT3 + 0C:0018 s_BIT_BANK + 0C:0018 s_OSEG + 0C:0018 s_REG_BANK_3 + 0C:0020 s__CODE + 0C:0022 l_GSINIT3 + 0C:002A l_GSINIT4 + 0C:0037 s_GSINIT4 + 0C:0061 s_GSFINAL + 0C:0061 s_GSINIT + 0C:0061 s_GSINIT5 + 0C:0064 s_CSEG + 0C:0080 l_DSEG + 0C:00B6 l_CSEG + 0C:00F5 l_SSEG + 0C:0100 l_IRAM + 0C:011A s_CONST + 0C:012E s_XINIT + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +. .ABS. 0000 0000 = 0. bytes (ABS,CON) + + Value Global + -------- -------------------------------- + 0080 G$P0$0$0 + 0080 G$P0_0$0$0 + 0080 _P0 + 0080 _P0_0 + 0081 G$P0_1$0$0 + 0081 G$SP$0$0 + 0081 _P0_1 + 0081 _SP + 0082 G$DPL$0$0 + 0082 G$P0_2$0$0 + 0082 _DPL + 0082 _P0_2 + 0083 G$DPH$0$0 + 0083 G$P0_3$0$0 + 0083 _DPH + 0083 _P0_3 + 0084 G$P0_4$0$0 + 0084 _P0_4 + 0085 G$P0_5$0$0 + 0085 _P0_5 + 0086 G$P0_6$0$0 + 0086 _P0_6 + 0087 G$P0_7$0$0 + 0087 G$PCON$0$0 + 0087 _P0_7 + 0087 _PCON + 0088 G$IT0$0$0 + 0088 G$TCON$0$0 + 0088 _IT0 + 0088 _TCON + 0089 G$IE0$0$0 + 0089 G$TMOD$0$0 + 0089 _IE0 + 0089 _TMOD + 008A G$IT1$0$0 + 008A G$TL0$0$0 + 008A _IT1 + 008A _TL0 + 008B G$IE1$0$0 + 008B G$TL1$0$0 + 008B _IE1 + 008B _TL1 + 008C G$TH0$0$0 + 008C G$TR0$0$0 + 008C _TH0 + 008C _TR0 + 008D G$TF0$0$0 + 008D G$TH1$0$0 + 008D _TF0 + 008D _TH1 + 008E G$TR1$0$0 + 008E _TR1 + 008F G$TF1$0$0 + 008F _TF1 + 0090 G$P1$0$0 + 0090 G$P1_0$0$0 + 0090 _P1 + 0090 _P1_0 + 0091 G$P1_1$0$0 + 0091 _P1_1 + 0092 G$P1_2$0$0 + 0092 _P1_2 + 0093 G$P1_3$0$0 + 0093 _P1_3 + 0094 G$P1_4$0$0 + 0094 _P1_4 + 0095 G$P1_5$0$0 + 0095 _P1_5 + 0096 G$P1_6$0$0 + 0096 _P1_6 + 0097 G$P1_7$0$0 + 0097 _P1_7 + 0098 G$RI$0$0 + 0098 G$SCON$0$0 + 0098 _RI + 0098 _SCON + 0099 G$SBUF$0$0 + 0099 G$TI$0$0 + 0099 _SBUF + 0099 _TI + 009A G$RB8$0$0 + 009A _RB8 + 009B G$TB8$0$0 + 009B _TB8 + 009C G$REN$0$0 + 009C _REN + 009D G$SM2$0$0 + 009D _SM2 + 009E G$SM1$0$0 + 009E _SM1 + 009F G$SM0$0$0 + 009F _SM0 + 00A0 G$P2$0$0 + 00A0 G$P2_0$0$0 + 00A0 _P2 + 00A0 _P2_0 + 00A0 __XPAGE + 00A1 G$P2_1$0$0 + 00A1 _P2_1 + 00A2 G$P2_2$0$0 + 00A2 _P2_2 + 00A3 G$P2_3$0$0 + 00A3 _P2_3 + 00A4 G$P2_4$0$0 + 00A4 _P2_4 + 00A5 G$P2_5$0$0 + 00A5 _P2_5 + 00A6 G$P2_6$0$0 + 00A6 _P2_6 + 00A7 G$P2_7$0$0 + 00A7 _P2_7 + 00A8 G$EX0$0$0 + 00A8 G$IE$0$0 + 00A8 _EX0 + 00A8 _IE + 00A9 G$ET0$0$0 + 00A9 _ET0 + 00AA G$EX1$0$0 + 00AA _EX1 + 00AB G$ET1$0$0 + 00AB _ET1 + 00AC G$ES$0$0 + 00AC _ES + 00AF G$EA$0$0 + 00AF _EA + 00B0 G$P3$0$0 + 00B0 G$P3_0$0$0 + 00B0 G$RXD$0$0 + 00B0 _P3 + 00B0 _P3_0 + 00B0 _RXD + 00B1 G$P3_1$0$0 + 00B1 G$TXD$0$0 + 00B1 _P3_1 + 00B1 _TXD + 00B2 G$INT0$0$0 + 00B2 G$P3_2$0$0 + 00B2 _INT0 + 00B2 _P3_2 + 00B3 G$INT1$0$0 + 00B3 G$P3_3$0$0 + 00B3 _INT1 + 00B3 _P3_3 + 00B4 G$P3_4$0$0 + 00B4 G$T0$0$0 + 00B4 _P3_4 + 00B4 _T0 + 00B5 G$P3_5$0$0 + 00B5 G$T1$0$0 + 00B5 _P3_5 + 00B5 _T1 + 00B6 G$P3_6$0$0 + 00B6 G$WR$0$0 + 00B6 _P3_6 + 00B6 _WR + 00B7 G$P3_7$0$0 + 00B7 G$RD$0$0 + 00B7 _P3_7 + 00B7 _RD + 00B8 G$IP$0$0 + 00B8 G$PX0$0$0 + 00B8 _IP + 00B8 _PX0 + 00B9 G$PT0$0$0 + 00B9 _PT0 + 00BA G$PX1$0$0 + 00BA _PX1 + 00BB G$PT1$0$0 + 00BB _PT1 + 00BC G$PS$0$0 + 00BC _PS + 00D0 G$P$0$0 + 00D0 G$PSW$0$0 + 00D0 _P + 00D0 _PSW + 00D1 G$F1$0$0 + 00D1 _F1 + 00D2 G$OV$0$0 + 00D2 _OV + 00D3 G$RS0$0$0 + 00D3 _RS0 + 00D4 G$RS1$0$0 + 00D4 _RS1 + 00D5 G$F0$0$0 + 00D5 _F0 + 00D6 G$AC$0$0 + 00D6 _AC + 00D7 G$CY$0$0 + 00D7 _CY + 00E0 G$ACC$0$0 + 00E0 _ACC + 00F0 G$B$0$0 + 00F0 _B + + + + + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +DSEG 0000 0080 = 128. bytes (REL,CON) + + Value Global + -------- -------------------------------- + 0008 G$state$0$0 + 0008 _state + 0009 G$row$0$0 + 0009 _row + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +SSEG 000B 00F5 = 245. bytes (REL,OVR) + + Value Global + -------- -------------------------------- + 000B __start__stack + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +HOME 0000 0008 = 8. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0000 A$keypad_display$381 + 0C:0003 A$keypad_display$403 + 0C:0003 __sdcc_program_startup + 0C:0006 A$keypad_display$405 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT0 0008 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0008 __sdcc_gsinit_startup + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT3 0015 0022 = 34. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0015 __mcs51_genXINIT + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT4 0037 002A = 42. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0037 __mcs51_genRAMCLEAR + 0C:003D __mcs51_genXRAMCLEAR + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSFINAL 0061 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0061 A$keypad_display$396 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CSEG 0064 00B6 = 182. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0064 A$keypad_display$434 + 0C:0064 C$keypad_display.c$38$0$0 + 0C:0064 C$keypad_display.c$40$1$1 + 0C:0064 G$main$0$0 + 0C:0064 _main + 0C:0065 A$keypad_display$435 + 0C:0067 A$keypad_display$436 + 0C:0069 A$keypad_display$438 + 0C:006A A$keypad_display$439 + 0C:006C A$keypad_display$440 + 0C:006E A$keypad_display$441 + 0C:0070 A$keypad_display$442 + 0C:0072 A$keypad_display$443 + 0C:0074 A$keypad_display$444 + 0C:0076 A$keypad_display$447 + 0C:0076 C$keypad_display.c$42$3$3 + 0C:0078 A$keypad_display$448 + 0C:007A A$keypad_display$449 + 0C:007C A$keypad_display$450 + 0C:007E A$keypad_display$451 + 0C:0080 A$keypad_display$452 + 0C:0082 A$keypad_display$453 + 0C:0083 A$keypad_display$454 + 0C:0084 A$keypad_display$455 + 0C:0086 A$keypad_display$459 + 0C:0086 C$keypad_display.c$48$3$3 + 0C:0089 A$keypad_display$463 + 0C:0089 C$keypad_display.c$53$3$3 + 0C:008C A$keypad_display$466 + 0C:008C C$keypad_display.c$54$3$3 + 0C:008F A$keypad_display$469 + 0C:008F C$keypad_display.c$56$3$3 + 0C:0091 A$keypad_display$470 + 0C:0094 A$keypad_display$473 + 0C:0094 C$keypad_display.c$57$4$4 + 0C:0097 A$keypad_display$474 + 0C:0099 A$keypad_display$478 + 0C:0099 C$keypad_display.c$58$3$3 + 0C:009B A$keypad_display$479 + 0C:009E A$keypad_display$482 + 0C:009E C$keypad_display.c$59$4$5 + 0C:00A1 A$keypad_display$483 + 0C:00A3 A$keypad_display$487 + 0C:00A3 C$keypad_display.c$60$3$3 + 0C:00A5 A$keypad_display$488 + 0C:00A8 A$keypad_display$491 + 0C:00A8 C$keypad_display.c$61$4$6 + 0C:00AB A$keypad_display$492 + 0C:00AD A$keypad_display$496 + 0C:00AD C$keypad_display.c$62$3$3 + 0C:00AF A$keypad_display$497 + 0C:00B2 A$keypad_display$498 + 0C:00B5 A$keypad_display$502 + 0C:00B5 C$keypad_display.c$63$4$7 + 0C:00B8 A$keypad_display$508 + 0C:00B8 C$keypad_display.c$65$3$3 + 0C:00B8 C$keypad_display.c$68$3$3 + 0C:00B9 A$keypad_display$509 + 0C:00BC A$keypad_display$510 + 0C:00BD A$keypad_display$511 + 0C:00C0 A$keypad_display$512 + 0C:00C2 A$keypad_display$514 + 0C:00C4 A$keypad_display$515 + 0C:00C7 A$keypad_display$516 + 0C:00C8 A$keypad_display$517 + 0C:00CB A$keypad_display$518 + 0C:00CD A$keypad_display$520 + 0C:00CF A$keypad_display$521 + 0C:00D2 A$keypad_display$522 + 0C:00D3 A$keypad_display$523 + 0C:00D6 A$keypad_display$524 + 0C:00D8 A$keypad_display$526 + 0C:00DA A$keypad_display$527 + 0C:00DD A$keypad_display$528 + 0C:00DE A$keypad_display$529 + 0C:00E1 A$keypad_display$530 + 0C:00E3 A$keypad_display$534 + 0C:00E3 C$keypad_display.c$69$4$9 + 0C:00E5 A$keypad_display$538 + 0C:00E5 C$keypad_display.c$70$4$9 + 0C:00E7 A$keypad_display$539 + 0C:00EA A$keypad_display$540 + 0C:00EB A$keypad_display$541 + 0C:00ED A$keypad_display$546 + 0C:00ED C$keypad_display.c$71$4$9 + 0C:00ED C$keypad_display.c$72$4$9 + 0C:00EF A$keypad_display$550 + 0C:00EF C$keypad_display.c$73$4$9 + 0C:00F1 A$keypad_display$551 + 0C:00F4 A$keypad_display$552 + 0C:00F5 A$keypad_display$553 + 0C:00F7 A$keypad_display$558 + 0C:00F7 C$keypad_display.c$74$4$9 + 0C:00F7 C$keypad_display.c$75$4$9 + 0C:00F9 A$keypad_display$562 + 0C:00F9 C$keypad_display.c$76$4$9 + 0C:00FB A$keypad_display$563 + 0C:00FE A$keypad_display$564 + 0C:00FF A$keypad_display$565 + 0C:0101 A$keypad_display$570 + 0C:0101 C$keypad_display.c$77$4$9 + 0C:0101 C$keypad_display.c$78$4$9 + 0C:0103 A$keypad_display$574 + 0C:0103 C$keypad_display.c$79$4$9 + 0C:0105 A$keypad_display$575 + 0C:0108 A$keypad_display$576 + 0C:0109 A$keypad_display$577 + 0C:010B A$keypad_display$583 + 0C:010B C$keypad_display.c$41$2$2 + 0C:010B C$keypad_display.c$81$2$2 + 0C:010D A$keypad_display$584 + 0C:010E A$keypad_display$585 + 0C:0111 A$keypad_display$586 + 0C:0113 A$keypad_display$590 + 0C:0113 C$keypad_display.c$84$1$1 + 0C:0113 XG$main$0$0 + 0C:0116 __sdcc_external_startup + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CONST 011A 0014 = 20. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:011A Fkeypad_display$keypad$0$0 + 0C:011E Fkeypad_display$display_0$0$0 + 0C:0122 Fkeypad_display$display_1$0$0 + 0C:0126 Fkeypad_display$display_2$0$0 + 0C:012A Fkeypad_display$display_3$0$0 + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 1. + +Files Linked [ module(s) ] + +keypad_display.rel + +Libraries Linked [ object file ] + +/usr/share/sdcc/lib/small/mcs51.lib [ crtclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxinit.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtpagesfr.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtstart.rel ] +/usr/share/sdcc/lib/small/libsdcc.lib [ _startup.rel ] + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 2. + +User Base Address Definitions + +HOME = 0x0000 +ISEG = 0x0000 +BSEG = 0x0000 + +
\ No newline at end of file diff --git a/demo/keypad_display.mem b/demo/keypad_display.mem new file mode 100644 index 0000000..a205eff --- /dev/null +++ b/demo/keypad_display.mem @@ -0,0 +1,28 @@ +Internal RAM layout: + 0 1 2 3 4 5 6 7 8 9 A B C D E F +0x00:|0|0|0|0|0|0|0|0|a|a|a|S|S|S|S|S| +0x10:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x20:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x30:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x40:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x50:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x60:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x70:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x80:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x90:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xa0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xb0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xc0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xd0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xe0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xf0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute + +Stack starts at: 0x0b (sp set to 0x0a) with 245 bytes available. + +Other memory: + Name Start End Size Max + ---------------- -------- -------- -------- -------- + PAGED EXT. RAM 0 0 + EXTERNAL RAM 0 0 + ROM/EPROM/FLASH 0x0000 0x012d 302 2048 diff --git a/demo/keypad_display.rel b/demo/keypad_display.rel new file mode 100644 index 0000000..c4d3129 --- /dev/null +++ b/demo/keypad_display.rel @@ -0,0 +1,490 @@ +;!FILE keypad_display.asm +XH +H 1A areas 147 global symbols +M keypad_display +O -mmcs51 --model-small +S G$EX0$0$0 Def00A8 +S G$IT0$0$0 Def0088 +S G$TH1$0$0 Def008D +S _P1 Def0090 +S G$RXD$0$0 Def00B0 +S G$EX1$0$0 Def00AA +S G$TB8$0$0 Def009B +S G$IT1$0$0 Def008A +S G$IE$0$0 Def00A8 +S _P2 Def00A0 +S _B Def00F0 +S _SP Def0081 +S _P3 Def00B0 +S _PS Def00BC +S G$TXD$0$0 Def00B1 +S G$SM0$0$0 Def009F +S G$TL0$0$0 Def008A +S _T0 Def00B4 +S G$SM1$0$0 Def009E +S G$TL1$0$0 Def008B +S _T1 Def00B5 +S _OV Def00D2 +S G$SM2$0$0 Def009D +S _ACC Def00E0 +S __mcs51_genRAMCLEAR Ref0000 +S G$PT0$0$0 Def00B9 +S G$RS0$0$0 Def00D3 +S G$PT1$0$0 Def00BB +S _WR Def00B6 +S G$F0$0$0 Def00D5 +S G$RS1$0$0 Def00D4 +S G$RD$0$0 Def00B7 +S G$TR0$0$0 Def008C +S G$F1$0$0 Def00D1 +S G$TR1$0$0 Def008E +S G$PX0$0$0 Def00B8 +S G$ES$0$0 Def00AC +S G$PX1$0$0 Def00BA +S G$IP$0$0 Def00B8 +S G$PSW$0$0 Def00D0 +S G$RI$0$0 Def0098 +S _P0_0 Def0080 +S G$CY$0$0 Def00D7 +S _PCON Def0087 +S _SBUF Def0099 +S _P0_1 Def0081 +S _P1_0 Def0090 +S _P Def00D0 +S G$TI$0$0 Def0099 +S _P0_2 Def0082 +S _P1_1 Def0091 +S _P2_0 Def00A0 +S _P0_3 Def0083 +S _P1_2 Def0092 +S _P2_1 Def00A1 +S _P3_0 Def00B0 +S _SCON Def0098 +S _P0_4 Def0084 +S _P1_3 Def0093 +S _P2_2 Def00A2 +S _P3_1 Def00B1 +S G$P0$0$0 Def0080 +S _TCON Def0088 +S _TMOD Def0089 +S _P0_5 Def0085 +S _P1_4 Def0094 +S _P2_3 Def00A3 +S _P3_2 Def00B2 +S G$P1$0$0 Def0090 +S _P0_6 Def0086 +S _P1_5 Def0095 +S _P2_4 Def00A4 +S _P3_3 Def00B3 +S G$B$0$0 Def00F0 +S G$P2$0$0 Def00A0 +S _P0_7 Def0087 +S _P1_6 Def0096 +S _P2_5 Def00A5 +S _P3_4 Def00B4 +S G$PS$0$0 Def00BC +S G$P3$0$0 Def00B0 +S G$SP$0$0 Def0081 +S _P1_7 Def0097 +S _P2_6 Def00A6 +S _P3_5 Def00B5 +S G$T0$0$0 Def00B4 +S _P2_7 Def00A7 +S _P3_6 Def00B6 +S G$OV$0$0 Def00D2 +S G$T1$0$0 Def00B5 +S _P3_7 Def00B7 +S G$ACC$0$0 Def00E0 +S _INT0 Def00B2 +S _DPH Def0083 +S _INT1 Def00B3 +S G$WR$0$0 Def00B6 +S _IE0 Def0089 +S _IE1 Def008B +S _DPL Def0082 +S G$P0_0$0$0 Def0080 +S G$P$0$0 Def00D0 +S G$P1_0$0$0 Def0090 +S G$P0_1$0$0 Def0081 +S G$SBUF$0$0 Def0099 +S G$PCON$0$0 Def0087 +S _AC Def00D6 +S G$P2_0$0$0 Def00A0 +S G$P1_1$0$0 Def0091 +S G$P0_2$0$0 Def0082 +S _REN Def009C +S G$P3_0$0$0 Def00B0 +S G$P2_1$0$0 Def00A1 +S G$P1_2$0$0 Def0092 +S G$P0_3$0$0 Def0083 +S _EA Def00AF +S G$P3_1$0$0 Def00B1 +S G$P2_2$0$0 Def00A2 +S G$P1_3$0$0 Def0093 +S G$P0_4$0$0 Def0084 +S G$SCON$0$0 Def0098 +S G$P3_2$0$0 Def00B2 +S G$P2_3$0$0 Def00A3 +S G$P1_4$0$0 Def0094 +S G$P0_5$0$0 Def0085 +S G$TMOD$0$0 Def0089 +S G$TCON$0$0 Def0088 +S G$P3_3$0$0 Def00B3 +S G$P2_4$0$0 Def00A4 +S G$P1_5$0$0 Def0095 +S G$P0_6$0$0 Def0086 +S _ET0 Def00A9 +S G$P3_4$0$0 Def00B4 +S G$P2_5$0$0 Def00A5 +S G$P1_6$0$0 Def0096 +S G$P0_7$0$0 Def0087 +S _TF0 Def008D +S _ET1 Def00AB +S G$P3_5$0$0 Def00B5 +S G$P2_6$0$0 Def00A6 +S G$P1_7$0$0 Def0097 +S _TF1 Def008F +S G$P3_6$0$0 Def00B6 +S G$P2_7$0$0 Def00A7 +S _TH0 Def008C +S _RB8 Def009A +S __mcs51_genXINIT Ref0000 +S G$P3_7$0$0 Def00B7 +S _TH1 Def008D +S _IT0 Def0088 +S _EX0 Def00A8 +S _IE Def00A8 +S _IT1 Def008A +S _TB8 Def009B +S _EX1 Def00AA +S _RXD Def00B0 +S G$INT0$0$0 Def00B2 +S G$INT1$0$0 Def00B3 +S G$DPH$0$0 Def0083 +S _TL0 Def008A +S _SM0 Def009F +S _TXD Def00B1 +S _TL1 Def008B +S _SM1 Def009E +S G$IE0$0$0 Def0089 +S _SM2 Def009D +S G$IE1$0$0 Def008B +S G$DPL$0$0 Def0082 +S _PT0 Def00B9 +S _PT1 Def00BB +S _RS0 Def00D3 +S _TR0 Def008C +S _RD Def00B7 +S _RS1 Def00D4 +S _F0 Def00D5 +S _TR1 Def008E +S _F1 Def00D1 +S G$AC$0$0 Def00D6 +S _ES Def00AC +S _PX0 Def00B8 +S G$REN$0$0 Def009C +S _IP Def00B8 +S _PX1 Def00BA +S G$EA$0$0 Def00AF +S _PSW Def00D0 +S __sdcc_gsinit_startup Ref0000 +S _RI Def0098 +S _CY Def00D7 +S G$ET0$0$0 Def00A9 +S _TI Def0099 +S G$ET1$0$0 Def00AB +S G$TF0$0$0 Def008D +S G$TF1$0$0 Def008F +S __mcs51_genXRAMCLEAR Ref0000 +S G$RB8$0$0 Def009A +S G$TH0$0$0 Def008C +S _P0 Def0080 +A _CODE size 0 flags 0 addr 0 +A RSEG size 0 flags 0 addr 0 +A REG_BANK_0 size 8 flags 4 addr 0 +A DSEG size 3 flags 0 addr 0 +S _state Def0000 +S G$row$0$0 Def0001 +S G$state$0$0 Def0000 +S _row Def0001 +A OSEG size 0 flags 4 addr 0 +A SSEG size 1 flags 0 addr 0 +S __start__stack Def0000 +A ISEG size 0 flags 0 addr 0 +A IABS size 0 flags 8 addr 0 +A BSEG size 0 flags 80 addr 0 +A PSEG size 0 flags 50 addr 0 +A XSEG size 0 flags 40 addr 0 +A XABS size 0 flags 48 addr 0 +A XISEG size 0 flags 40 addr 0 +A HOME size 8 flags 20 addr 0 +S A$keypad_display$403 Def0003 +S A$keypad_display$405 Def0006 +S A$keypad_display$381 Def0000 +S __sdcc_program_startup Def0003 +A GSINIT0 size 0 flags 20 addr 0 +A GSINIT1 size 0 flags 20 addr 0 +A GSINIT2 size 0 flags 20 addr 0 +A GSINIT3 size 0 flags 20 addr 0 +A GSINIT4 size 0 flags 20 addr 0 +A GSINIT5 size 0 flags 20 addr 0 +A GSINIT size 0 flags 20 addr 0 +A GSFINAL size 3 flags 20 addr 0 +S A$keypad_display$396 Def0000 +A CSEG size B2 flags 20 addr 0 +S _main Def0000 +S XG$main$0$0 Def00AF +S A$keypad_display$510 Def0058 +S A$keypad_display$520 Def0069 +S A$keypad_display$511 Def0059 +S A$keypad_display$502 Def0051 +S A$keypad_display$530 Def007D +S A$keypad_display$521 Def006B +S A$keypad_display$512 Def005C +S A$keypad_display$440 Def0008 +S A$keypad_display$540 Def0086 +S A$keypad_display$522 Def006E +S A$keypad_display$450 Def0018 +S A$keypad_display$441 Def000A +S A$keypad_display$550 Def008B +S A$keypad_display$541 Def0087 +S A$keypad_display$523 Def006F +S A$keypad_display$514 Def005E +S A$keypad_display$451 Def001A +S A$keypad_display$442 Def000C +S A$keypad_display$551 Def008D +S A$keypad_display$524 Def0072 +S A$keypad_display$515 Def0060 +S A$keypad_display$470 Def002D +S A$keypad_display$452 Def001C +S A$keypad_display$443 Def000E +S A$keypad_display$434 Def0000 +S A$keypad_display$570 Def009D +S A$keypad_display$552 Def0090 +S A$keypad_display$534 Def007F +S A$keypad_display$516 Def0063 +S A$keypad_display$453 Def001E +S A$keypad_display$444 Def0010 +S A$keypad_display$435 Def0001 +S G$main$0$0 Def0000 +S A$keypad_display$562 Def0095 +S A$keypad_display$553 Def0091 +S A$keypad_display$526 Def0074 +S A$keypad_display$517 Def0064 +S A$keypad_display$508 Def0054 +S A$keypad_display$463 Def0025 +S A$keypad_display$454 Def001F +S A$keypad_display$436 Def0003 +S A$keypad_display$590 Def00AF +S A$keypad_display$563 Def0097 +S A$keypad_display$527 Def0076 +S A$keypad_display$518 Def0067 +S A$keypad_display$509 Def0055 +S A$keypad_display$491 Def0044 +S A$keypad_display$482 Def003A +S A$keypad_display$473 Def0030 +S A$keypad_display$455 Def0020 +S A$keypad_display$564 Def009A +S A$keypad_display$546 Def0089 +S A$keypad_display$528 Def0079 +S A$keypad_display$492 Def0047 +S A$keypad_display$483 Def003D +S A$keypad_display$474 Def0033 +S A$keypad_display$447 Def0012 +S A$keypad_display$438 Def0005 +S A$keypad_display$583 Def00A7 +S A$keypad_display$574 Def009F +S A$keypad_display$565 Def009B +S A$keypad_display$538 Def0081 +S A$keypad_display$529 Def007A +S A$keypad_display$466 Def0028 +S A$keypad_display$448 Def0014 +S A$keypad_display$439 Def0006 +S A$keypad_display$584 Def00A9 +S A$keypad_display$575 Def00A1 +S A$keypad_display$539 Def0083 +S A$keypad_display$449 Def0016 +S C$keypad_display.c$40$1$1 Def0000 +S A$keypad_display$585 Def00AA +S A$keypad_display$576 Def00A4 +S A$keypad_display$558 Def0093 +S A$keypad_display$459 Def0022 +S A$keypad_display$586 Def00AD +S A$keypad_display$577 Def00A5 +S A$keypad_display$496 Def0049 +S A$keypad_display$487 Def003F +S A$keypad_display$478 Def0035 +S A$keypad_display$469 Def002B +S A$keypad_display$497 Def004B +S A$keypad_display$488 Def0041 +S A$keypad_display$479 Def0037 +S C$keypad_display.c$41$2$2 Def00A7 +S A$keypad_display$498 Def004E +S C$keypad_display.c$38$0$0 Def0000 +S C$keypad_display.c$60$3$3 Def003F +S C$keypad_display.c$42$3$3 Def0012 +S C$keypad_display.c$81$2$2 Def00A7 +S C$keypad_display.c$84$1$1 Def00AF +S C$keypad_display.c$62$3$3 Def0049 +S C$keypad_display.c$53$3$3 Def0025 +S C$keypad_display.c$54$3$3 Def0028 +S C$keypad_display.c$65$3$3 Def0054 +S C$keypad_display.c$61$4$6 Def0044 +S C$keypad_display.c$56$3$3 Def002B +S C$keypad_display.c$48$3$3 Def0022 +S C$keypad_display.c$58$3$3 Def0035 +S C$keypad_display.c$70$4$9 Def0081 +S C$keypad_display.c$68$3$3 Def0054 +S C$keypad_display.c$63$4$7 Def0051 +S C$keypad_display.c$57$4$4 Def0030 +S C$keypad_display.c$71$4$9 Def0089 +S C$keypad_display.c$72$4$9 Def0089 +S C$keypad_display.c$73$4$9 Def008B +S C$keypad_display.c$59$4$5 Def003A +S C$keypad_display.c$74$4$9 Def0093 +S C$keypad_display.c$75$4$9 Def0093 +S C$keypad_display.c$76$4$9 Def0095 +S C$keypad_display.c$77$4$9 Def009D +S C$keypad_display.c$78$4$9 Def009D +S C$keypad_display.c$69$4$9 Def007F +S C$keypad_display.c$79$4$9 Def009F +A CONST size 14 flags 20 addr 0 +S Fkeypad_display$keypad$0$0 Def0000 +S Fkeypad_display$display_0$0$0 Def0004 +S Fkeypad_display$display_1$0$0 Def0008 +S Fkeypad_display$display_2$0$0 Def000C +S Fkeypad_display$display_3$0$0 Def0010 +A XINIT size 0 flags 20 addr 0 +A CABS size 0 flags 28 addr 0 +T 00 00 +R 00 00 00 02 +T 00 00 +R 00 00 00 03 +T 00 00 +R 00 00 00 03 +T 00 01 +R 00 00 00 03 +T 00 01 +R 00 00 00 03 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 0D +T 00 00 02 00 00 +R 00 00 00 0D 02 03 00 B8 +T 00 00 02 00 03 +R 00 00 00 15 00 03 00 0D +T 00 03 +R 00 00 00 0D +T 00 03 12 00 00 80 FE +R 00 00 00 0D 00 03 00 16 +T 00 00 +R 00 00 00 16 +T 00 00 +R 00 00 00 16 +T 00 00 E4 F5 00 00 01 F5 00 00 02 +R 00 00 00 16 F1 21 04 00 03 F1 21 08 00 03 +T 00 05 +R 00 00 00 16 +T 00 05 C3 E5 00 00 01 94 04 E5 00 00 02 64 80 94 +R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03 +T 00 0F 80 50 EE E5 00 00 01 24 00 00 00 F5 82 E5 +R 00 00 00 16 F1 21 06 00 03 F1 01 0A 00 17 +T 00 19 00 00 02 34 00 00 00 F5 83 E4 93 F5 90 85 +R 00 00 00 16 F1 21 02 00 03 F1 81 06 00 17 +T 00 23 90 00 00 00 53 00 00 00 0F 63 +R 00 00 00 16 F1 21 03 00 03 F1 01 07 00 03 +T 00 29 00 00 00 0F E5 00 00 00 30 E0 05 75 +R 00 00 00 16 F1 01 02 00 03 F1 21 07 00 03 +T 00 31 00 00 00 00 80 1F +R 00 00 00 16 F1 21 02 00 03 +T 00 35 +R 00 00 00 16 +T 00 35 E5 00 00 00 30 E1 05 75 00 00 00 01 80 15 +R 00 00 00 16 F1 21 03 00 03 F1 21 0A 00 03 +T 00 3F +R 00 00 00 16 +T 00 3F E5 00 00 00 30 E2 05 75 00 00 00 02 80 0B +R 00 00 00 16 F1 21 03 00 03 F1 21 0A 00 03 +T 00 49 +R 00 00 00 16 +T 00 49 E5 00 00 00 20 E3 03 02 00 A7 +R 00 00 00 16 F1 21 03 00 03 00 0A 00 16 +T 00 51 +R 00 00 00 16 +T 00 51 75 00 00 00 03 +R 00 00 00 16 F1 21 03 00 03 +T 00 54 +R 00 00 00 16 +T 00 54 E4 B5 00 00 01 06 E4 B5 00 00 02 02 80 23 +R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03 +T 00 5E +R 00 00 00 16 +T 00 5E 74 01 B5 00 00 01 06 E4 B5 00 00 02 02 80 +R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03 +T 00 68 22 +R 00 00 00 16 +T 00 69 +R 00 00 00 16 +T 00 69 74 02 B5 00 00 01 06 E4 B5 00 00 02 02 80 +R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03 +T 00 73 21 +R 00 00 00 16 +T 00 74 +R 00 00 00 16 +T 00 74 74 03 B5 00 00 01 06 E4 B5 00 00 02 02 80 +R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03 +T 00 7E 20 +R 00 00 00 16 +T 00 7F +R 00 00 00 16 +T 00 7F 80 26 +R 00 00 00 16 +T 00 81 +R 00 00 00 16 +T 00 81 E5 00 00 00 90 00 04 93 F5 B0 80 1C +R 00 00 00 16 F1 21 03 00 03 00 07 00 17 +T 00 8B +R 00 00 00 16 +T 00 8B E5 00 00 00 90 00 08 93 F5 B0 80 12 +R 00 00 00 16 F1 21 03 00 03 00 07 00 17 +T 00 95 +R 00 00 00 16 +T 00 95 E5 00 00 00 90 00 0C 93 F5 B0 80 08 +R 00 00 00 16 F1 21 03 00 03 00 07 00 17 +T 00 9F +R 00 00 00 16 +T 00 9F E5 00 00 00 90 00 10 93 F5 B0 +R 00 00 00 16 F1 21 03 00 03 00 07 00 17 +T 00 A7 +R 00 00 00 16 +T 00 A7 05 00 00 01 E4 B5 00 00 01 02 05 +R 00 00 00 16 F1 21 03 00 03 F1 21 08 00 03 +T 00 AE 00 00 02 +R 00 00 00 16 F1 21 02 00 03 +T 00 AF +R 00 00 00 16 +T 00 AF 02 00 05 +R 00 00 00 16 00 03 00 16 +T 00 00 +R 00 00 00 17 +T 00 00 EF DF BF 7F +R 00 00 00 17 +T 00 04 +R 00 00 00 17 +T 00 04 F9 64 70 48 +R 00 00 00 17 +T 00 08 +R 00 00 00 17 +T 00 08 59 52 42 40 +R 00 00 00 17 +T 00 0C +R 00 00 00 17 +T 00 0C F8 40 50 C6 +R 00 00 00 17 +T 00 10 +R 00 00 00 17 +T 00 10 79 C0 49 C0 +R 00 00 00 17 diff --git a/demo/keypad_display.rst b/demo/keypad_display.rst new file mode 100644 index 0000000..e013b8e --- /dev/null +++ b/demo/keypad_display.rst @@ -0,0 +1,624 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Tue Oct 27 23:03:55 2009 + 5 ;-------------------------------------------------------- + 6 .module keypad_display + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _CY + 14 .globl _AC + 15 .globl _F0 + 16 .globl _RS1 + 17 .globl _RS0 + 18 .globl _OV + 19 .globl _F1 + 20 .globl _P + 21 .globl _PS + 22 .globl _PT1 + 23 .globl _PX1 + 24 .globl _PT0 + 25 .globl _PX0 + 26 .globl _RD + 27 .globl _WR + 28 .globl _T1 + 29 .globl _T0 + 30 .globl _INT1 + 31 .globl _INT0 + 32 .globl _TXD + 33 .globl _RXD + 34 .globl _P3_7 + 35 .globl _P3_6 + 36 .globl _P3_5 + 37 .globl _P3_4 + 38 .globl _P3_3 + 39 .globl _P3_2 + 40 .globl _P3_1 + 41 .globl _P3_0 + 42 .globl _EA + 43 .globl _ES + 44 .globl _ET1 + 45 .globl _EX1 + 46 .globl _ET0 + 47 .globl _EX0 + 48 .globl _P2_7 + 49 .globl _P2_6 + 50 .globl _P2_5 + 51 .globl _P2_4 + 52 .globl _P2_3 + 53 .globl _P2_2 + 54 .globl _P2_1 + 55 .globl _P2_0 + 56 .globl _SM0 + 57 .globl _SM1 + 58 .globl _SM2 + 59 .globl _REN + 60 .globl _TB8 + 61 .globl _RB8 + 62 .globl _TI + 63 .globl _RI + 64 .globl _P1_7 + 65 .globl _P1_6 + 66 .globl _P1_5 + 67 .globl _P1_4 + 68 .globl _P1_3 + 69 .globl _P1_2 + 70 .globl _P1_1 + 71 .globl _P1_0 + 72 .globl _TF1 + 73 .globl _TR1 + 74 .globl _TF0 + 75 .globl _TR0 + 76 .globl _IE1 + 77 .globl _IT1 + 78 .globl _IE0 + 79 .globl _IT0 + 80 .globl _P0_7 + 81 .globl _P0_6 + 82 .globl _P0_5 + 83 .globl _P0_4 + 84 .globl _P0_3 + 85 .globl _P0_2 + 86 .globl _P0_1 + 87 .globl _P0_0 + 88 .globl _B + 89 .globl _ACC + 90 .globl _PSW + 91 .globl _IP + 92 .globl _P3 + 93 .globl _IE + 94 .globl _P2 + 95 .globl _SBUF + 96 .globl _SCON + 97 .globl _P1 + 98 .globl _TH1 + 99 .globl _TH0 + 100 .globl _TL1 + 101 .globl _TL0 + 102 .globl _TMOD + 103 .globl _TCON + 104 .globl _PCON + 105 .globl _DPH + 106 .globl _DPL + 107 .globl _SP + 108 .globl _P0 + 109 .globl _row + 110 .globl _state + 111 ;-------------------------------------------------------- + 112 ; special function registers + 113 ;-------------------------------------------------------- + 114 .area RSEG (DATA) + 0080 115 G$P0$0$0 == 0x0080 + 0080 116 _P0 = 0x0080 + 0081 117 G$SP$0$0 == 0x0081 + 0081 118 _SP = 0x0081 + 0082 119 G$DPL$0$0 == 0x0082 + 0082 120 _DPL = 0x0082 + 0083 121 G$DPH$0$0 == 0x0083 + 0083 122 _DPH = 0x0083 + 0087 123 G$PCON$0$0 == 0x0087 + 0087 124 _PCON = 0x0087 + 0088 125 G$TCON$0$0 == 0x0088 + 0088 126 _TCON = 0x0088 + 0089 127 G$TMOD$0$0 == 0x0089 + 0089 128 _TMOD = 0x0089 + 008A 129 G$TL0$0$0 == 0x008a + 008A 130 _TL0 = 0x008a + 008B 131 G$TL1$0$0 == 0x008b + 008B 132 _TL1 = 0x008b + 008C 133 G$TH0$0$0 == 0x008c + 008C 134 _TH0 = 0x008c + 008D 135 G$TH1$0$0 == 0x008d + 008D 136 _TH1 = 0x008d + 0090 137 G$P1$0$0 == 0x0090 + 0090 138 _P1 = 0x0090 + 0098 139 G$SCON$0$0 == 0x0098 + 0098 140 _SCON = 0x0098 + 0099 141 G$SBUF$0$0 == 0x0099 + 0099 142 _SBUF = 0x0099 + 00A0 143 G$P2$0$0 == 0x00a0 + 00A0 144 _P2 = 0x00a0 + 00A8 145 G$IE$0$0 == 0x00a8 + 00A8 146 _IE = 0x00a8 + 00B0 147 G$P3$0$0 == 0x00b0 + 00B0 148 _P3 = 0x00b0 + 00B8 149 G$IP$0$0 == 0x00b8 + 00B8 150 _IP = 0x00b8 + 00D0 151 G$PSW$0$0 == 0x00d0 + 00D0 152 _PSW = 0x00d0 + 00E0 153 G$ACC$0$0 == 0x00e0 + 00E0 154 _ACC = 0x00e0 + 00F0 155 G$B$0$0 == 0x00f0 + 00F0 156 _B = 0x00f0 + 157 ;-------------------------------------------------------- + 158 ; special function bits + 159 ;-------------------------------------------------------- + 160 .area RSEG (DATA) + 0080 161 G$P0_0$0$0 == 0x0080 + 0080 162 _P0_0 = 0x0080 + 0081 163 G$P0_1$0$0 == 0x0081 + 0081 164 _P0_1 = 0x0081 + 0082 165 G$P0_2$0$0 == 0x0082 + 0082 166 _P0_2 = 0x0082 + 0083 167 G$P0_3$0$0 == 0x0083 + 0083 168 _P0_3 = 0x0083 + 0084 169 G$P0_4$0$0 == 0x0084 + 0084 170 _P0_4 = 0x0084 + 0085 171 G$P0_5$0$0 == 0x0085 + 0085 172 _P0_5 = 0x0085 + 0086 173 G$P0_6$0$0 == 0x0086 + 0086 174 _P0_6 = 0x0086 + 0087 175 G$P0_7$0$0 == 0x0087 + 0087 176 _P0_7 = 0x0087 + 0088 177 G$IT0$0$0 == 0x0088 + 0088 178 _IT0 = 0x0088 + 0089 179 G$IE0$0$0 == 0x0089 + 0089 180 _IE0 = 0x0089 + 008A 181 G$IT1$0$0 == 0x008a + 008A 182 _IT1 = 0x008a + 008B 183 G$IE1$0$0 == 0x008b + 008B 184 _IE1 = 0x008b + 008C 185 G$TR0$0$0 == 0x008c + 008C 186 _TR0 = 0x008c + 008D 187 G$TF0$0$0 == 0x008d + 008D 188 _TF0 = 0x008d + 008E 189 G$TR1$0$0 == 0x008e + 008E 190 _TR1 = 0x008e + 008F 191 G$TF1$0$0 == 0x008f + 008F 192 _TF1 = 0x008f + 0090 193 G$P1_0$0$0 == 0x0090 + 0090 194 _P1_0 = 0x0090 + 0091 195 G$P1_1$0$0 == 0x0091 + 0091 196 _P1_1 = 0x0091 + 0092 197 G$P1_2$0$0 == 0x0092 + 0092 198 _P1_2 = 0x0092 + 0093 199 G$P1_3$0$0 == 0x0093 + 0093 200 _P1_3 = 0x0093 + 0094 201 G$P1_4$0$0 == 0x0094 + 0094 202 _P1_4 = 0x0094 + 0095 203 G$P1_5$0$0 == 0x0095 + 0095 204 _P1_5 = 0x0095 + 0096 205 G$P1_6$0$0 == 0x0096 + 0096 206 _P1_6 = 0x0096 + 0097 207 G$P1_7$0$0 == 0x0097 + 0097 208 _P1_7 = 0x0097 + 0098 209 G$RI$0$0 == 0x0098 + 0098 210 _RI = 0x0098 + 0099 211 G$TI$0$0 == 0x0099 + 0099 212 _TI = 0x0099 + 009A 213 G$RB8$0$0 == 0x009a + 009A 214 _RB8 = 0x009a + 009B 215 G$TB8$0$0 == 0x009b + 009B 216 _TB8 = 0x009b + 009C 217 G$REN$0$0 == 0x009c + 009C 218 _REN = 0x009c + 009D 219 G$SM2$0$0 == 0x009d + 009D 220 _SM2 = 0x009d + 009E 221 G$SM1$0$0 == 0x009e + 009E 222 _SM1 = 0x009e + 009F 223 G$SM0$0$0 == 0x009f + 009F 224 _SM0 = 0x009f + 00A0 225 G$P2_0$0$0 == 0x00a0 + 00A0 226 _P2_0 = 0x00a0 + 00A1 227 G$P2_1$0$0 == 0x00a1 + 00A1 228 _P2_1 = 0x00a1 + 00A2 229 G$P2_2$0$0 == 0x00a2 + 00A2 230 _P2_2 = 0x00a2 + 00A3 231 G$P2_3$0$0 == 0x00a3 + 00A3 232 _P2_3 = 0x00a3 + 00A4 233 G$P2_4$0$0 == 0x00a4 + 00A4 234 _P2_4 = 0x00a4 + 00A5 235 G$P2_5$0$0 == 0x00a5 + 00A5 236 _P2_5 = 0x00a5 + 00A6 237 G$P2_6$0$0 == 0x00a6 + 00A6 238 _P2_6 = 0x00a6 + 00A7 239 G$P2_7$0$0 == 0x00a7 + 00A7 240 _P2_7 = 0x00a7 + 00A8 241 G$EX0$0$0 == 0x00a8 + 00A8 242 _EX0 = 0x00a8 + 00A9 243 G$ET0$0$0 == 0x00a9 + 00A9 244 _ET0 = 0x00a9 + 00AA 245 G$EX1$0$0 == 0x00aa + 00AA 246 _EX1 = 0x00aa + 00AB 247 G$ET1$0$0 == 0x00ab + 00AB 248 _ET1 = 0x00ab + 00AC 249 G$ES$0$0 == 0x00ac + 00AC 250 _ES = 0x00ac + 00AF 251 G$EA$0$0 == 0x00af + 00AF 252 _EA = 0x00af + 00B0 253 G$P3_0$0$0 == 0x00b0 + 00B0 254 _P3_0 = 0x00b0 + 00B1 255 G$P3_1$0$0 == 0x00b1 + 00B1 256 _P3_1 = 0x00b1 + 00B2 257 G$P3_2$0$0 == 0x00b2 + 00B2 258 _P3_2 = 0x00b2 + 00B3 259 G$P3_3$0$0 == 0x00b3 + 00B3 260 _P3_3 = 0x00b3 + 00B4 261 G$P3_4$0$0 == 0x00b4 + 00B4 262 _P3_4 = 0x00b4 + 00B5 263 G$P3_5$0$0 == 0x00b5 + 00B5 264 _P3_5 = 0x00b5 + 00B6 265 G$P3_6$0$0 == 0x00b6 + 00B6 266 _P3_6 = 0x00b6 + 00B7 267 G$P3_7$0$0 == 0x00b7 + 00B7 268 _P3_7 = 0x00b7 + 00B0 269 G$RXD$0$0 == 0x00b0 + 00B0 270 _RXD = 0x00b0 + 00B1 271 G$TXD$0$0 == 0x00b1 + 00B1 272 _TXD = 0x00b1 + 00B2 273 G$INT0$0$0 == 0x00b2 + 00B2 274 _INT0 = 0x00b2 + 00B3 275 G$INT1$0$0 == 0x00b3 + 00B3 276 _INT1 = 0x00b3 + 00B4 277 G$T0$0$0 == 0x00b4 + 00B4 278 _T0 = 0x00b4 + 00B5 279 G$T1$0$0 == 0x00b5 + 00B5 280 _T1 = 0x00b5 + 00B6 281 G$WR$0$0 == 0x00b6 + 00B6 282 _WR = 0x00b6 + 00B7 283 G$RD$0$0 == 0x00b7 + 00B7 284 _RD = 0x00b7 + 00B8 285 G$PX0$0$0 == 0x00b8 + 00B8 286 _PX0 = 0x00b8 + 00B9 287 G$PT0$0$0 == 0x00b9 + 00B9 288 _PT0 = 0x00b9 + 00BA 289 G$PX1$0$0 == 0x00ba + 00BA 290 _PX1 = 0x00ba + 00BB 291 G$PT1$0$0 == 0x00bb + 00BB 292 _PT1 = 0x00bb + 00BC 293 G$PS$0$0 == 0x00bc + 00BC 294 _PS = 0x00bc + 00D0 295 G$P$0$0 == 0x00d0 + 00D0 296 _P = 0x00d0 + 00D1 297 G$F1$0$0 == 0x00d1 + 00D1 298 _F1 = 0x00d1 + 00D2 299 G$OV$0$0 == 0x00d2 + 00D2 300 _OV = 0x00d2 + 00D3 301 G$RS0$0$0 == 0x00d3 + 00D3 302 _RS0 = 0x00d3 + 00D4 303 G$RS1$0$0 == 0x00d4 + 00D4 304 _RS1 = 0x00d4 + 00D5 305 G$F0$0$0 == 0x00d5 + 00D5 306 _F0 = 0x00d5 + 00D6 307 G$AC$0$0 == 0x00d6 + 00D6 308 _AC = 0x00d6 + 00D7 309 G$CY$0$0 == 0x00d7 + 00D7 310 _CY = 0x00d7 + 311 ;-------------------------------------------------------- + 312 ; overlayable register banks + 313 ;-------------------------------------------------------- + 314 .area REG_BANK_0 (REL,OVR,DATA) + 0000 315 .ds 8 + 316 ;-------------------------------------------------------- + 317 ; internal ram data + 318 ;-------------------------------------------------------- + 319 .area DSEG (DATA) + 0000 320 G$state$0$0==. + 0008 321 _state:: + 0008 322 .ds 1 + 0001 323 G$row$0$0==. + 0009 324 _row:: + 0009 325 .ds 2 + 326 ;-------------------------------------------------------- + 327 ; overlayable items in internal ram + 328 ;-------------------------------------------------------- + 329 .area OSEG (OVR,DATA) + 330 ;-------------------------------------------------------- + 331 ; Stack segment in internal ram + 332 ;-------------------------------------------------------- + 333 .area SSEG (DATA) + 000B 334 __start__stack: + 000B 335 .ds 1 + 336 + 337 ;-------------------------------------------------------- + 338 ; indirectly addressable internal ram data + 339 ;-------------------------------------------------------- + 340 .area ISEG (DATA) + 341 ;-------------------------------------------------------- + 342 ; absolute internal ram data + 343 ;-------------------------------------------------------- + 344 .area IABS (ABS,DATA) + 345 .area IABS (ABS,DATA) + 346 ;-------------------------------------------------------- + 347 ; bit data + 348 ;-------------------------------------------------------- + 349 .area BSEG (BIT) + 350 ;-------------------------------------------------------- + 351 ; paged external ram data + 352 ;-------------------------------------------------------- + 353 .area PSEG (PAG,XDATA) + 354 ;-------------------------------------------------------- + 355 ; external ram data + 356 ;-------------------------------------------------------- + 357 .area XSEG (XDATA) + 358 ;-------------------------------------------------------- + 359 ; absolute external ram data + 360 ;-------------------------------------------------------- + 361 .area XABS (ABS,XDATA) + 362 ;-------------------------------------------------------- + 363 ; external initialized ram data + 364 ;-------------------------------------------------------- + 365 .area XISEG (XDATA) + 366 .area HOME (CODE) + 367 .area GSINIT0 (CODE) + 368 .area GSINIT1 (CODE) + 369 .area GSINIT2 (CODE) + 370 .area GSINIT3 (CODE) + 371 .area GSINIT4 (CODE) + 372 .area GSINIT5 (CODE) + 373 .area GSINIT (CODE) + 374 .area GSFINAL (CODE) + 375 .area CSEG (CODE) + 376 ;-------------------------------------------------------- + 377 ; interrupt vector + 378 ;-------------------------------------------------------- + 379 .area HOME (CODE) + 0000 380 __interrupt_vect: + 0000 02 00 08 381 ljmp __sdcc_gsinit_startup + 382 ;-------------------------------------------------------- + 383 ; global & static initialisations + 384 ;-------------------------------------------------------- + 385 .area HOME (CODE) + 386 .area GSINIT (CODE) + 387 .area GSFINAL (CODE) + 388 .area GSINIT (CODE) + 389 .globl __sdcc_gsinit_startup + 390 .globl __sdcc_program_startup + 391 .globl __start__stack + 392 .globl __mcs51_genXINIT + 393 .globl __mcs51_genXRAMCLEAR + 394 .globl __mcs51_genRAMCLEAR + 395 .area GSFINAL (CODE) + 0061 02 00 03 396 ljmp __sdcc_program_startup + 397 ;-------------------------------------------------------- + 398 ; Home + 399 ;-------------------------------------------------------- + 400 .area HOME (CODE) + 401 .area HOME (CODE) + 0003 402 __sdcc_program_startup: + 0003 12 00 64 403 lcall _main + 404 ; return from main will lock up + 0006 80 FE 405 sjmp . + 406 ;-------------------------------------------------------- + 407 ; code + 408 ;-------------------------------------------------------- + 409 .area CSEG (CODE) + 410 ;------------------------------------------------------------ + 411 ;Allocation info for local variables in function 'main' + 412 ;------------------------------------------------------------ + 413 ;------------------------------------------------------------ + 0000 414 G$main$0$0 ==. + 0000 415 C$keypad_display.c$38$0$0 ==. + 416 ; keypad_display.c:38: int main() + 417 ; ----------------------------------------- + 418 ; function main + 419 ; ----------------------------------------- + 0064 420 _main: + 0002 421 ar2 = 0x02 + 0003 422 ar3 = 0x03 + 0004 423 ar4 = 0x04 + 0005 424 ar5 = 0x05 + 0006 425 ar6 = 0x06 + 0007 426 ar7 = 0x07 + 0000 427 ar0 = 0x00 + 0001 428 ar1 = 0x01 + 0000 429 C$keypad_display.c$40$1$1 ==. + 430 ; keypad_display.c:40: while(1) { + 0064 431 00123$: + 0000 432 C$keypad_display.c$41$2$2 ==. + 433 ; keypad_display.c:41: for(row=0; row<4; row++) { + 0064 E4 434 clr a + 0065 F5 09 435 mov _row,a + 0067 F5 0A 436 mov (_row + 1),a + 0069 437 00118$: + 0069 C3 438 clr c + 006A E5 09 439 mov a,_row + 006C 94 04 440 subb a,#0x04 + 006E E5 0A 441 mov a,(_row + 1) + 0070 64 80 442 xrl a,#0x80 + 0072 94 80 443 subb a,#0x80 + 0074 50 EE 444 jnc 00123$ + 0012 445 C$keypad_display.c$42$3$3 ==. + 446 ; keypad_display.c:42: P1=keypad[row]; + 0076 E5 09 447 mov a,_row + 0078 24 1A 448 add a,#_keypad + 007A F5 82 449 mov dpl,a + 007C E5 0A 450 mov a,(_row + 1) + 007E 34 01 451 addc a,#(_keypad >> 8) + 0080 F5 83 452 mov dph,a + 0082 E4 453 clr a + 0083 93 454 movc a,@a+dptr + 0084 F5 90 455 mov _P1,a + 0022 456 C$keypad_display.c$48$3$3 ==. + 457 ; keypad_display.c:48: _endasm; + 458 + 0086 85 90 08 459 mov _state, P1 + 460 + 0025 461 C$keypad_display.c$53$3$3 ==. + 462 ; keypad_display.c:53: state&=0x0f; + 0089 53 08 0F 463 anl _state,#0x0F + 0028 464 C$keypad_display.c$54$3$3 ==. + 465 ; keypad_display.c:54: state^=0x0f; + 008C 63 08 0F 466 xrl _state,#0x0F + 002B 467 C$keypad_display.c$56$3$3 ==. + 468 ; keypad_display.c:56: if(state & 1) { + 008F E5 08 469 mov a,_state + 0091 30 E0 05 470 jnb acc.0,00111$ + 0030 471 C$keypad_display.c$57$4$4 ==. + 472 ; keypad_display.c:57: state=0; + 0094 75 08 00 473 mov _state,#0x00 + 0097 80 1F 474 sjmp 00112$ + 0099 475 00111$: + 0035 476 C$keypad_display.c$58$3$3 ==. + 477 ; keypad_display.c:58: } else if(state & 2) { + 0099 E5 08 478 mov a,_state + 009B 30 E1 05 479 jnb acc.1,00108$ + 003A 480 C$keypad_display.c$59$4$5 ==. + 481 ; keypad_display.c:59: state=1; + 009E 75 08 01 482 mov _state,#0x01 + 00A1 80 15 483 sjmp 00112$ + 00A3 484 00108$: + 003F 485 C$keypad_display.c$60$3$3 ==. + 486 ; keypad_display.c:60: } else if(state & 4) { + 00A3 E5 08 487 mov a,_state + 00A5 30 E2 05 488 jnb acc.2,00105$ + 0044 489 C$keypad_display.c$61$4$6 ==. + 490 ; keypad_display.c:61: state=2; + 00A8 75 08 02 491 mov _state,#0x02 + 00AB 80 0B 492 sjmp 00112$ + 00AD 493 00105$: + 0049 494 C$keypad_display.c$62$3$3 ==. + 495 ; keypad_display.c:62: } else if(state & 8) { + 00AD E5 08 496 mov a,_state + 00AF 20 E3 03 497 jb acc.3,00142$ + 00B2 02 01 0B 498 ljmp 00120$ + 00B5 499 00142$: + 0051 500 C$keypad_display.c$63$4$7 ==. + 501 ; keypad_display.c:63: state=3; + 00B5 75 08 03 502 mov _state,#0x03 + 0054 503 C$keypad_display.c$65$3$3 ==. + 504 ; keypad_display.c:65: continue; + 00B8 505 00112$: + 0054 506 C$keypad_display.c$68$3$3 ==. + 507 ; keypad_display.c:68: switch(row) { + 00B8 E4 508 clr a + 00B9 B5 09 06 509 cjne a,_row,00143$ + 00BC E4 510 clr a + 00BD B5 0A 02 511 cjne a,(_row + 1),00143$ + 00C0 80 23 512 sjmp 00113$ + 00C2 513 00143$: + 00C2 74 01 514 mov a,#0x01 + 00C4 B5 09 06 515 cjne a,_row,00144$ + 00C7 E4 516 clr a + 00C8 B5 0A 02 517 cjne a,(_row + 1),00144$ + 00CB 80 22 518 sjmp 00114$ + 00CD 519 00144$: + 00CD 74 02 520 mov a,#0x02 + 00CF B5 09 06 521 cjne a,_row,00145$ + 00D2 E4 522 clr a + 00D3 B5 0A 02 523 cjne a,(_row + 1),00145$ + 00D6 80 21 524 sjmp 00115$ + 00D8 525 00145$: + 00D8 74 03 526 mov a,#0x03 + 00DA B5 09 06 527 cjne a,_row,00146$ + 00DD E4 528 clr a + 00DE B5 0A 02 529 cjne a,(_row + 1),00146$ + 00E1 80 20 530 sjmp 00116$ + 00E3 531 00146$: + 007F 532 C$keypad_display.c$69$4$9 ==. + 533 ; keypad_display.c:69: case 0: + 00E3 80 26 534 sjmp 00120$ + 00E5 535 00113$: + 0081 536 C$keypad_display.c$70$4$9 ==. + 537 ; keypad_display.c:70: P3=display_0[state]; + 00E5 E5 08 538 mov a,_state + 00E7 90 01 1E 539 mov dptr,#_display_0 + 00EA 93 540 movc a,@a+dptr + 00EB F5 B0 541 mov _P3,a + 0089 542 C$keypad_display.c$71$4$9 ==. + 543 ; keypad_display.c:71: break; + 0089 544 C$keypad_display.c$72$4$9 ==. + 545 ; keypad_display.c:72: case 1: + 00ED 80 1C 546 sjmp 00120$ + 00EF 547 00114$: + 008B 548 C$keypad_display.c$73$4$9 ==. + 549 ; keypad_display.c:73: P3=display_1[state]; + 00EF E5 08 550 mov a,_state + 00F1 90 01 22 551 mov dptr,#_display_1 + 00F4 93 552 movc a,@a+dptr + 00F5 F5 B0 553 mov _P3,a + 0093 554 C$keypad_display.c$74$4$9 ==. + 555 ; keypad_display.c:74: break; + 0093 556 C$keypad_display.c$75$4$9 ==. + 557 ; keypad_display.c:75: case 2: + 00F7 80 12 558 sjmp 00120$ + 00F9 559 00115$: + 0095 560 C$keypad_display.c$76$4$9 ==. + 561 ; keypad_display.c:76: P3=display_2[state]; + 00F9 E5 08 562 mov a,_state + 00FB 90 01 26 563 mov dptr,#_display_2 + 00FE 93 564 movc a,@a+dptr + 00FF F5 B0 565 mov _P3,a + 009D 566 C$keypad_display.c$77$4$9 ==. + 567 ; keypad_display.c:77: break; + 009D 568 C$keypad_display.c$78$4$9 ==. + 569 ; keypad_display.c:78: case 3: + 0101 80 08 570 sjmp 00120$ + 0103 571 00116$: + 009F 572 C$keypad_display.c$79$4$9 ==. + 573 ; keypad_display.c:79: P3=display_3[state]; + 0103 E5 08 574 mov a,_state + 0105 90 01 2A 575 mov dptr,#_display_3 + 0108 93 576 movc a,@a+dptr + 0109 F5 B0 577 mov _P3,a + 00A7 578 C$keypad_display.c$81$2$2 ==. + 579 ; keypad_display.c:81: } + 010B 580 00120$: + 00A7 581 C$keypad_display.c$41$2$2 ==. + 582 ; keypad_display.c:41: for(row=0; row<4; row++) { + 010B 05 09 583 inc _row + 010D E4 584 clr a + 010E B5 09 02 585 cjne a,_row,00147$ + 0111 05 0A 586 inc (_row + 1) + 0113 587 00147$: + 00AF 588 C$keypad_display.c$84$1$1 ==. + 00AF 589 XG$main$0$0 ==. + 0113 02 00 69 590 ljmp 00118$ + 591 .area CSEG (CODE) + 592 .area CONST (CODE) + 0000 593 Fkeypad_display$keypad$0$0 == . + 011A 594 _keypad: + 011A EF 595 .db #0xEF + 011B DF 596 .db #0xDF + 011C BF 597 .db #0xBF + 011D 7F 598 .db #0x7F + 0004 599 Fkeypad_display$display_0$0$0 == . + 011E 600 _display_0: + 011E F9 601 .db #0xF9 + 011F 64 602 .db #0x64 + 0120 70 603 .db #0x70 + 0121 48 604 .db #0x48 + 0008 605 Fkeypad_display$display_1$0$0 == . + 0122 606 _display_1: + 0122 59 607 .db #0x59 + 0123 52 608 .db #0x52 + 0124 42 609 .db #0x42 + 0125 40 610 .db #0x40 + 000C 611 Fkeypad_display$display_2$0$0 == . + 0126 612 _display_2: + 0126 F8 613 .db #0xF8 + 0127 40 614 .db #0x40 + 0128 50 615 .db #0x50 + 0129 C6 616 .db #0xC6 + 0010 617 Fkeypad_display$display_3$0$0 == . + 012A 618 _display_3: + 012A 79 619 .db #0x79 + 012B C0 620 .db #0xC0 + 012C 49 621 .db #0x49 + 012D C0 622 .db #0xC0 + 623 .area XINIT (CODE) + 624 .area CABS (ABS,CODE) diff --git a/demo/keypad_display.sym b/demo/keypad_display.sym new file mode 100644 index 0000000..eded721 --- /dev/null +++ b/demo/keypad_display.sym @@ -0,0 +1,712 @@ + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 1. + +Symbol Table + + A 00D6 + D A$keypad_display$381 0000 GR + 15 A$keypad_display$396 0000 GR + D A$keypad_display$403 0003 GR + D A$keypad_display$405 0006 GR + 16 A$keypad_display$434 0000 GR + 16 A$keypad_display$435 0001 GR + 16 A$keypad_display$436 0003 GR + 16 A$keypad_display$438 0005 GR + 16 A$keypad_display$439 0006 GR + 16 A$keypad_display$440 0008 GR + 16 A$keypad_display$441 000A GR + 16 A$keypad_display$442 000C GR + 16 A$keypad_display$443 000E GR + 16 A$keypad_display$444 0010 GR + 16 A$keypad_display$447 0012 GR + 16 A$keypad_display$448 0014 GR + 16 A$keypad_display$449 0016 GR + 16 A$keypad_display$450 0018 GR + 16 A$keypad_display$451 001A GR + 16 A$keypad_display$452 001C GR + 16 A$keypad_display$453 001E GR + 16 A$keypad_display$454 001F GR + 16 A$keypad_display$455 0020 GR + 16 A$keypad_display$459 0022 GR + 16 A$keypad_display$463 0025 GR + 16 A$keypad_display$466 0028 GR + 16 A$keypad_display$469 002B GR + 16 A$keypad_display$470 002D GR + 16 A$keypad_display$473 0030 GR + 16 A$keypad_display$474 0033 GR + 16 A$keypad_display$478 0035 GR + 16 A$keypad_display$479 0037 GR + 16 A$keypad_display$482 003A GR + 16 A$keypad_display$483 003D GR + 16 A$keypad_display$487 003F GR + 16 A$keypad_display$488 0041 GR + 16 A$keypad_display$491 0044 GR + 16 A$keypad_display$492 0047 GR + 16 A$keypad_display$496 0049 GR + 16 A$keypad_display$497 004B GR + 16 A$keypad_display$498 004E GR + 16 A$keypad_display$502 0051 GR + 16 A$keypad_display$508 0054 GR + 16 A$keypad_display$509 0055 GR + 16 A$keypad_display$510 0058 GR + 16 A$keypad_display$511 0059 GR + 16 A$keypad_display$512 005C GR + 16 A$keypad_display$514 005E GR + 16 A$keypad_display$515 0060 GR + 16 A$keypad_display$516 0063 GR + 16 A$keypad_display$517 0064 GR + 16 A$keypad_display$518 0067 GR + 16 A$keypad_display$520 0069 GR + 16 A$keypad_display$521 006B GR + 16 A$keypad_display$522 006E GR + 16 A$keypad_display$523 006F GR + 16 A$keypad_display$524 0072 GR + 16 A$keypad_display$526 0074 GR + 16 A$keypad_display$527 0076 GR + 16 A$keypad_display$528 0079 GR + 16 A$keypad_display$529 007A GR + 16 A$keypad_display$530 007D GR + 16 A$keypad_display$534 007F GR + 16 A$keypad_display$538 0081 GR + 16 A$keypad_display$539 0083 GR + 16 A$keypad_display$540 0086 GR + 16 A$keypad_display$541 0087 GR + 16 A$keypad_display$546 0089 GR + 16 A$keypad_display$550 008B GR + 16 A$keypad_display$551 008D GR + 16 A$keypad_display$552 0090 GR + 16 A$keypad_display$553 0091 GR + 16 A$keypad_display$558 0093 GR + 16 A$keypad_display$562 0095 GR + 16 A$keypad_display$563 0097 GR + 16 A$keypad_display$564 009A GR + 16 A$keypad_display$565 009B GR + 16 A$keypad_display$570 009D GR + 16 A$keypad_display$574 009F GR + 16 A$keypad_display$575 00A1 GR + 16 A$keypad_display$576 00A4 GR + 16 A$keypad_display$577 00A5 GR + 16 A$keypad_display$583 00A7 GR + 16 A$keypad_display$584 00A9 GR + 16 A$keypad_display$585 00AA GR + 16 A$keypad_display$586 00AD GR + 16 A$keypad_display$590 00AF GR + AC 00D6 + ACC 00E0 + ACC.0 00E0 + ACC.1 00E1 + ACC.2 00E2 + ACC.3 00E3 + ACC.4 00E4 + ACC.5 00E5 + ACC.6 00E6 + ACC.7 00E7 + B 00F0 + B.0 00F0 + B.1 00F1 + B.2 00F2 + B.3 00F3 + B.4 00F4 + B.5 00F5 + B.6 00F6 + B.7 00F7 + 16 C$keypad_display.c$38$0$0 = 0000 GR + 16 C$keypad_display.c$40$1$1 = 0000 GR + 16 C$keypad_display.c$41$2$2 = 00A7 GR + 16 C$keypad_display.c$42$3$3 = 0012 GR + 16 C$keypad_display.c$48$3$3 = 0022 GR + 16 C$keypad_display.c$53$3$3 = 0025 GR + 16 C$keypad_display.c$54$3$3 = 0028 GR + 16 C$keypad_display.c$56$3$3 = 002B GR + 16 C$keypad_display.c$57$4$4 = 0030 GR + 16 C$keypad_display.c$58$3$3 = 0035 GR + 16 C$keypad_display.c$59$4$5 = 003A GR + 16 C$keypad_display.c$60$3$3 = 003F GR + 16 C$keypad_display.c$61$4$6 = 0044 GR + 16 C$keypad_display.c$62$3$3 = 0049 GR + 16 C$keypad_display.c$63$4$7 = 0051 GR + 16 C$keypad_display.c$65$3$3 = 0054 GR + 16 C$keypad_display.c$68$3$3 = 0054 GR + 16 C$keypad_display.c$69$4$9 = 007F GR + 16 C$keypad_display.c$70$4$9 = 0081 GR + 16 C$keypad_display.c$71$4$9 = 0089 GR + 16 C$keypad_display.c$72$4$9 = 0089 GR + 16 C$keypad_display.c$73$4$9 = 008B GR + 16 C$keypad_display.c$74$4$9 = 0093 GR + 16 C$keypad_display.c$75$4$9 = 0093 GR + 16 C$keypad_display.c$76$4$9 = 0095 GR + 16 C$keypad_display.c$77$4$9 = 009D GR + 16 C$keypad_display.c$78$4$9 = 009D GR + 16 C$keypad_display.c$79$4$9 = 009F GR + 16 C$keypad_display.c$81$2$2 = 00A7 GR + 16 C$keypad_display.c$84$1$1 = 00AF GR + CPRL2 00C8 + CT2 00C9 + CY 00D7 + DPH 0083 + DPL 0082 + EA 00AF + ES 00AC + ET0 00A9 + ET1 00AB + ET2 00AD + EX0 00A8 + EX1 00AA + EXEN2 00CB + EXF2 00CE + F0 00D5 + 17 Fkeypad_display$display_0$0$0 = 0004 GR + 17 Fkeypad_display$display_1$0$0 = 0008 GR + 17 Fkeypad_display$display_2$0$0 = 000C GR + 17 Fkeypad_display$display_3$0$0 = 0010 GR + 17 Fkeypad_display$keypad$0$0 = 0000 GR + G$AC$0$0 = 00D6 G + G$ACC$0$0 = 00E0 G + G$B$0$0 = 00F0 G + G$CY$0$0 = 00D7 G + G$DPH$0$0 = 0083 G + G$DPL$0$0 = 0082 G + G$EA$0$0 = 00AF G + G$ES$0$0 = 00AC G + G$ET0$0$0 = 00A9 G + G$ET1$0$0 = 00AB G + G$EX0$0$0 = 00A8 G + G$EX1$0$0 = 00AA G + G$F0$0$0 = 00D5 G + G$F1$0$0 = 00D1 G + G$IE$0$0 = 00A8 G + G$IE0$0$0 = 0089 G + G$IE1$0$0 = 008B G + G$INT0$0$0 = 00B2 G + G$INT1$0$0 = 00B3 G + G$IP$0$0 = 00B8 G + G$IT0$0$0 = 0088 G + G$IT1$0$0 = 008A G + G$OV$0$0 = 00D2 G + G$P$0$0 = 00D0 G + G$P0$0$0 = 0080 G + G$P0_0$0$0 = 0080 G + G$P0_1$0$0 = 0081 G + G$P0_2$0$0 = 0082 G + G$P0_3$0$0 = 0083 G + G$P0_4$0$0 = 0084 G + G$P0_5$0$0 = 0085 G + G$P0_6$0$0 = 0086 G + G$P0_7$0$0 = 0087 G + G$P1$0$0 = 0090 G + G$P1_0$0$0 = 0090 G + G$P1_1$0$0 = 0091 G + G$P1_2$0$0 = 0092 G + G$P1_3$0$0 = 0093 G + G$P1_4$0$0 = 0094 G + G$P1_5$0$0 = 0095 G + G$P1_6$0$0 = 0096 G + G$P1_7$0$0 = 0097 G + G$P2$0$0 = 00A0 G + G$P2_0$0$0 = 00A0 G + G$P2_1$0$0 = 00A1 G + G$P2_2$0$0 = 00A2 G + G$P2_3$0$0 = 00A3 G + G$P2_4$0$0 = 00A4 G + G$P2_5$0$0 = 00A5 G + G$P2_6$0$0 = 00A6 G + G$P2_7$0$0 = 00A7 G + G$P3$0$0 = 00B0 G + G$P3_0$0$0 = 00B0 G + G$P3_1$0$0 = 00B1 G + G$P3_2$0$0 = 00B2 G + G$P3_3$0$0 = 00B3 G + G$P3_4$0$0 = 00B4 G + G$P3_5$0$0 = 00B5 G + G$P3_6$0$0 = 00B6 G + G$P3_7$0$0 = 00B7 G + G$PCON$0$0 = 0087 G + G$PS$0$0 = 00BC G + G$PSW$0$0 = 00D0 G + G$PT0$0$0 = 00B9 G + G$PT1$0$0 = 00BB G + G$PX0$0$0 = 00B8 G + G$PX1$0$0 = 00BA G + G$RB8$0$0 = 009A G + G$RD$0$0 = 00B7 G + G$REN$0$0 = 009C G + G$RI$0$0 = 0098 G + G$RS0$0$0 = 00D3 G + G$RS1$0$0 = 00D4 G + G$RXD$0$0 = 00B0 G + G$SBUF$0$0 = 0099 G + G$SCON$0$0 = 0098 G + G$SM0$0$0 = 009F G + G$SM1$0$0 = 009E G + G$SM2$0$0 = 009D G + G$SP$0$0 = 0081 G + G$T0$0$0 = 00B4 G + G$T1$0$0 = 00B5 G + G$TB8$0$0 = 009B G + G$TCON$0$0 = 0088 G + G$TF0$0$0 = 008D G + G$TF1$0$0 = 008F G + G$TH0$0$0 = 008C G + G$TH1$0$0 = 008D G + G$TI$0$0 = 0099 G + G$TL0$0$0 = 008A G + G$TL1$0$0 = 008B G + G$TMOD$0$0 = 0089 G + G$TR0$0$0 = 008C G + G$TR1$0$0 = 008E G + G$TXD$0$0 = 00B1 G + G$WR$0$0 = 00B6 G + 16 G$main$0$0 = 0000 GR + 3 G$row$0$0 = 0001 GR + 3 G$state$0$0 = 0000 GR + IE 00A8 + IE.0 00A8 + IE.1 00A9 + IE.2 00AA + IE.3 00AB + IE.4 00AC + IE.5 00AD + IE.7 00AF + IE0 0089 + IE1 008B + INT0 00B2 + INT1 00B3 + IP 00B8 + IP.0 00B8 + IP.1 00B9 + IP.2 00BA + IP.3 00BB + IP.4 00BC + IP.5 00BD + IT0 0088 + IT1 008A + OV 00D2 + P 00D0 + P0 0080 + P0.0 0080 + P0.1 0081 + P0.2 0082 + P0.3 0083 + P0.4 0084 + P0.5 0085 + P0.6 0086 + P0.7 0087 + P1 0090 + P1.0 0090 + P1.1 0091 + P1.2 0092 + P1.3 0093 + P1.4 0094 + P1.5 0095 + P1.6 0096 + P1.7 0097 + P2 00A0 + P2.0 00A0 + P2.1 00A1 + P2.2 00A2 + P2.3 00A3 + P2.4 00A4 + P2.5 00A5 + P2.6 00A6 + P2.7 00A7 + P3 00B0 + P3.0 00B0 + P3.1 00B1 + P3.2 00B2 + P3.3 00B3 + P3.4 00B4 + P3.5 00B5 + P3.6 00B6 + P3.7 00B7 + PCON 0087 + PS 00BC + PSW 00D0 + PSW.0 00D0 + PSW.1 00D1 + PSW.2 00D2 + PSW.3 00D3 + PSW.4 00D4 + PSW.5 00D5 + PSW.6 00D6 + PSW.7 00D7 + PT0 00B9 + PT1 00BB + PT2 00BD + PX0 00B8 + PX1 00BA + RB8 009A + RCAP2H 00CB + RCAP2L 00CA + RCLK 00CD + REN 009C + RI 0098 + RS0 00D3 + RS1 00D4 + RXD 00B0 + SBUF 0099 + SCON 0098 + SCON.0 0098 + SCON.1 0099 + SCON.2 009A + SCON.3 009B + SCON.4 009C + SCON.5 009D + SCON.6 009E + SCON.7 009F + SM0 009F + SM1 009E + SM2 009D + SP 0081 + T2CON 00C8 + T2CON.0 00C8 + T2CON.1 00C9 + T2CON.2 00CA + T2CON.3 00CB + T2CON.4 00CC + T2CON.5 00CD + T2CON.6 00CE + T2CON.7 00CF + TB8 009B + TCLK 00CC + TCON 0088 + TCON.0 0088 + TCON.1 0089 + TCON.2 008A + TCON.3 008B + TCON.4 008C + TCON.5 008D + TCON.6 008E + TCON.7 008F + TF0 008D + TF1 008F + TF2 00CF + TH0 008C + TH1 008D + TH2 00CD + TI 0099 + TL0 008A + TL1 008B + TL2 00CC + TMOD 0089 + TR0 008C + TR1 008E + TR2 00CA + TXD 00B1 + 16 XG$main$0$0 = 00AF GR + _AC = 00D6 G + _ACC = 00E0 G + _B = 00F0 G + _CY = 00D7 G + _DPH = 0083 G + _DPL = 0082 G + _EA = 00AF G + _ES = 00AC G + _ET0 = 00A9 G + _ET1 = 00AB G + _EX0 = 00A8 G + _EX1 = 00AA G + _F0 = 00D5 G + _F1 = 00D1 G + _IE = 00A8 G + _IE0 = 0089 G + _IE1 = 008B G + _INT0 = 00B2 G + _INT1 = 00B3 G + _IP = 00B8 G + _IT0 = 0088 G + _IT1 = 008A G + _OV = 00D2 G + _P = 00D0 G + _P0 = 0080 G + _P0_0 = 0080 G + _P0_1 = 0081 G + _P0_2 = 0082 G + _P0_3 = 0083 G + _P0_4 = 0084 G + _P0_5 = 0085 G + _P0_6 = 0086 G + _P0_7 = 0087 G + _P1 = 0090 G + _P1_0 = 0090 G + _P1_1 = 0091 G + _P1_2 = 0092 G + _P1_3 = 0093 G + _P1_4 = 0094 G + _P1_5 = 0095 G + _P1_6 = 0096 G + _P1_7 = 0097 G + _P2 = 00A0 G + _P2_0 = 00A0 G + _P2_1 = 00A1 G + _P2_2 = 00A2 G + _P2_3 = 00A3 G + _P2_4 = 00A4 G + _P2_5 = 00A5 G + _P2_6 = 00A6 G + _P2_7 = 00A7 G + _P3 = 00B0 G + _P3_0 = 00B0 G + _P3_1 = 00B1 G + _P3_2 = 00B2 G + _P3_3 = 00B3 G + _P3_4 = 00B4 G + _P3_5 = 00B5 G + _P3_6 = 00B6 G + _P3_7 = 00B7 G + _PCON = 0087 G + _PS = 00BC G + _PSW = 00D0 G + _PT0 = 00B9 G + _PT1 = 00BB G + _PX0 = 00B8 G + _PX1 = 00BA G + _RB8 = 009A G + _RD = 00B7 G + _REN = 009C G + _RI = 0098 G + _RS0 = 00D3 G + _RS1 = 00D4 G + _RXD = 00B0 G + _SBUF = 0099 G + _SCON = 0098 G + _SM0 = 009F G + _SM1 = 009E G + _SM2 = 009D G + _SP = 0081 G + _T0 = 00B4 G + _T1 = 00B5 G + _TB8 = 009B G + _TCON = 0088 G + _TF0 = 008D G + _TF1 = 008F G + _TH0 = 008C G + _TH1 = 008D G + _TI = 0099 G + _TL0 = 008A G + _TL1 = 008B G + _TMOD = 0089 G + _TR0 = 008C G + _TR1 = 008E G + _TXD = 00B1 G + _WR = 00B6 G + D __interrupt_vect 0000 R + __mcs51_genRAMCLEAR **** GX + __mcs51_genXINIT **** GX + __mcs51_genXRAMCLEAR **** GX + __sdcc_gsinit_startup **** GX + D __sdcc_program_startup 0003 GR + 5 __start__stack 0000 GR + 17 _display_0 0004 R + 17 _display_1 0008 R + 17 _display_2 000C R + 17 _display_3 0010 R + 17 _keypad 0000 R + 16 _main 0000 GR + 3 _row 0001 GR + 3 _state 0000 GR + a 00D6 + ac 00D6 + acc 00E0 + acc.0 00E0 + acc.1 00E1 + acc.2 00E2 + acc.3 00E3 + acc.4 00E4 + acc.5 00E5 + acc.6 00E6 + acc.7 00E7 + ar0 = 0000 + ar1 = 0001 + ar2 = 0002 + ar3 = 0003 + ar4 = 0004 + ar5 = 0005 + ar6 = 0006 + ar7 = 0007 + b 00F0 + b.0 00F0 + b.1 00F1 + b.2 00F2 + b.3 00F3 + b.4 00F4 + b.5 00F5 + b.6 00F6 + b.7 00F7 + cprl2 00C8 + ct2 00C9 + cy 00D7 + dph 0083 + dpl 0082 + ea 00AF + es 00AC + et0 00A9 + et1 00AB + et2 00AD + ex0 00A8 + ex1 00AA + exen2 00CB + exf2 00CE + f0 00D5 + ie 00A8 + ie.0 00A8 + ie.1 00A9 + ie.2 00AA + ie.3 00AB + ie.4 00AC + ie.5 00AD + ie.7 00AF + ie0 0089 + ie1 008B + int0 00B2 + int1 00B3 + ip 00B8 + ip.0 00B8 + ip.1 00B9 + ip.2 00BA + ip.3 00BB + ip.4 00BC + ip.5 00BD + it0 0088 + it1 008A + ov 00D2 + p 00D0 + p0 0080 + p0.0 0080 + p0.1 0081 + p0.2 0082 + p0.3 0083 + p0.4 0084 + p0.5 0085 + p0.6 0086 + p0.7 0087 + p1 0090 + p1.0 0090 + p1.1 0091 + p1.2 0092 + p1.3 0093 + p1.4 0094 + p1.5 0095 + p1.6 0096 + p1.7 0097 + p2 00A0 + p2.0 00A0 + p2.1 00A1 + p2.2 00A2 + p2.3 00A3 + p2.4 00A4 + p2.5 00A5 + p2.6 00A6 + p2.7 00A7 + p3 00B0 + p3.0 00B0 + p3.1 00B1 + p3.2 00B2 + p3.3 00B3 + p3.4 00B4 + p3.5 00B5 + p3.6 00B6 + p3.7 00B7 + pcon 0087 + ps 00BC + psw 00D0 + psw.0 00D0 + psw.1 00D1 + psw.2 00D2 + psw.3 00D3 + psw.4 00D4 + psw.5 00D5 + psw.6 00D6 + psw.7 00D7 + pt0 00B9 + pt1 00BB + pt2 00BD + px0 00B8 + px1 00BA + rb8 009A + rcap2h 00CB + rcap2l 00CA + rclk 00CD + ren 009C + ri 0098 + rs0 00D3 + rs1 00D4 + rxd 00B0 + sbuf 0099 + scon 0098 + scon.0 0098 + scon.1 0099 + scon.2 009A + scon.3 009B + scon.4 009C + scon.5 009D + scon.6 009E + scon.7 009F + sm0 009F + sm1 009E + sm2 009D + sp 0081 + t2con 00C8 + t2con.0 00C8 + t2con.1 00C9 + t2con.2 00CA + t2con.3 00CB + t2con.4 00CC + t2con.5 00CD + t2con.6 00CE + t2con.7 00CF + tb8 009B + tclk 00CC + tcon 0088 + tcon.0 0088 + tcon.1 0089 + tcon.2 008A + tcon.3 008B + tcon.4 008C + tcon.5 008D + tcon.6 008E + tcon.7 008F + tf0 008D + tf1 008F + tf2 00CF + th0 008C + th1 008D + th2 00CD + ti 0099 + tl0 008A + tl1 008B + tl2 00CC + tmod 0089 + tr0 008C + tr1 008E + tr2 00CA + txd 00B1 + + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 2. + +Area Table + + 0 _CODE size 0 flags 0 + 1 RSEG size 0 flags 0 + 2 REG_BANK_0 size 8 flags 4 + 3 DSEG size 3 flags 0 + 4 OSEG size 0 flags 4 + 5 SSEG size 1 flags 0 + 6 ISEG size 0 flags 0 + 7 IABS size 0 flags 8 + 8 BSEG size 0 flags 80 + 9 PSEG size 0 flags 50 + A XSEG size 0 flags 40 + B XABS size 0 flags 48 + C XISEG size 0 flags 40 + D HOME size 8 flags 20 + E GSINIT0 size 0 flags 20 + F GSINIT1 size 0 flags 20 + 10 GSINIT2 size 0 flags 20 + 11 GSINIT3 size 0 flags 20 + 12 GSINIT4 size 0 flags 20 + 13 GSINIT5 size 0 flags 20 + 14 GSINIT size 0 flags 20 + 15 GSFINAL size 3 flags 20 + 16 CSEG size B2 flags 20 + 17 CONST size 14 flags 20 + 18 XINIT size 0 flags 20 + 19 CABS size 0 flags 28 diff --git a/demo/keypad_display.vhw b/demo/keypad_display.vhw new file mode 100644 index 0000000..0a716f1 --- /dev/null +++ b/demo/keypad_display.vhw @@ -0,0 +1,6 @@ +# MCU 8051 IDE: Virtual HW configuration file +# Date: 10/27/2009 +# Project: Demo-project + +LedDisplay {{4 3 0 3 5 3 1 3 6 3 2 3 7 3 3 3} {4 3 0 7 5 2 1 6 6 0 2 5 7 - 3 4} 230x170+335+204 {Number of pressed key} red 1} +MatrixKeyPad {{4 1 0 1 5 1 1 1 6 1 2 1 7 1 3 1} {4 7 0 3 5 6 1 2 6 5 2 1 7 4 3 0} 225x235+79+174 {Pres any button and wait ...} {0 0 1 0 2 1 3 0 4 0 5 0 6 0 7 0 8 0 9 0 10 0 11 0 12 0 13 0 14 0 15 0} 1} diff --git a/demo/ledmatrix.adb b/demo/ledmatrix.adb new file mode 100644 index 0000000..d573f21 --- /dev/null +++ b/demo/ledmatrix.adb @@ -0,0 +1,102 @@ +M:ledmatrix +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +S:Lmain$i$1$1({2}SI:S),R,0,0,[r2,r3] +S:G$P0$0$0({1}SC:U),I,0,0 +S:G$SP$0$0({1}SC:U),I,0,0 +S:G$DPL$0$0({1}SC:U),I,0,0 +S:G$DPH$0$0({1}SC:U),I,0,0 +S:G$PCON$0$0({1}SC:U),I,0,0 +S:G$TCON$0$0({1}SC:U),I,0,0 +S:G$TMOD$0$0({1}SC:U),I,0,0 +S:G$TL0$0$0({1}SC:U),I,0,0 +S:G$TL1$0$0({1}SC:U),I,0,0 +S:G$TH0$0$0({1}SC:U),I,0,0 +S:G$TH1$0$0({1}SC:U),I,0,0 +S:G$P1$0$0({1}SC:U),I,0,0 +S:G$SCON$0$0({1}SC:U),I,0,0 +S:G$SBUF$0$0({1}SC:U),I,0,0 +S:G$P2$0$0({1}SC:U),I,0,0 +S:G$IE$0$0({1}SC:U),I,0,0 +S:G$P3$0$0({1}SC:U),I,0,0 +S:G$IP$0$0({1}SC:U),I,0,0 +S:G$PSW$0$0({1}SC:U),I,0,0 +S:G$ACC$0$0({1}SC:U),I,0,0 +S:G$A$0$0({1}SC:U),I,0,0 +S:G$B$0$0({1}SC:U),I,0,0 +S:G$P0_0$0$0({1}SX:U),J,0,0 +S:G$P0_1$0$0({1}SX:U),J,0,0 +S:G$P0_2$0$0({1}SX:U),J,0,0 +S:G$P0_3$0$0({1}SX:U),J,0,0 +S:G$P0_4$0$0({1}SX:U),J,0,0 +S:G$P0_5$0$0({1}SX:U),J,0,0 +S:G$P0_6$0$0({1}SX:U),J,0,0 +S:G$P0_7$0$0({1}SX:U),J,0,0 +S:G$IT0$0$0({1}SX:U),J,0,0 +S:G$IE0$0$0({1}SX:U),J,0,0 +S:G$IT1$0$0({1}SX:U),J,0,0 +S:G$IE1$0$0({1}SX:U),J,0,0 +S:G$TR0$0$0({1}SX:U),J,0,0 +S:G$TF0$0$0({1}SX:U),J,0,0 +S:G$TR1$0$0({1}SX:U),J,0,0 +S:G$TF1$0$0({1}SX:U),J,0,0 +S:G$P1_0$0$0({1}SX:U),J,0,0 +S:G$P1_1$0$0({1}SX:U),J,0,0 +S:G$P1_2$0$0({1}SX:U),J,0,0 +S:G$P1_3$0$0({1}SX:U),J,0,0 +S:G$P1_4$0$0({1}SX:U),J,0,0 +S:G$P1_5$0$0({1}SX:U),J,0,0 +S:G$P1_6$0$0({1}SX:U),J,0,0 +S:G$P1_7$0$0({1}SX:U),J,0,0 +S:G$RI$0$0({1}SX:U),J,0,0 +S:G$TI$0$0({1}SX:U),J,0,0 +S:G$RB8$0$0({1}SX:U),J,0,0 +S:G$TB8$0$0({1}SX:U),J,0,0 +S:G$REN$0$0({1}SX:U),J,0,0 +S:G$SM2$0$0({1}SX:U),J,0,0 +S:G$SM1$0$0({1}SX:U),J,0,0 +S:G$SM0$0$0({1}SX:U),J,0,0 +S:G$P2_0$0$0({1}SX:U),J,0,0 +S:G$P2_1$0$0({1}SX:U),J,0,0 +S:G$P2_2$0$0({1}SX:U),J,0,0 +S:G$P2_3$0$0({1}SX:U),J,0,0 +S:G$P2_4$0$0({1}SX:U),J,0,0 +S:G$P2_5$0$0({1}SX:U),J,0,0 +S:G$P2_6$0$0({1}SX:U),J,0,0 +S:G$P2_7$0$0({1}SX:U),J,0,0 +S:G$EX0$0$0({1}SX:U),J,0,0 +S:G$ET0$0$0({1}SX:U),J,0,0 +S:G$EX1$0$0({1}SX:U),J,0,0 +S:G$ET1$0$0({1}SX:U),J,0,0 +S:G$ES$0$0({1}SX:U),J,0,0 +S:G$EA$0$0({1}SX:U),J,0,0 +S:G$P3_0$0$0({1}SX:U),J,0,0 +S:G$P3_1$0$0({1}SX:U),J,0,0 +S:G$P3_2$0$0({1}SX:U),J,0,0 +S:G$P3_3$0$0({1}SX:U),J,0,0 +S:G$P3_4$0$0({1}SX:U),J,0,0 +S:G$P3_5$0$0({1}SX:U),J,0,0 +S:G$P3_6$0$0({1}SX:U),J,0,0 +S:G$P3_7$0$0({1}SX:U),J,0,0 +S:G$RXD$0$0({1}SX:U),J,0,0 +S:G$TXD$0$0({1}SX:U),J,0,0 +S:G$INT0$0$0({1}SX:U),J,0,0 +S:G$INT1$0$0({1}SX:U),J,0,0 +S:G$T0$0$0({1}SX:U),J,0,0 +S:G$T1$0$0({1}SX:U),J,0,0 +S:G$WR$0$0({1}SX:U),J,0,0 +S:G$RD$0$0({1}SX:U),J,0,0 +S:G$PX0$0$0({1}SX:U),J,0,0 +S:G$PT0$0$0({1}SX:U),J,0,0 +S:G$PX1$0$0({1}SX:U),J,0,0 +S:G$PT1$0$0({1}SX:U),J,0,0 +S:G$PS$0$0({1}SX:U),J,0,0 +S:G$P$0$0({1}SX:U),J,0,0 +S:G$FL$0$0({1}SX:U),J,0,0 +S:G$OV$0$0({1}SX:U),J,0,0 +S:G$RS0$0$0({1}SX:U),J,0,0 +S:G$RS1$0$0({1}SX:U),J,0,0 +S:G$F0$0$0({1}SX:U),J,0,0 +S:G$AC$0$0({1}SX:U),J,0,0 +S:G$CY$0$0({1}SX:U),J,0,0 +S:G$main$0$0({2}DF,SI:S),C,0,0 +S:Fledmatrix$image$0$0({8}DA8,SC:S),D,0,0 diff --git a/demo/ledmatrix.asm b/demo/ledmatrix.asm new file mode 100644 index 0000000..d1b8e55 --- /dev/null +++ b/demo/ledmatrix.asm @@ -0,0 +1,494 @@ +;-------------------------------------------------------- +; File Created by SDCC : free open source ANSI-C Compiler +; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) +; This file was generated Mon Oct 19 23:11:07 2009 +;-------------------------------------------------------- + .module ledmatrix + .optsdcc -mmcs51 --model-small + +;-------------------------------------------------------- +; Public variables in this module +;-------------------------------------------------------- + .globl _main + .globl _CY + .globl _AC + .globl _F0 + .globl _RS1 + .globl _RS0 + .globl _OV + .globl _FL + .globl _P + .globl _PS + .globl _PT1 + .globl _PX1 + .globl _PT0 + .globl _PX0 + .globl _RD + .globl _WR + .globl _T1 + .globl _T0 + .globl _INT1 + .globl _INT0 + .globl _TXD + .globl _RXD + .globl _P3_7 + .globl _P3_6 + .globl _P3_5 + .globl _P3_4 + .globl _P3_3 + .globl _P3_2 + .globl _P3_1 + .globl _P3_0 + .globl _EA + .globl _ES + .globl _ET1 + .globl _EX1 + .globl _ET0 + .globl _EX0 + .globl _P2_7 + .globl _P2_6 + .globl _P2_5 + .globl _P2_4 + .globl _P2_3 + .globl _P2_2 + .globl _P2_1 + .globl _P2_0 + .globl _SM0 + .globl _SM1 + .globl _SM2 + .globl _REN + .globl _TB8 + .globl _RB8 + .globl _TI + .globl _RI + .globl _P1_7 + .globl _P1_6 + .globl _P1_5 + .globl _P1_4 + .globl _P1_3 + .globl _P1_2 + .globl _P1_1 + .globl _P1_0 + .globl _TF1 + .globl _TR1 + .globl _TF0 + .globl _TR0 + .globl _IE1 + .globl _IT1 + .globl _IE0 + .globl _IT0 + .globl _P0_7 + .globl _P0_6 + .globl _P0_5 + .globl _P0_4 + .globl _P0_3 + .globl _P0_2 + .globl _P0_1 + .globl _P0_0 + .globl _B + .globl _A + .globl _ACC + .globl _PSW + .globl _IP + .globl _P3 + .globl _IE + .globl _P2 + .globl _SBUF + .globl _SCON + .globl _P1 + .globl _TH1 + .globl _TH0 + .globl _TL1 + .globl _TL0 + .globl _TMOD + .globl _TCON + .globl _PCON + .globl _DPH + .globl _DPL + .globl _SP + .globl _P0 +;-------------------------------------------------------- +; special function registers +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0$0$0 == 0x0080 +_P0 = 0x0080 +G$SP$0$0 == 0x0081 +_SP = 0x0081 +G$DPL$0$0 == 0x0082 +_DPL = 0x0082 +G$DPH$0$0 == 0x0083 +_DPH = 0x0083 +G$PCON$0$0 == 0x0087 +_PCON = 0x0087 +G$TCON$0$0 == 0x0088 +_TCON = 0x0088 +G$TMOD$0$0 == 0x0089 +_TMOD = 0x0089 +G$TL0$0$0 == 0x008a +_TL0 = 0x008a +G$TL1$0$0 == 0x008b +_TL1 = 0x008b +G$TH0$0$0 == 0x008c +_TH0 = 0x008c +G$TH1$0$0 == 0x008d +_TH1 = 0x008d +G$P1$0$0 == 0x0090 +_P1 = 0x0090 +G$SCON$0$0 == 0x0098 +_SCON = 0x0098 +G$SBUF$0$0 == 0x0099 +_SBUF = 0x0099 +G$P2$0$0 == 0x00a0 +_P2 = 0x00a0 +G$IE$0$0 == 0x00a8 +_IE = 0x00a8 +G$P3$0$0 == 0x00b0 +_P3 = 0x00b0 +G$IP$0$0 == 0x00b8 +_IP = 0x00b8 +G$PSW$0$0 == 0x00d0 +_PSW = 0x00d0 +G$ACC$0$0 == 0x00e0 +_ACC = 0x00e0 +G$A$0$0 == 0x00e0 +_A = 0x00e0 +G$B$0$0 == 0x00f0 +_B = 0x00f0 +;-------------------------------------------------------- +; special function bits +;-------------------------------------------------------- + .area RSEG (DATA) +G$P0_0$0$0 == 0x0080 +_P0_0 = 0x0080 +G$P0_1$0$0 == 0x0081 +_P0_1 = 0x0081 +G$P0_2$0$0 == 0x0082 +_P0_2 = 0x0082 +G$P0_3$0$0 == 0x0083 +_P0_3 = 0x0083 +G$P0_4$0$0 == 0x0084 +_P0_4 = 0x0084 +G$P0_5$0$0 == 0x0085 +_P0_5 = 0x0085 +G$P0_6$0$0 == 0x0086 +_P0_6 = 0x0086 +G$P0_7$0$0 == 0x0087 +_P0_7 = 0x0087 +G$IT0$0$0 == 0x0088 +_IT0 = 0x0088 +G$IE0$0$0 == 0x0089 +_IE0 = 0x0089 +G$IT1$0$0 == 0x008a +_IT1 = 0x008a +G$IE1$0$0 == 0x008b +_IE1 = 0x008b +G$TR0$0$0 == 0x008c +_TR0 = 0x008c +G$TF0$0$0 == 0x008d +_TF0 = 0x008d +G$TR1$0$0 == 0x008e +_TR1 = 0x008e +G$TF1$0$0 == 0x008f +_TF1 = 0x008f +G$P1_0$0$0 == 0x0090 +_P1_0 = 0x0090 +G$P1_1$0$0 == 0x0091 +_P1_1 = 0x0091 +G$P1_2$0$0 == 0x0092 +_P1_2 = 0x0092 +G$P1_3$0$0 == 0x0093 +_P1_3 = 0x0093 +G$P1_4$0$0 == 0x0094 +_P1_4 = 0x0094 +G$P1_5$0$0 == 0x0095 +_P1_5 = 0x0095 +G$P1_6$0$0 == 0x0096 +_P1_6 = 0x0096 +G$P1_7$0$0 == 0x0097 +_P1_7 = 0x0097 +G$RI$0$0 == 0x0098 +_RI = 0x0098 +G$TI$0$0 == 0x0099 +_TI = 0x0099 +G$RB8$0$0 == 0x009a +_RB8 = 0x009a +G$TB8$0$0 == 0x009b +_TB8 = 0x009b +G$REN$0$0 == 0x009c +_REN = 0x009c +G$SM2$0$0 == 0x009d +_SM2 = 0x009d +G$SM1$0$0 == 0x009e +_SM1 = 0x009e +G$SM0$0$0 == 0x009f +_SM0 = 0x009f +G$P2_0$0$0 == 0x00a0 +_P2_0 = 0x00a0 +G$P2_1$0$0 == 0x00a1 +_P2_1 = 0x00a1 +G$P2_2$0$0 == 0x00a2 +_P2_2 = 0x00a2 +G$P2_3$0$0 == 0x00a3 +_P2_3 = 0x00a3 +G$P2_4$0$0 == 0x00a4 +_P2_4 = 0x00a4 +G$P2_5$0$0 == 0x00a5 +_P2_5 = 0x00a5 +G$P2_6$0$0 == 0x00a6 +_P2_6 = 0x00a6 +G$P2_7$0$0 == 0x00a7 +_P2_7 = 0x00a7 +G$EX0$0$0 == 0x00a8 +_EX0 = 0x00a8 +G$ET0$0$0 == 0x00a9 +_ET0 = 0x00a9 +G$EX1$0$0 == 0x00aa +_EX1 = 0x00aa +G$ET1$0$0 == 0x00ab +_ET1 = 0x00ab +G$ES$0$0 == 0x00ac +_ES = 0x00ac +G$EA$0$0 == 0x00af +_EA = 0x00af +G$P3_0$0$0 == 0x00b0 +_P3_0 = 0x00b0 +G$P3_1$0$0 == 0x00b1 +_P3_1 = 0x00b1 +G$P3_2$0$0 == 0x00b2 +_P3_2 = 0x00b2 +G$P3_3$0$0 == 0x00b3 +_P3_3 = 0x00b3 +G$P3_4$0$0 == 0x00b4 +_P3_4 = 0x00b4 +G$P3_5$0$0 == 0x00b5 +_P3_5 = 0x00b5 +G$P3_6$0$0 == 0x00b6 +_P3_6 = 0x00b6 +G$P3_7$0$0 == 0x00b7 +_P3_7 = 0x00b7 +G$RXD$0$0 == 0x00b0 +_RXD = 0x00b0 +G$TXD$0$0 == 0x00b1 +_TXD = 0x00b1 +G$INT0$0$0 == 0x00b2 +_INT0 = 0x00b2 +G$INT1$0$0 == 0x00b3 +_INT1 = 0x00b3 +G$T0$0$0 == 0x00b4 +_T0 = 0x00b4 +G$T1$0$0 == 0x00b5 +_T1 = 0x00b5 +G$WR$0$0 == 0x00b6 +_WR = 0x00b6 +G$RD$0$0 == 0x00b7 +_RD = 0x00b7 +G$PX0$0$0 == 0x00b8 +_PX0 = 0x00b8 +G$PT0$0$0 == 0x00b9 +_PT0 = 0x00b9 +G$PX1$0$0 == 0x00ba +_PX1 = 0x00ba +G$PT1$0$0 == 0x00bb +_PT1 = 0x00bb +G$PS$0$0 == 0x00bc +_PS = 0x00bc +G$P$0$0 == 0x00d0 +_P = 0x00d0 +G$FL$0$0 == 0x00d1 +_FL = 0x00d1 +G$OV$0$0 == 0x00d2 +_OV = 0x00d2 +G$RS0$0$0 == 0x00d3 +_RS0 = 0x00d3 +G$RS1$0$0 == 0x00d4 +_RS1 = 0x00d4 +G$F0$0$0 == 0x00d5 +_F0 = 0x00d5 +G$AC$0$0 == 0x00d6 +_AC = 0x00d6 +G$CY$0$0 == 0x00d7 +_CY = 0x00d7 +;-------------------------------------------------------- +; overlayable register banks +;-------------------------------------------------------- + .area REG_BANK_0 (REL,OVR,DATA) + .ds 8 +;-------------------------------------------------------- +; internal ram data +;-------------------------------------------------------- + .area DSEG (DATA) +;-------------------------------------------------------- +; overlayable items in internal ram +;-------------------------------------------------------- + .area OSEG (OVR,DATA) +;-------------------------------------------------------- +; Stack segment in internal ram +;-------------------------------------------------------- + .area SSEG (DATA) +__start__stack: + .ds 1 + +;-------------------------------------------------------- +; indirectly addressable internal ram data +;-------------------------------------------------------- + .area ISEG (DATA) +;-------------------------------------------------------- +; absolute internal ram data +;-------------------------------------------------------- + .area IABS (ABS,DATA) + .area IABS (ABS,DATA) +;-------------------------------------------------------- +; bit data +;-------------------------------------------------------- + .area BSEG (BIT) +;-------------------------------------------------------- +; paged external ram data +;-------------------------------------------------------- + .area PSEG (PAG,XDATA) +;-------------------------------------------------------- +; external ram data +;-------------------------------------------------------- + .area XSEG (XDATA) +;-------------------------------------------------------- +; absolute external ram data +;-------------------------------------------------------- + .area XABS (ABS,XDATA) +;-------------------------------------------------------- +; external initialized ram data +;-------------------------------------------------------- + .area XISEG (XDATA) + .area HOME (CODE) + .area GSINIT0 (CODE) + .area GSINIT1 (CODE) + .area GSINIT2 (CODE) + .area GSINIT3 (CODE) + .area GSINIT4 (CODE) + .area GSINIT5 (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area CSEG (CODE) +;-------------------------------------------------------- +; interrupt vector +;-------------------------------------------------------- + .area HOME (CODE) +__interrupt_vect: + ljmp __sdcc_gsinit_startup +;-------------------------------------------------------- +; global & static initialisations +;-------------------------------------------------------- + .area HOME (CODE) + .area GSINIT (CODE) + .area GSFINAL (CODE) + .area GSINIT (CODE) + .globl __sdcc_gsinit_startup + .globl __sdcc_program_startup + .globl __start__stack + .globl __mcs51_genXINIT + .globl __mcs51_genXRAMCLEAR + .globl __mcs51_genRAMCLEAR + .area GSFINAL (CODE) + ljmp __sdcc_program_startup +;-------------------------------------------------------- +; Home +;-------------------------------------------------------- + .area HOME (CODE) + .area HOME (CODE) +__sdcc_program_startup: + lcall _main +; return from main will lock up + sjmp . +;-------------------------------------------------------- +; code +;-------------------------------------------------------- + .area CSEG (CODE) +;------------------------------------------------------------ +;Allocation info for local variables in function 'main' +;------------------------------------------------------------ +;i Allocated to registers r2 r3 +;------------------------------------------------------------ + G$main$0$0 ==. + C$ledmatrix.c$27$0$0 ==. +; ledmatrix.c:27: int main() +; ----------------------------------------- +; function main +; ----------------------------------------- +_main: + ar2 = 0x02 + ar3 = 0x03 + ar4 = 0x04 + ar5 = 0x05 + ar6 = 0x06 + ar7 = 0x07 + ar0 = 0x00 + ar1 = 0x01 + C$ledmatrix.c$30$1$1 ==. +; ledmatrix.c:30: while(1) { +00102$: + C$ledmatrix.c$31$2$2 ==. +; ledmatrix.c:31: for(i=0; i<8; i++) { + mov r2,#0x00 + mov r3,#0x00 +00104$: + clr c + mov a,r2 + subb a,#0x08 + mov a,r3 + xrl a,#0x80 + subb a,#0x80 + jnc 00102$ + C$ledmatrix.c$32$3$3 ==. +; ledmatrix.c:32: P1 = 0xff; + mov _P1,#0xFF + C$ledmatrix.c$33$3$3 ==. +; ledmatrix.c:33: P0 = image[i]; + mov a,r2 + add a,#_image + mov dpl,a + mov a,r3 + addc a,#(_image >> 8) + mov dph,a + clr a + movc a,@a+dptr + mov _P0,a + C$ledmatrix.c$34$3$3 ==. +; ledmatrix.c:34: P1 = (1 << i) ^ 255; + mov b,r2 + inc b + mov r4,#0x01 + mov r5,#0x00 + sjmp 00115$ +00114$: + mov a,r4 + add a,r4 + mov r4,a + mov a,r5 + rlc a + mov r5,a +00115$: + djnz b,00114$ + mov a,#0xFF + xrl a,r4 + mov _P1,a + C$ledmatrix.c$31$2$2 ==. +; ledmatrix.c:31: for(i=0; i<8; i++) { + inc r2 + cjne r2,#0x00,00104$ + inc r3 + C$ledmatrix.c$37$1$1 ==. + XG$main$0$0 ==. + sjmp 00104$ + .area CSEG (CODE) + .area CONST (CODE) +Fledmatrix$image$0$0 == . +_image: + .db #0xB1 + .db #0x9D + .db #0xBD + .db #0xB1 + .db #0xB7 + .db #0xB7 + .db #0x11 + .db #0xFF + .area XINIT (CODE) + .area CABS (ABS,CODE) diff --git a/demo/ledmatrix.c b/demo/ledmatrix.c new file mode 100644 index 0000000..aa1dea9 --- /dev/null +++ b/demo/ledmatrix.c @@ -0,0 +1,43 @@ +/** + * Demonstration code for <b>MCU 8051 IDE</b> + * + * Virtual HW and C language + * Requires MCU AT89C51 or similar ( [Project] -> [Edit project] -> [Select MCU] ) + * @file demo_c_0.c + */ + +// Create virtual LED matrix and load configuration file "ledmatrix.vhc" +// [Virtual HW] -> [LED Matrix] + +// To compile the code press F11 (This code is precompiled) +// To start simulator press F2 +// To simulate the program press F6 (animate) or F7 (step) or F8 (step over) or F9 (run) + +// To save some time you can use program hibernation function +// [Simulator] -> [Resume hibernated program] and select "ledmatrix.m5hib" + + +#include <at89x51.h> + +static const char image[] = { + 0xb1, 0x9d, 0xbd, 0xb1, + 0xb7, 0xb7, 0x11, 0xff +}; + +int main() +{ + int i; + while(1) { + for(i=0; i<8; i++) { + P1 = 0xff; + P0 = image[i]; + P1 = (1 << i) ^ 255; + } + } +} + +// Note: Sometimes people wonder how it is possible to +// write a program for MCU in C language. So please +// study this code or SDCC manual or another documents. +// And please do not ask me silly questions ... :) +// By the way my email is <martin.osmera@gmail.com> diff --git a/demo/ledmatrix.cdb b/demo/ledmatrix.cdb new file mode 100644 index 0000000..a049b01 --- /dev/null +++ b/demo/ledmatrix.cdb @@ -0,0 +1,251 @@ +M:ledmatrix +F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0 +S:Lmain$i$1$1({2}SI:S),R,0,0,[r2,r3] +S:G$P0$0$0({1}SC:U),I,0,0 +S:G$SP$0$0({1}SC:U),I,0,0 +S:G$DPL$0$0({1}SC:U),I,0,0 +S:G$DPH$0$0({1}SC:U),I,0,0 +S:G$PCON$0$0({1}SC:U),I,0,0 +S:G$TCON$0$0({1}SC:U),I,0,0 +S:G$TMOD$0$0({1}SC:U),I,0,0 +S:G$TL0$0$0({1}SC:U),I,0,0 +S:G$TL1$0$0({1}SC:U),I,0,0 +S:G$TH0$0$0({1}SC:U),I,0,0 +S:G$TH1$0$0({1}SC:U),I,0,0 +S:G$P1$0$0({1}SC:U),I,0,0 +S:G$SCON$0$0({1}SC:U),I,0,0 +S:G$SBUF$0$0({1}SC:U),I,0,0 +S:G$P2$0$0({1}SC:U),I,0,0 +S:G$IE$0$0({1}SC:U),I,0,0 +S:G$P3$0$0({1}SC:U),I,0,0 +S:G$IP$0$0({1}SC:U),I,0,0 +S:G$PSW$0$0({1}SC:U),I,0,0 +S:G$ACC$0$0({1}SC:U),I,0,0 +S:G$A$0$0({1}SC:U),I,0,0 +S:G$B$0$0({1}SC:U),I,0,0 +S:G$P0_0$0$0({1}SX:U),J,0,0 +S:G$P0_1$0$0({1}SX:U),J,0,0 +S:G$P0_2$0$0({1}SX:U),J,0,0 +S:G$P0_3$0$0({1}SX:U),J,0,0 +S:G$P0_4$0$0({1}SX:U),J,0,0 +S:G$P0_5$0$0({1}SX:U),J,0,0 +S:G$P0_6$0$0({1}SX:U),J,0,0 +S:G$P0_7$0$0({1}SX:U),J,0,0 +S:G$IT0$0$0({1}SX:U),J,0,0 +S:G$IE0$0$0({1}SX:U),J,0,0 +S:G$IT1$0$0({1}SX:U),J,0,0 +S:G$IE1$0$0({1}SX:U),J,0,0 +S:G$TR0$0$0({1}SX:U),J,0,0 +S:G$TF0$0$0({1}SX:U),J,0,0 +S:G$TR1$0$0({1}SX:U),J,0,0 +S:G$TF1$0$0({1}SX:U),J,0,0 +S:G$P1_0$0$0({1}SX:U),J,0,0 +S:G$P1_1$0$0({1}SX:U),J,0,0 +S:G$P1_2$0$0({1}SX:U),J,0,0 +S:G$P1_3$0$0({1}SX:U),J,0,0 +S:G$P1_4$0$0({1}SX:U),J,0,0 +S:G$P1_5$0$0({1}SX:U),J,0,0 +S:G$P1_6$0$0({1}SX:U),J,0,0 +S:G$P1_7$0$0({1}SX:U),J,0,0 +S:G$RI$0$0({1}SX:U),J,0,0 +S:G$TI$0$0({1}SX:U),J,0,0 +S:G$RB8$0$0({1}SX:U),J,0,0 +S:G$TB8$0$0({1}SX:U),J,0,0 +S:G$REN$0$0({1}SX:U),J,0,0 +S:G$SM2$0$0({1}SX:U),J,0,0 +S:G$SM1$0$0({1}SX:U),J,0,0 +S:G$SM0$0$0({1}SX:U),J,0,0 +S:G$P2_0$0$0({1}SX:U),J,0,0 +S:G$P2_1$0$0({1}SX:U),J,0,0 +S:G$P2_2$0$0({1}SX:U),J,0,0 +S:G$P2_3$0$0({1}SX:U),J,0,0 +S:G$P2_4$0$0({1}SX:U),J,0,0 +S:G$P2_5$0$0({1}SX:U),J,0,0 +S:G$P2_6$0$0({1}SX:U),J,0,0 +S:G$P2_7$0$0({1}SX:U),J,0,0 +S:G$EX0$0$0({1}SX:U),J,0,0 +S:G$ET0$0$0({1}SX:U),J,0,0 +S:G$EX1$0$0({1}SX:U),J,0,0 +S:G$ET1$0$0({1}SX:U),J,0,0 +S:G$ES$0$0({1}SX:U),J,0,0 +S:G$EA$0$0({1}SX:U),J,0,0 +S:G$P3_0$0$0({1}SX:U),J,0,0 +S:G$P3_1$0$0({1}SX:U),J,0,0 +S:G$P3_2$0$0({1}SX:U),J,0,0 +S:G$P3_3$0$0({1}SX:U),J,0,0 +S:G$P3_4$0$0({1}SX:U),J,0,0 +S:G$P3_5$0$0({1}SX:U),J,0,0 +S:G$P3_6$0$0({1}SX:U),J,0,0 +S:G$P3_7$0$0({1}SX:U),J,0,0 +S:G$RXD$0$0({1}SX:U),J,0,0 +S:G$TXD$0$0({1}SX:U),J,0,0 +S:G$INT0$0$0({1}SX:U),J,0,0 +S:G$INT1$0$0({1}SX:U),J,0,0 +S:G$T0$0$0({1}SX:U),J,0,0 +S:G$T1$0$0({1}SX:U),J,0,0 +S:G$WR$0$0({1}SX:U),J,0,0 +S:G$RD$0$0({1}SX:U),J,0,0 +S:G$PX0$0$0({1}SX:U),J,0,0 +S:G$PT0$0$0({1}SX:U),J,0,0 +S:G$PX1$0$0({1}SX:U),J,0,0 +S:G$PT1$0$0({1}SX:U),J,0,0 +S:G$PS$0$0({1}SX:U),J,0,0 +S:G$P$0$0({1}SX:U),J,0,0 +S:G$FL$0$0({1}SX:U),J,0,0 +S:G$OV$0$0({1}SX:U),J,0,0 +S:G$RS0$0$0({1}SX:U),J,0,0 +S:G$RS1$0$0({1}SX:U),J,0,0 +S:G$F0$0$0({1}SX:U),J,0,0 +S:G$AC$0$0({1}SX:U),J,0,0 +S:G$CY$0$0({1}SX:U),J,0,0 +S:G$main$0$0({2}DF,SI:S),C,0,0 +S:Fledmatrix$image$0$0({8}DA8,SC:S),D,0,0 +L:G$P0$0$0:80 +L:G$P0_0$0$0:80 +L:G$P0_1$0$0:81 +L:G$SP$0$0:81 +L:G$DPL$0$0:82 +L:G$P0_2$0$0:82 +L:G$DPH$0$0:83 +L:G$P0_3$0$0:83 +L:G$P0_4$0$0:84 +L:G$P0_5$0$0:85 +L:G$P0_6$0$0:86 +L:G$P0_7$0$0:87 +L:G$PCON$0$0:87 +L:G$IT0$0$0:88 +L:G$TCON$0$0:88 +L:G$IE0$0$0:89 +L:G$TMOD$0$0:89 +L:G$IT1$0$0:8A +L:G$TL0$0$0:8A +L:G$IE1$0$0:8B +L:G$TL1$0$0:8B +L:G$TH0$0$0:8C +L:G$TR0$0$0:8C +L:G$TF0$0$0:8D +L:G$TH1$0$0:8D +L:G$TR1$0$0:8E +L:G$TF1$0$0:8F +L:G$P1$0$0:90 +L:G$P1_0$0$0:90 +L:G$P1_1$0$0:91 +L:G$P1_2$0$0:92 +L:G$P1_3$0$0:93 +L:G$P1_4$0$0:94 +L:G$P1_5$0$0:95 +L:G$P1_6$0$0:96 +L:G$P1_7$0$0:97 +L:G$RI$0$0:98 +L:G$SCON$0$0:98 +L:G$SBUF$0$0:99 +L:G$TI$0$0:99 +L:G$RB8$0$0:9A +L:G$TB8$0$0:9B +L:G$REN$0$0:9C +L:G$SM2$0$0:9D +L:G$SM1$0$0:9E +L:G$SM0$0$0:9F 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--git a/demo/ledmatrix.hashes b/demo/ledmatrix.hashes new file mode 100644 index 0000000..895b5e6 --- /dev/null +++ b/demo/ledmatrix.hashes @@ -0,0 +1 @@ +517133F895352F3918C3E1250EA990A5 "ledmatrix.c" diff --git a/demo/ledmatrix.hex b/demo/ledmatrix.hex new file mode 100644 index 0000000..339b4c0 --- /dev/null +++ b/demo/ledmatrix.hex @@ -0,0 +1,26 @@ +:03000000020008F3 +:0300610002000397 +:0500030012006480FE04 +:040064007A007B00A3 +:0E006800C3EA9408EB6480948050F17590FF19 +:0A007600EA24A7F582EB3400F583BD +:0E008000E493F5808AF005F07C017D00800697 +:06008E00EC2CFCED33FD3B +:0E009400D5F0F774FF6CF5900ABA00C80B8027 +:0100A200C598 +:0800A700B19DBDB1B7B711FF17 +:06003700E478FFF6D8FD9D +:080015007900E94400601B7A48 +:05001D00009000AF7827 +:030022000075A0C6 +:0A00250000E493F2A308B8000205FE +:08002F00A0D9F4DAF275A0FF7C +:08003D007800E84400600A7934 +:030045000075A0A3 +:0600480000E4F309D8FCFE +:08004E007800E84400600C7921 +:0B00560000900000E4F0A3D8FCD9FAF1 +:03000800758107F8 +:0A000B001200A3E582600302000367 +:0400A3007582002240 +:00000001FF diff --git a/demo/ledmatrix.ihx b/demo/ledmatrix.ihx new file mode 100644 index 0000000..339b4c0 --- /dev/null +++ b/demo/ledmatrix.ihx @@ -0,0 +1,26 @@ +:03000000020008F3 +:0300610002000397 +:0500030012006480FE04 +:040064007A007B00A3 +:0E006800C3EA9408EB6480948050F17590FF19 +:0A007600EA24A7F582EB3400F583BD +:0E008000E493F5808AF005F07C017D00800697 +:06008E00EC2CFCED33FD3B +:0E009400D5F0F774FF6CF5900ABA00C80B8027 +:0100A200C598 +:0800A700B19DBDB1B7B711FF17 +:06003700E478FFF6D8FD9D +:080015007900E94400601B7A48 +:05001D00009000AF7827 +:030022000075A0C6 +:0A00250000E493F2A308B8000205FE +:08002F00A0D9F4DAF275A0FF7C +:08003D007800E84400600A7934 +:030045000075A0A3 +:0600480000E4F309D8FCFE +:08004E007800E84400600C7921 +:0B00560000900000E4F0A3D8FCD9FAF1 +:03000800758107F8 +:0A000B001200A3E582600302000367 +:0400A3007582002240 +:00000001FF diff --git a/demo/ledmatrix.lnk b/demo/ledmatrix.lnk new file mode 100644 index 0000000..b4c7fe4 --- /dev/null +++ b/demo/ledmatrix.lnk @@ -0,0 +1,19 @@ +-myuxi +-Y +-a 0x0100 +-v 0x0000 +-w 0x2000 +-z +-b HOME = 0x0000 +-b ISEG = 0x0000 +-b BSEG = 0x0000 +-k /usr/libexec/sdcc/../share/sdcc/lib/small +-k /usr/share/sdcc/lib/small +-l mcs51 +-l libsdcc +-l libint +-l liblong +-l libfloat +ledmatrix.rel + +-e diff --git a/demo/ledmatrix.lst b/demo/ledmatrix.lst new file mode 100644 index 0000000..43d46a4 --- /dev/null +++ b/demo/ledmatrix.lst @@ -0,0 +1,494 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Mon Oct 19 23:11:07 2009 + 5 ;-------------------------------------------------------- + 6 .module ledmatrix + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _CY + 14 .globl _AC + 15 .globl _F0 + 16 .globl _RS1 + 17 .globl _RS0 + 18 .globl _OV + 19 .globl _FL + 20 .globl _P + 21 .globl _PS + 22 .globl _PT1 + 23 .globl _PX1 + 24 .globl _PT0 + 25 .globl _PX0 + 26 .globl _RD + 27 .globl _WR + 28 .globl _T1 + 29 .globl _T0 + 30 .globl _INT1 + 31 .globl _INT0 + 32 .globl _TXD + 33 .globl _RXD + 34 .globl _P3_7 + 35 .globl _P3_6 + 36 .globl _P3_5 + 37 .globl _P3_4 + 38 .globl _P3_3 + 39 .globl _P3_2 + 40 .globl _P3_1 + 41 .globl _P3_0 + 42 .globl _EA + 43 .globl _ES + 44 .globl _ET1 + 45 .globl _EX1 + 46 .globl _ET0 + 47 .globl _EX0 + 48 .globl _P2_7 + 49 .globl _P2_6 + 50 .globl _P2_5 + 51 .globl _P2_4 + 52 .globl _P2_3 + 53 .globl _P2_2 + 54 .globl _P2_1 + 55 .globl _P2_0 + 56 .globl _SM0 + 57 .globl _SM1 + 58 .globl _SM2 + 59 .globl _REN + 60 .globl _TB8 + 61 .globl _RB8 + 62 .globl _TI + 63 .globl _RI + 64 .globl _P1_7 + 65 .globl _P1_6 + 66 .globl _P1_5 + 67 .globl _P1_4 + 68 .globl _P1_3 + 69 .globl _P1_2 + 70 .globl _P1_1 + 71 .globl _P1_0 + 72 .globl _TF1 + 73 .globl _TR1 + 74 .globl _TF0 + 75 .globl _TR0 + 76 .globl _IE1 + 77 .globl _IT1 + 78 .globl _IE0 + 79 .globl _IT0 + 80 .globl _P0_7 + 81 .globl _P0_6 + 82 .globl _P0_5 + 83 .globl _P0_4 + 84 .globl _P0_3 + 85 .globl _P0_2 + 86 .globl _P0_1 + 87 .globl _P0_0 + 88 .globl _B + 89 .globl _A + 90 .globl _ACC + 91 .globl _PSW + 92 .globl _IP + 93 .globl _P3 + 94 .globl _IE + 95 .globl _P2 + 96 .globl _SBUF + 97 .globl _SCON + 98 .globl _P1 + 99 .globl _TH1 + 100 .globl _TH0 + 101 .globl _TL1 + 102 .globl _TL0 + 103 .globl _TMOD + 104 .globl _TCON + 105 .globl _PCON + 106 .globl _DPH + 107 .globl _DPL + 108 .globl _SP + 109 .globl _P0 + 110 ;-------------------------------------------------------- + 111 ; special function registers + 112 ;-------------------------------------------------------- + 113 .area RSEG (DATA) + 0080 114 G$P0$0$0 == 0x0080 + 0080 115 _P0 = 0x0080 + 0081 116 G$SP$0$0 == 0x0081 + 0081 117 _SP = 0x0081 + 0082 118 G$DPL$0$0 == 0x0082 + 0082 119 _DPL = 0x0082 + 0083 120 G$DPH$0$0 == 0x0083 + 0083 121 _DPH = 0x0083 + 0087 122 G$PCON$0$0 == 0x0087 + 0087 123 _PCON = 0x0087 + 0088 124 G$TCON$0$0 == 0x0088 + 0088 125 _TCON = 0x0088 + 0089 126 G$TMOD$0$0 == 0x0089 + 0089 127 _TMOD = 0x0089 + 008A 128 G$TL0$0$0 == 0x008a + 008A 129 _TL0 = 0x008a + 008B 130 G$TL1$0$0 == 0x008b + 008B 131 _TL1 = 0x008b + 008C 132 G$TH0$0$0 == 0x008c + 008C 133 _TH0 = 0x008c + 008D 134 G$TH1$0$0 == 0x008d + 008D 135 _TH1 = 0x008d + 0090 136 G$P1$0$0 == 0x0090 + 0090 137 _P1 = 0x0090 + 0098 138 G$SCON$0$0 == 0x0098 + 0098 139 _SCON = 0x0098 + 0099 140 G$SBUF$0$0 == 0x0099 + 0099 141 _SBUF = 0x0099 + 00A0 142 G$P2$0$0 == 0x00a0 + 00A0 143 _P2 = 0x00a0 + 00A8 144 G$IE$0$0 == 0x00a8 + 00A8 145 _IE = 0x00a8 + 00B0 146 G$P3$0$0 == 0x00b0 + 00B0 147 _P3 = 0x00b0 + 00B8 148 G$IP$0$0 == 0x00b8 + 00B8 149 _IP = 0x00b8 + 00D0 150 G$PSW$0$0 == 0x00d0 + 00D0 151 _PSW = 0x00d0 + 00E0 152 G$ACC$0$0 == 0x00e0 + 00E0 153 _ACC = 0x00e0 + 00E0 154 G$A$0$0 == 0x00e0 + 00E0 155 _A = 0x00e0 + 00F0 156 G$B$0$0 == 0x00f0 + 00F0 157 _B = 0x00f0 + 158 ;-------------------------------------------------------- + 159 ; special function bits + 160 ;-------------------------------------------------------- + 161 .area RSEG (DATA) + 0080 162 G$P0_0$0$0 == 0x0080 + 0080 163 _P0_0 = 0x0080 + 0081 164 G$P0_1$0$0 == 0x0081 + 0081 165 _P0_1 = 0x0081 + 0082 166 G$P0_2$0$0 == 0x0082 + 0082 167 _P0_2 = 0x0082 + 0083 168 G$P0_3$0$0 == 0x0083 + 0083 169 _P0_3 = 0x0083 + 0084 170 G$P0_4$0$0 == 0x0084 + 0084 171 _P0_4 = 0x0084 + 0085 172 G$P0_5$0$0 == 0x0085 + 0085 173 _P0_5 = 0x0085 + 0086 174 G$P0_6$0$0 == 0x0086 + 0086 175 _P0_6 = 0x0086 + 0087 176 G$P0_7$0$0 == 0x0087 + 0087 177 _P0_7 = 0x0087 + 0088 178 G$IT0$0$0 == 0x0088 + 0088 179 _IT0 = 0x0088 + 0089 180 G$IE0$0$0 == 0x0089 + 0089 181 _IE0 = 0x0089 + 008A 182 G$IT1$0$0 == 0x008a + 008A 183 _IT1 = 0x008a + 008B 184 G$IE1$0$0 == 0x008b + 008B 185 _IE1 = 0x008b + 008C 186 G$TR0$0$0 == 0x008c + 008C 187 _TR0 = 0x008c + 008D 188 G$TF0$0$0 == 0x008d + 008D 189 _TF0 = 0x008d + 008E 190 G$TR1$0$0 == 0x008e + 008E 191 _TR1 = 0x008e + 008F 192 G$TF1$0$0 == 0x008f + 008F 193 _TF1 = 0x008f + 0090 194 G$P1_0$0$0 == 0x0090 + 0090 195 _P1_0 = 0x0090 + 0091 196 G$P1_1$0$0 == 0x0091 + 0091 197 _P1_1 = 0x0091 + 0092 198 G$P1_2$0$0 == 0x0092 + 0092 199 _P1_2 = 0x0092 + 0093 200 G$P1_3$0$0 == 0x0093 + 0093 201 _P1_3 = 0x0093 + 0094 202 G$P1_4$0$0 == 0x0094 + 0094 203 _P1_4 = 0x0094 + 0095 204 G$P1_5$0$0 == 0x0095 + 0095 205 _P1_5 = 0x0095 + 0096 206 G$P1_6$0$0 == 0x0096 + 0096 207 _P1_6 = 0x0096 + 0097 208 G$P1_7$0$0 == 0x0097 + 0097 209 _P1_7 = 0x0097 + 0098 210 G$RI$0$0 == 0x0098 + 0098 211 _RI = 0x0098 + 0099 212 G$TI$0$0 == 0x0099 + 0099 213 _TI = 0x0099 + 009A 214 G$RB8$0$0 == 0x009a + 009A 215 _RB8 = 0x009a + 009B 216 G$TB8$0$0 == 0x009b + 009B 217 _TB8 = 0x009b + 009C 218 G$REN$0$0 == 0x009c + 009C 219 _REN = 0x009c + 009D 220 G$SM2$0$0 == 0x009d + 009D 221 _SM2 = 0x009d + 009E 222 G$SM1$0$0 == 0x009e + 009E 223 _SM1 = 0x009e + 009F 224 G$SM0$0$0 == 0x009f + 009F 225 _SM0 = 0x009f + 00A0 226 G$P2_0$0$0 == 0x00a0 + 00A0 227 _P2_0 = 0x00a0 + 00A1 228 G$P2_1$0$0 == 0x00a1 + 00A1 229 _P2_1 = 0x00a1 + 00A2 230 G$P2_2$0$0 == 0x00a2 + 00A2 231 _P2_2 = 0x00a2 + 00A3 232 G$P2_3$0$0 == 0x00a3 + 00A3 233 _P2_3 = 0x00a3 + 00A4 234 G$P2_4$0$0 == 0x00a4 + 00A4 235 _P2_4 = 0x00a4 + 00A5 236 G$P2_5$0$0 == 0x00a5 + 00A5 237 _P2_5 = 0x00a5 + 00A6 238 G$P2_6$0$0 == 0x00a6 + 00A6 239 _P2_6 = 0x00a6 + 00A7 240 G$P2_7$0$0 == 0x00a7 + 00A7 241 _P2_7 = 0x00a7 + 00A8 242 G$EX0$0$0 == 0x00a8 + 00A8 243 _EX0 = 0x00a8 + 00A9 244 G$ET0$0$0 == 0x00a9 + 00A9 245 _ET0 = 0x00a9 + 00AA 246 G$EX1$0$0 == 0x00aa + 00AA 247 _EX1 = 0x00aa + 00AB 248 G$ET1$0$0 == 0x00ab + 00AB 249 _ET1 = 0x00ab + 00AC 250 G$ES$0$0 == 0x00ac + 00AC 251 _ES = 0x00ac + 00AF 252 G$EA$0$0 == 0x00af + 00AF 253 _EA = 0x00af + 00B0 254 G$P3_0$0$0 == 0x00b0 + 00B0 255 _P3_0 = 0x00b0 + 00B1 256 G$P3_1$0$0 == 0x00b1 + 00B1 257 _P3_1 = 0x00b1 + 00B2 258 G$P3_2$0$0 == 0x00b2 + 00B2 259 _P3_2 = 0x00b2 + 00B3 260 G$P3_3$0$0 == 0x00b3 + 00B3 261 _P3_3 = 0x00b3 + 00B4 262 G$P3_4$0$0 == 0x00b4 + 00B4 263 _P3_4 = 0x00b4 + 00B5 264 G$P3_5$0$0 == 0x00b5 + 00B5 265 _P3_5 = 0x00b5 + 00B6 266 G$P3_6$0$0 == 0x00b6 + 00B6 267 _P3_6 = 0x00b6 + 00B7 268 G$P3_7$0$0 == 0x00b7 + 00B7 269 _P3_7 = 0x00b7 + 00B0 270 G$RXD$0$0 == 0x00b0 + 00B0 271 _RXD = 0x00b0 + 00B1 272 G$TXD$0$0 == 0x00b1 + 00B1 273 _TXD = 0x00b1 + 00B2 274 G$INT0$0$0 == 0x00b2 + 00B2 275 _INT0 = 0x00b2 + 00B3 276 G$INT1$0$0 == 0x00b3 + 00B3 277 _INT1 = 0x00b3 + 00B4 278 G$T0$0$0 == 0x00b4 + 00B4 279 _T0 = 0x00b4 + 00B5 280 G$T1$0$0 == 0x00b5 + 00B5 281 _T1 = 0x00b5 + 00B6 282 G$WR$0$0 == 0x00b6 + 00B6 283 _WR = 0x00b6 + 00B7 284 G$RD$0$0 == 0x00b7 + 00B7 285 _RD = 0x00b7 + 00B8 286 G$PX0$0$0 == 0x00b8 + 00B8 287 _PX0 = 0x00b8 + 00B9 288 G$PT0$0$0 == 0x00b9 + 00B9 289 _PT0 = 0x00b9 + 00BA 290 G$PX1$0$0 == 0x00ba + 00BA 291 _PX1 = 0x00ba + 00BB 292 G$PT1$0$0 == 0x00bb + 00BB 293 _PT1 = 0x00bb + 00BC 294 G$PS$0$0 == 0x00bc + 00BC 295 _PS = 0x00bc + 00D0 296 G$P$0$0 == 0x00d0 + 00D0 297 _P = 0x00d0 + 00D1 298 G$FL$0$0 == 0x00d1 + 00D1 299 _FL = 0x00d1 + 00D2 300 G$OV$0$0 == 0x00d2 + 00D2 301 _OV = 0x00d2 + 00D3 302 G$RS0$0$0 == 0x00d3 + 00D3 303 _RS0 = 0x00d3 + 00D4 304 G$RS1$0$0 == 0x00d4 + 00D4 305 _RS1 = 0x00d4 + 00D5 306 G$F0$0$0 == 0x00d5 + 00D5 307 _F0 = 0x00d5 + 00D6 308 G$AC$0$0 == 0x00d6 + 00D6 309 _AC = 0x00d6 + 00D7 310 G$CY$0$0 == 0x00d7 + 00D7 311 _CY = 0x00d7 + 312 ;-------------------------------------------------------- + 313 ; overlayable register banks + 314 ;-------------------------------------------------------- + 315 .area REG_BANK_0 (REL,OVR,DATA) + 0000 316 .ds 8 + 317 ;-------------------------------------------------------- + 318 ; internal ram data + 319 ;-------------------------------------------------------- + 320 .area DSEG (DATA) + 321 ;-------------------------------------------------------- + 322 ; overlayable items in internal ram + 323 ;-------------------------------------------------------- + 324 .area OSEG (OVR,DATA) + 325 ;-------------------------------------------------------- + 326 ; Stack segment in internal ram + 327 ;-------------------------------------------------------- + 328 .area SSEG (DATA) + 0000 329 __start__stack: + 0000 330 .ds 1 + 331 + 332 ;-------------------------------------------------------- + 333 ; indirectly addressable internal ram data + 334 ;-------------------------------------------------------- + 335 .area ISEG (DATA) + 336 ;-------------------------------------------------------- + 337 ; absolute internal ram data + 338 ;-------------------------------------------------------- + 339 .area IABS (ABS,DATA) + 340 .area IABS (ABS,DATA) + 341 ;-------------------------------------------------------- + 342 ; bit data + 343 ;-------------------------------------------------------- + 344 .area BSEG (BIT) + 345 ;-------------------------------------------------------- + 346 ; paged external ram data + 347 ;-------------------------------------------------------- + 348 .area PSEG (PAG,XDATA) + 349 ;-------------------------------------------------------- + 350 ; external ram data + 351 ;-------------------------------------------------------- + 352 .area XSEG (XDATA) + 353 ;-------------------------------------------------------- + 354 ; absolute external ram data + 355 ;-------------------------------------------------------- + 356 .area XABS (ABS,XDATA) + 357 ;-------------------------------------------------------- + 358 ; external initialized ram data + 359 ;-------------------------------------------------------- + 360 .area XISEG (XDATA) + 361 .area HOME (CODE) + 362 .area GSINIT0 (CODE) + 363 .area GSINIT1 (CODE) + 364 .area GSINIT2 (CODE) + 365 .area GSINIT3 (CODE) + 366 .area GSINIT4 (CODE) + 367 .area GSINIT5 (CODE) + 368 .area GSINIT (CODE) + 369 .area GSFINAL (CODE) + 370 .area CSEG (CODE) + 371 ;-------------------------------------------------------- + 372 ; interrupt vector + 373 ;-------------------------------------------------------- + 374 .area HOME (CODE) + 0000 375 __interrupt_vect: + 0000 02s00r00 376 ljmp __sdcc_gsinit_startup + 377 ;-------------------------------------------------------- + 378 ; global & static initialisations + 379 ;-------------------------------------------------------- + 380 .area HOME (CODE) + 381 .area GSINIT (CODE) + 382 .area GSFINAL (CODE) + 383 .area GSINIT (CODE) + 384 .globl __sdcc_gsinit_startup + 385 .globl __sdcc_program_startup + 386 .globl __start__stack + 387 .globl __mcs51_genXINIT + 388 .globl __mcs51_genXRAMCLEAR + 389 .globl __mcs51_genRAMCLEAR + 390 .area GSFINAL (CODE) + 0000 02s00r03 391 ljmp __sdcc_program_startup + 392 ;-------------------------------------------------------- + 393 ; Home + 394 ;-------------------------------------------------------- + 395 .area HOME (CODE) + 396 .area HOME (CODE) + 0003 397 __sdcc_program_startup: + 0003 12s00r00 398 lcall _main + 399 ; return from main will lock up + 0006 80 FE 400 sjmp . + 401 ;-------------------------------------------------------- + 402 ; code + 403 ;-------------------------------------------------------- + 404 .area CSEG (CODE) + 405 ;------------------------------------------------------------ + 406 ;Allocation info for local variables in function 'main' + 407 ;------------------------------------------------------------ + 408 ;i Allocated to registers r2 r3 + 409 ;------------------------------------------------------------ + 0000 410 G$main$0$0 ==. + 0000 411 C$ledmatrix.c$27$0$0 ==. + 412 ; ledmatrix.c:27: int main() + 413 ; ----------------------------------------- + 414 ; function main + 415 ; ----------------------------------------- + 0000 416 _main: + 0002 417 ar2 = 0x02 + 0003 418 ar3 = 0x03 + 0004 419 ar4 = 0x04 + 0005 420 ar5 = 0x05 + 0006 421 ar6 = 0x06 + 0007 422 ar7 = 0x07 + 0000 423 ar0 = 0x00 + 0001 424 ar1 = 0x01 + 0000 425 C$ledmatrix.c$30$1$1 ==. + 426 ; ledmatrix.c:30: while(1) { + 0000 427 00102$: + 0000 428 C$ledmatrix.c$31$2$2 ==. + 429 ; ledmatrix.c:31: for(i=0; i<8; i++) { + 0000 7A 00 430 mov r2,#0x00 + 0002 7B 00 431 mov r3,#0x00 + 0004 432 00104$: + 0004 C3 433 clr c + 0005 EA 434 mov a,r2 + 0006 94 08 435 subb a,#0x08 + 0008 EB 436 mov a,r3 + 0009 64 80 437 xrl a,#0x80 + 000B 94 80 438 subb a,#0x80 + 000D 50 F1 439 jnc 00102$ + 000F 440 C$ledmatrix.c$32$3$3 ==. + 441 ; ledmatrix.c:32: P1 = 0xff; + 000F 75 90 FF 442 mov _P1,#0xFF + 0012 443 C$ledmatrix.c$33$3$3 ==. + 444 ; ledmatrix.c:33: P0 = image[i]; + 0012 EA 445 mov a,r2 + 0013 24r00 446 add a,#_image + 0015 F5 82 447 mov dpl,a + 0017 EB 448 mov a,r3 + 0018 34s00 449 addc a,#(_image >> 8) + 001A F5 83 450 mov dph,a + 001C E4 451 clr a + 001D 93 452 movc a,@a+dptr + 001E F5 80 453 mov _P0,a + 0020 454 C$ledmatrix.c$34$3$3 ==. + 455 ; ledmatrix.c:34: P1 = (1 << i) ^ 255; + 0020 8A F0 456 mov b,r2 + 0022 05 F0 457 inc b + 0024 7C 01 458 mov r4,#0x01 + 0026 7D 00 459 mov r5,#0x00 + 0028 80 06 460 sjmp 00115$ + 002A 461 00114$: + 002A EC 462 mov a,r4 + 002B 2C 463 add a,r4 + 002C FC 464 mov r4,a + 002D ED 465 mov a,r5 + 002E 33 466 rlc a + 002F FD 467 mov r5,a + 0030 468 00115$: + 0030 D5 F0 F7 469 djnz b,00114$ + 0033 74 FF 470 mov a,#0xFF + 0035 6C 471 xrl a,r4 + 0036 F5 90 472 mov _P1,a + 0038 473 C$ledmatrix.c$31$2$2 ==. + 474 ; ledmatrix.c:31: for(i=0; i<8; i++) { + 0038 0A 475 inc r2 + 0039 BA 00 C8 476 cjne r2,#0x00,00104$ + 003C 0B 477 inc r3 + 003D 478 C$ledmatrix.c$37$1$1 ==. + 003D 479 XG$main$0$0 ==. + 003D 80 C5 480 sjmp 00104$ + 481 .area CSEG (CODE) + 482 .area CONST (CODE) + 0000 483 Fledmatrix$image$0$0 == . + 0000 484 _image: + 0000 B1 485 .db #0xB1 + 0001 9D 486 .db #0x9D + 0002 BD 487 .db #0xBD + 0003 B1 488 .db #0xB1 + 0004 B7 489 .db #0xB7 + 0005 B7 490 .db #0xB7 + 0006 11 491 .db #0x11 + 0007 FF 492 .db #0xFF + 493 .area XINIT (CODE) + 494 .area CABS (ABS,CODE) diff --git a/demo/ledmatrix.m5ihib b/demo/ledmatrix.m5ihib new file mode 100644 index 0000000..40d686b --- /dev/null +++ b/demo/ledmatrix.m5ihib @@ -0,0 +1,599 @@ +<?xml version='1.0' encoding='utf-8'?> +<!-- + This is MCU 8051 IDE hibernation data file. + It does not contain program code, only data. + + PLEASE DO NOT EDIT THIS FILE MANUALY, BECAUSE + BAD FORMATING OF THIS FILE WILL LEAD MCU 8051 IDE TO CRASH ! +--> +<!DOCTYPE m5ihib [ + + <!-- ROOT ELEMENT --> + <!ELEMENT m5ihib (currentstate, subprograms, stepback)> + <!-- Root element Parameters: + version - File version + datetime - Date and time of creation + source_file - Souce code compiled and loaded in simulator before hibernation + processor - Processor type + xdata - Size of External data memory + eeprom - Size of data EEPROM + md5 - MD5 hash of the source code file + --> + <!ATTLIST m5ihib + version CDATA #REQUIRED + datetime CDATA #REQUIRED + source_file CDATA #REQUIRED + processor CDATA #REQUIRED + xdata CDATA #REQUIRED + eeprom CDATA #REQUIRED + md5 CDATA #REQUIRED + > + + + <!-- Current state of MCU --> + <!ELEMENT currentstate (iram, eram, xram, eeprom, sfr, special)> + + <!-- Internal data memory in decimal --> + <!ELEMENT iram (#PCDATA)> + + <!-- Expanded data memory in decimal --> + <!ELEMENT eram (#PCDATA)> + + <!-- External data memory in decimal --> + <!ELEMENT xram (#PCDATA)> + + <!-- Data EEPROM in decimal --> + <!ELEMENT eeprom (#PCDATA)> + + <!-- Special function registers --> + <!ELEMENT sfr (addresses, values)> + + <!-- SFR decimal addresses in the same order as in tag values --> + <!ELEMENT addresses (#PCDATA)> + + <!-- SFR decimal values in the same order as in tag values --> + <!ELEMENT values (#PCDATA)> + + <!-- Special engine variables --> + <!ELEMENT special (#PCDATA)> + + + <!-- Content of list of active interrupts --> + <!ELEMENT subprograms (sub)*> + <!-- Parameters of tag "subprograms": + count - Number of recorded subprograms + --> + <!ATTLIST subprograms + count CDATA #REQUIRED + > + + <!-- Active interrupt --> + <!ELEMENT sub EMPTY> + <!-- Parameters of tag "sub": + source - Source address + target - Target address + type - Type + --> + <!ATTLIST sub + source CDATA #REQUIRED + target CDATA #REQUIRED + type CDATA #REQUIRED + > + + + <!-- Stack for stepback function (backward stepping) --> + <!ELEMENT stepback (step)*> + <!-- Parameters of tag "stepback": + stacklength - Number of recorded program steps + --> + <!ATTLIST stepback + stacklength CDATA #REQUIRED + > + + <!-- One program step --> + <!ELEMENT step (spec, normal)> + + <!-- Special engine variables --> + <!ELEMENT spec (#PCDATA)> + + <!-- Ordinary registers --> + <!ELEMENT normal (reg)*> + + <!-- One register --> + <!ELEMENT reg EMPTY> + <!-- Parameters of tag "reg": + type - Memory type (E == ERAM; I == IDATA; X == XDATA; S == SFR) + addr - Register address + val - Previous register value + --> + <!ATTLIST reg + type CDATA #REQUIRED + addr CDATA #REQUIRED + val CDATA #REQUIRED + > + +]> +<m5ihib + version="1.0" + datetime="02/27/09 04:45:11" + source_file="ledmatrix.c" + processor="AT89C51" + xdata="2809" + eeprom="0" + md5="517133F895352F3918C3E1250EA990A5"> + <currentstate> + <iram> + 0 0 0 0 0 0 0 0 + 6 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + </iram> + <eram> + + </eram> + <xram> + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 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</addresses> + <values> + 0 0 247 0 0 0 0 + 0 255 0 0 255 0 255 + 0 255 9 0 120 0 0 + 0 + </values> + </sfr> + <special> + 0 {255 255 255 255 0} 100 0 {} 0 0 0 0 415 415 {} 0 0 0 0 0 0 0 0 2 + </special> + </currentstate> + <subprograms count="1"> + <sub source="6" target="100" type="0"/> + </subprograms> + <stepback stacklength="10"> + <step> + <spec> + 0 {255 255 255 255 0} 61 0 {} 0 0 0 0 401 401 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="I" addr="0" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 63 0 {} 0 0 0 0 402 402 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="S" addr="224" val="0"/> + <reg type="S" addr="208" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 64 0 {} 0 0 0 0 403 403 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="S" addr="224" val="0"/> + <reg type="S" addr="208" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 66 0 {} 0 0 0 0 404 404 {} 0 0 0 0 0 0 0 0 2 + </spec><normal> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 78 0 {} 0 0 0 0 406 406 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="I" addr="0" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 80 0 {} 0 0 0 0 407 407 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="S" addr="224" val="0"/> + <reg type="S" addr="208" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 81 0 {} 0 0 0 0 408 408 {} 0 0 0 0 0 0 0 0 1 + </spec><normal> + <reg type="S" addr="224" val="0"/> + <reg type="S" addr="208" val="0"/> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 83 0 {} 0 0 0 0 409 409 {} 0 0 0 0 0 0 0 0 2 + </spec><normal> + </normal> + </step> + <step> + <spec> + 0 {255 255 255 255 0} 97 0 {} 0 0 0 0 411 411 {} 0 0 0 0 0 0 0 0 2 + </spec><normal> + </normal> + </step> + <step> + <spec> + 2 {255 255 255 255 0} 3 0 {} 0 0 0 0 413 413 {} 0 0 0 0 0 0 0 0 2 + </spec><normal> + <reg type="S" addr="129" val="7"/> + <reg type="I" addr="8" val="0"/> + <reg type="I" addr="9" val="0"/> + </normal> + </step> + </stepback> +</m5ihib> diff --git a/demo/ledmatrix.map b/demo/ledmatrix.map new file mode 100644 index 0000000..0fdab15 --- /dev/null +++ b/demo/ledmatrix.map @@ -0,0 +1,454 @@ + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CABS 0000 0000 = 0. bytes (ABS,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:FFFFFF00 s_BSEG + 0C:0000 l_BIT_BANK + 0C:0000 l_BSEG + 0C:0000 l_BSEG_BYTES + 0C:0000 l_CABS + 0C:0000 l_GSINIT + 0C:0000 l_GSINIT1 + 0C:0000 l_GSINIT5 + 0C:0000 l_IABS + 0C:0000 l_ISEG + 0C:0000 l_OSEG + 0C:0000 l_PSEG + 0C:0000 l_REG_BANK_1 + 0C:0000 l_REG_BANK_2 + 0C:0000 l_REG_BANK_3 + 0C:0000 l_RSEG + 0C:0000 l_XABS + 0C:0000 l_XINIT + 0C:0000 l_XISEG + 0C:0000 l_XSEG + 0C:0000 l__CODE + 0C:0000 s_BSEG_BYTES + 0C:0000 s_CABS + 0C:0000 s_DSEG + 0C:0000 s_HOME + 0C:0000 s_IABS + 0C:0000 s_ISEG + 0C:0000 s_PSEG + 0C:0000 s_REG_BANK_0 + 0C:0000 s_XABS + 0C:0000 s_XISEG + 0C:0000 s_XSEG + 0C:0003 l_GSFINAL + 0C:0003 l_GSINIT0 + 0C:0008 l_CONST + 0C:0008 l_HOME + 0C:0008 l_REG_BANK_0 + 0C:0008 s_GSINIT0 + 0C:0008 s_REG_BANK_1 + 0C:0008 s_RSEG + 0C:0008 s_SSEG + 0C:000A l_GSINIT2 + 0C:000B s_GSINIT1 + 0C:000B s_GSINIT2 + 0C:0010 s_REG_BANK_2 + 0C:0015 s_GSINIT3 + 0C:0018 s_BIT_BANK + 0C:0018 s_OSEG + 0C:0018 s_REG_BANK_3 + 0C:0020 s__CODE + 0C:0022 l_GSINIT3 + 0C:002A l_GSINIT4 + 0C:0037 s_GSINIT4 + 0C:0043 l_CSEG + 0C:0061 s_GSFINAL + 0C:0061 s_GSINIT + 0C:0061 s_GSINIT5 + 0C:0064 s_CSEG + 0C:0080 l_DSEG + 0C:00A7 s_CONST + 0C:00AF s_XINIT + 0C:00F8 l_SSEG + 0C:0100 l_IRAM + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +. .ABS. 0000 0000 = 0. bytes (ABS,CON) + + Value Global + -------- -------------------------------- + 0080 G$P0$0$0 + 0080 G$P0_0$0$0 + 0080 _P0 + 0080 _P0_0 + 0081 G$P0_1$0$0 + 0081 G$SP$0$0 + 0081 _P0_1 + 0081 _SP + 0082 G$DPL$0$0 + 0082 G$P0_2$0$0 + 0082 _DPL + 0082 _P0_2 + 0083 G$DPH$0$0 + 0083 G$P0_3$0$0 + 0083 _DPH + 0083 _P0_3 + 0084 G$P0_4$0$0 + 0084 _P0_4 + 0085 G$P0_5$0$0 + 0085 _P0_5 + 0086 G$P0_6$0$0 + 0086 _P0_6 + 0087 G$P0_7$0$0 + 0087 G$PCON$0$0 + 0087 _P0_7 + 0087 _PCON + 0088 G$IT0$0$0 + 0088 G$TCON$0$0 + 0088 _IT0 + 0088 _TCON + 0089 G$IE0$0$0 + 0089 G$TMOD$0$0 + 0089 _IE0 + 0089 _TMOD + 008A G$IT1$0$0 + 008A G$TL0$0$0 + 008A _IT1 + 008A _TL0 + 008B G$IE1$0$0 + 008B G$TL1$0$0 + 008B _IE1 + 008B _TL1 + 008C G$TH0$0$0 + 008C G$TR0$0$0 + 008C _TH0 + 008C _TR0 + 008D G$TF0$0$0 + 008D G$TH1$0$0 + 008D _TF0 + 008D _TH1 + 008E G$TR1$0$0 + 008E _TR1 + 008F G$TF1$0$0 + 008F _TF1 + 0090 G$P1$0$0 + 0090 G$P1_0$0$0 + 0090 _P1 + 0090 _P1_0 + 0091 G$P1_1$0$0 + 0091 _P1_1 + 0092 G$P1_2$0$0 + 0092 _P1_2 + 0093 G$P1_3$0$0 + 0093 _P1_3 + 0094 G$P1_4$0$0 + 0094 _P1_4 + 0095 G$P1_5$0$0 + 0095 _P1_5 + 0096 G$P1_6$0$0 + 0096 _P1_6 + 0097 G$P1_7$0$0 + 0097 _P1_7 + 0098 G$RI$0$0 + 0098 G$SCON$0$0 + 0098 _RI + 0098 _SCON + 0099 G$SBUF$0$0 + 0099 G$TI$0$0 + 0099 _SBUF + 0099 _TI + 009A G$RB8$0$0 + 009A _RB8 + 009B G$TB8$0$0 + 009B _TB8 + 009C G$REN$0$0 + 009C _REN + 009D G$SM2$0$0 + 009D _SM2 + 009E G$SM1$0$0 + 009E _SM1 + 009F G$SM0$0$0 + 009F _SM0 + 00A0 G$P2$0$0 + 00A0 G$P2_0$0$0 + 00A0 _P2 + 00A0 _P2_0 + 00A0 __XPAGE + 00A1 G$P2_1$0$0 + 00A1 _P2_1 + 00A2 G$P2_2$0$0 + 00A2 _P2_2 + 00A3 G$P2_3$0$0 + 00A3 _P2_3 + 00A4 G$P2_4$0$0 + 00A4 _P2_4 + 00A5 G$P2_5$0$0 + 00A5 _P2_5 + 00A6 G$P2_6$0$0 + 00A6 _P2_6 + 00A7 G$P2_7$0$0 + 00A7 _P2_7 + 00A8 G$EX0$0$0 + 00A8 G$IE$0$0 + 00A8 _EX0 + 00A8 _IE + 00A9 G$ET0$0$0 + 00A9 _ET0 + 00AA G$EX1$0$0 + 00AA _EX1 + 00AB G$ET1$0$0 + 00AB _ET1 + 00AC G$ES$0$0 + 00AC _ES + 00AF G$EA$0$0 + 00AF _EA + 00B0 G$P3$0$0 + 00B0 G$P3_0$0$0 + 00B0 G$RXD$0$0 + 00B0 _P3 + 00B0 _P3_0 + 00B0 _RXD + 00B1 G$P3_1$0$0 + 00B1 G$TXD$0$0 + 00B1 _P3_1 + 00B1 _TXD + 00B2 G$INT0$0$0 + 00B2 G$P3_2$0$0 + 00B2 _INT0 + 00B2 _P3_2 + 00B3 G$INT1$0$0 + 00B3 G$P3_3$0$0 + 00B3 _INT1 + 00B3 _P3_3 + 00B4 G$P3_4$0$0 + 00B4 G$T0$0$0 + 00B4 _P3_4 + 00B4 _T0 + 00B5 G$P3_5$0$0 + 00B5 G$T1$0$0 + 00B5 _P3_5 + 00B5 _T1 + 00B6 G$P3_6$0$0 + 00B6 G$WR$0$0 + 00B6 _P3_6 + 00B6 _WR + 00B7 G$P3_7$0$0 + 00B7 G$RD$0$0 + 00B7 _P3_7 + 00B7 _RD + 00B8 G$IP$0$0 + 00B8 G$PX0$0$0 + 00B8 _IP + 00B8 _PX0 + 00B9 G$PT0$0$0 + 00B9 _PT0 + 00BA G$PX1$0$0 + 00BA _PX1 + 00BB G$PT1$0$0 + 00BB _PT1 + 00BC G$PS$0$0 + 00BC _PS + 00D0 G$P$0$0 + 00D0 G$PSW$0$0 + 00D0 _P + 00D0 _PSW + 00D1 G$FL$0$0 + 00D1 _FL + 00D2 G$OV$0$0 + 00D2 _OV + 00D3 G$RS0$0$0 + 00D3 _RS0 + 00D4 G$RS1$0$0 + 00D4 _RS1 + 00D5 G$F0$0$0 + 00D5 _F0 + 00D6 G$AC$0$0 + 00D6 _AC + 00D7 G$CY$0$0 + 00D7 _CY + 00E0 G$A$0$0 + 00E0 G$ACC$0$0 + 00E0 _A + 00E0 _ACC + 00F0 G$B$0$0 + 00F0 _B + + + + + + + + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +SSEG 0008 00F8 = 248. bytes (REL,OVR) + + Value Global + -------- -------------------------------- + 0008 __start__stack + + + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +HOME 0000 0008 = 8. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0000 A$ledmatrix$376 + 0C:0003 A$ledmatrix$398 + 0C:0003 __sdcc_program_startup + 0C:0006 A$ledmatrix$400 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT0 0008 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0008 __sdcc_gsinit_startup + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT3 0015 0022 = 34. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0015 __mcs51_genXINIT + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSINIT4 0037 002A = 42. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0037 __mcs51_genRAMCLEAR + 0C:003D __mcs51_genXRAMCLEAR + + + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +GSFINAL 0061 0003 = 3. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0061 A$ledmatrix$391 + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CSEG 0064 0043 = 67. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:0064 A$ledmatrix$430 + 0C:0064 C$ledmatrix.c$27$0$0 + 0C:0064 C$ledmatrix.c$30$1$1 + 0C:0064 G$main$0$0 + 0C:0064 _main + 0C:0066 A$ledmatrix$431 + 0C:0068 A$ledmatrix$433 + 0C:0069 A$ledmatrix$434 + 0C:006A A$ledmatrix$435 + 0C:006C A$ledmatrix$436 + 0C:006D A$ledmatrix$437 + 0C:006F A$ledmatrix$438 + 0C:0071 A$ledmatrix$439 + 0C:0073 A$ledmatrix$442 + 0C:0073 C$ledmatrix.c$32$3$3 + 0C:0076 A$ledmatrix$445 + 0C:0076 C$ledmatrix.c$33$3$3 + 0C:0077 A$ledmatrix$446 + 0C:0079 A$ledmatrix$447 + 0C:007B A$ledmatrix$448 + 0C:007C A$ledmatrix$449 + 0C:007E A$ledmatrix$450 + 0C:0080 A$ledmatrix$451 + 0C:0081 A$ledmatrix$452 + 0C:0082 A$ledmatrix$453 + 0C:0084 A$ledmatrix$456 + 0C:0084 C$ledmatrix.c$34$3$3 + 0C:0086 A$ledmatrix$457 + 0C:0088 A$ledmatrix$458 + 0C:008A A$ledmatrix$459 + 0C:008C A$ledmatrix$460 + 0C:008E A$ledmatrix$462 + 0C:008F A$ledmatrix$463 + 0C:0090 A$ledmatrix$464 + 0C:0091 A$ledmatrix$465 + 0C:0092 A$ledmatrix$466 + 0C:0093 A$ledmatrix$467 + 0C:0094 A$ledmatrix$469 + 0C:0097 A$ledmatrix$470 + 0C:0099 A$ledmatrix$471 + 0C:009A A$ledmatrix$472 + 0C:009C A$ledmatrix$475 + 0C:009C C$ledmatrix.c$31$2$2 + 0C:009D A$ledmatrix$476 + 0C:00A0 A$ledmatrix$477 + 0C:00A1 A$ledmatrix$480 + 0C:00A1 C$ledmatrix.c$37$1$1 + 0C:00A1 XG$main$0$0 + 0C:00A3 __sdcc_external_startup + +Hexadecimal + +Area Addr Size Decimal Bytes (Attributes) +-------------------------------- ---- ---- ------- ----- ------------ +CONST 00A7 0008 = 8. bytes (REL,CON,CODE) + + Value Global + -------- -------------------------------- + 0C:00A7 Fledmatrix$image$0$0 + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 1. + +Files Linked [ module(s) ] + +ledmatrix.rel + +Libraries Linked [ object file ] + +/usr/share/sdcc/lib/small/mcs51.lib [ crtclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxinit.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtxclear.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtpagesfr.rel ] +/usr/share/sdcc/lib/small/mcs51.lib [ crtstart.rel ] +/usr/share/sdcc/lib/small/libsdcc.lib [ _startup.rel ] + + ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 2. + +User Base Address Definitions + +HOME = 0x0000 +ISEG = 0x0000 +BSEG = 0x0000 + +
\ No newline at end of file diff --git a/demo/ledmatrix.mem b/demo/ledmatrix.mem new file mode 100644 index 0000000..0275aa5 --- /dev/null +++ b/demo/ledmatrix.mem @@ -0,0 +1,28 @@ +Internal RAM layout: + 0 1 2 3 4 5 6 7 8 9 A B C D E F +0x00:|0|0|0|0|0|0|0|0|S|S|S|S|S|S|S|S| +0x10:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x20:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x30:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x40:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x50:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x60:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x70:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x80:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0x90:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xa0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xb0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xc0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xd0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xe0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0xf0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S| +0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute + +Stack starts at: 0x08 (sp set to 0x07) with 248 bytes available. + +Other memory: + Name Start End Size Max + ---------------- -------- -------- -------- -------- + PAGED EXT. RAM 0 0 + EXTERNAL RAM 0 0 + ROM/EPROM/FLASH 0x0000 0x00ae 175 8192 diff --git a/demo/ledmatrix.rel b/demo/ledmatrix.rel new file mode 100644 index 0000000..e4cdd26 --- /dev/null +++ b/demo/ledmatrix.rel @@ -0,0 +1,328 @@ +;!FILE ledmatrix.asm +XH +H 1A areas FD global symbols +M ledmatrix +O -mmcs51 --model-small +S G$EX0$0$0 Def00A8 +S G$IT0$0$0 Def0088 +S G$TH1$0$0 Def008D +S _P1 Def0090 +S _A Def00E0 +S G$RXD$0$0 Def00B0 +S G$EX1$0$0 Def00AA +S G$TB8$0$0 Def009B +S G$IT1$0$0 Def008A +S G$IE$0$0 Def00A8 +S _P2 Def00A0 +S _B Def00F0 +S _SP Def0081 +S _P3 Def00B0 +S _PS Def00BC +S G$TXD$0$0 Def00B1 +S G$SM0$0$0 Def009F +S G$TL0$0$0 Def008A +S _T0 Def00B4 +S G$SM1$0$0 Def009E +S G$TL1$0$0 Def008B +S _T1 Def00B5 +S _OV Def00D2 +S G$FL$0$0 Def00D1 +S G$SM2$0$0 Def009D +S _ACC Def00E0 +S __mcs51_genRAMCLEAR Ref0000 +S G$PT0$0$0 Def00B9 +S G$RS0$0$0 Def00D3 +S G$PT1$0$0 Def00BB +S _WR Def00B6 +S G$F0$0$0 Def00D5 +S G$RS1$0$0 Def00D4 +S G$RD$0$0 Def00B7 +S G$TR0$0$0 Def008C +S G$TR1$0$0 Def008E +S G$PX0$0$0 Def00B8 +S G$ES$0$0 Def00AC +S G$PX1$0$0 Def00BA +S G$IP$0$0 Def00B8 +S G$PSW$0$0 Def00D0 +S G$RI$0$0 Def0098 +S _P0_0 Def0080 +S G$CY$0$0 Def00D7 +S _PCON Def0087 +S _SBUF Def0099 +S _P0_1 Def0081 +S _P1_0 Def0090 +S _P Def00D0 +S G$TI$0$0 Def0099 +S _P0_2 Def0082 +S _P1_1 Def0091 +S _P2_0 Def00A0 +S _P0_3 Def0083 +S _P1_2 Def0092 +S _P2_1 Def00A1 +S _P3_0 Def00B0 +S _SCON Def0098 +S _P0_4 Def0084 +S _P1_3 Def0093 +S _P2_2 Def00A2 +S _P3_1 Def00B1 +S G$P0$0$0 Def0080 +S _TCON Def0088 +S _TMOD Def0089 +S _P0_5 Def0085 +S _P1_4 Def0094 +S _P2_3 Def00A3 +S _P3_2 Def00B2 +S G$A$0$0 Def00E0 +S G$P1$0$0 Def0090 +S _P0_6 Def0086 +S _P1_5 Def0095 +S _P2_4 Def00A4 +S _P3_3 Def00B3 +S G$B$0$0 Def00F0 +S G$P2$0$0 Def00A0 +S _P0_7 Def0087 +S _P1_6 Def0096 +S _P2_5 Def00A5 +S _P3_4 Def00B4 +S G$PS$0$0 Def00BC +S G$P3$0$0 Def00B0 +S G$SP$0$0 Def0081 +S _P1_7 Def0097 +S _P2_6 Def00A6 +S _P3_5 Def00B5 +S G$T0$0$0 Def00B4 +S _P2_7 Def00A7 +S _P3_6 Def00B6 +S G$OV$0$0 Def00D2 +S G$T1$0$0 Def00B5 +S _P3_7 Def00B7 +S G$ACC$0$0 Def00E0 +S _INT0 Def00B2 +S _DPH Def0083 +S _INT1 Def00B3 +S G$WR$0$0 Def00B6 +S _IE0 Def0089 +S _IE1 Def008B +S _DPL Def0082 +S G$P0_0$0$0 Def0080 +S G$P$0$0 Def00D0 +S G$P1_0$0$0 Def0090 +S G$P0_1$0$0 Def0081 +S G$SBUF$0$0 Def0099 +S G$PCON$0$0 Def0087 +S _AC Def00D6 +S G$P2_0$0$0 Def00A0 +S G$P1_1$0$0 Def0091 +S G$P0_2$0$0 Def0082 +S _REN Def009C +S G$P3_0$0$0 Def00B0 +S G$P2_1$0$0 Def00A1 +S G$P1_2$0$0 Def0092 +S G$P0_3$0$0 Def0083 +S _EA Def00AF +S G$P3_1$0$0 Def00B1 +S G$P2_2$0$0 Def00A2 +S G$P1_3$0$0 Def0093 +S G$P0_4$0$0 Def0084 +S G$SCON$0$0 Def0098 +S G$P3_2$0$0 Def00B2 +S G$P2_3$0$0 Def00A3 +S G$P1_4$0$0 Def0094 +S G$P0_5$0$0 Def0085 +S G$TMOD$0$0 Def0089 +S G$TCON$0$0 Def0088 +S G$P3_3$0$0 Def00B3 +S G$P2_4$0$0 Def00A4 +S G$P1_5$0$0 Def0095 +S G$P0_6$0$0 Def0086 +S _ET0 Def00A9 +S G$P3_4$0$0 Def00B4 +S G$P2_5$0$0 Def00A5 +S G$P1_6$0$0 Def0096 +S G$P0_7$0$0 Def0087 +S _TF0 Def008D +S _ET1 Def00AB +S G$P3_5$0$0 Def00B5 +S G$P2_6$0$0 Def00A6 +S G$P1_7$0$0 Def0097 +S _TF1 Def008F +S G$P3_6$0$0 Def00B6 +S G$P2_7$0$0 Def00A7 +S _TH0 Def008C +S _RB8 Def009A +S __mcs51_genXINIT Ref0000 +S G$P3_7$0$0 Def00B7 +S _TH1 Def008D +S _IT0 Def0088 +S _EX0 Def00A8 +S _IE Def00A8 +S _IT1 Def008A +S _TB8 Def009B +S _EX1 Def00AA +S _RXD Def00B0 +S G$INT0$0$0 Def00B2 +S G$INT1$0$0 Def00B3 +S G$DPH$0$0 Def0083 +S _TL0 Def008A +S _SM0 Def009F +S _TXD Def00B1 +S _TL1 Def008B +S _SM1 Def009E +S G$IE0$0$0 Def0089 +S _SM2 Def009D +S _FL Def00D1 +S G$IE1$0$0 Def008B +S G$DPL$0$0 Def0082 +S _PT0 Def00B9 +S _PT1 Def00BB +S _RS0 Def00D3 +S _TR0 Def008C +S _RD Def00B7 +S _RS1 Def00D4 +S _F0 Def00D5 +S _TR1 Def008E +S G$AC$0$0 Def00D6 +S _ES Def00AC +S _PX0 Def00B8 +S G$REN$0$0 Def009C +S _IP Def00B8 +S _PX1 Def00BA +S G$EA$0$0 Def00AF +S _PSW Def00D0 +S __sdcc_gsinit_startup Ref0000 +S _RI Def0098 +S _CY Def00D7 +S G$ET0$0$0 Def00A9 +S _TI Def0099 +S G$ET1$0$0 Def00AB +S G$TF0$0$0 Def008D +S G$TF1$0$0 Def008F +S __mcs51_genXRAMCLEAR Ref0000 +S G$RB8$0$0 Def009A +S G$TH0$0$0 Def008C +S _P0 Def0080 +A _CODE size 0 flags 0 addr 0 +A RSEG size 0 flags 0 addr 0 +A REG_BANK_0 size 8 flags 4 addr 0 +A DSEG size 0 flags 0 addr 0 +A OSEG size 0 flags 4 addr 0 +A SSEG size 1 flags 0 addr 0 +S __start__stack Def0000 +A ISEG size 0 flags 0 addr 0 +A IABS size 0 flags 8 addr 0 +A BSEG size 0 flags 80 addr 0 +A PSEG size 0 flags 50 addr 0 +A XSEG size 0 flags 40 addr 0 +A XABS size 0 flags 48 addr 0 +A XISEG size 0 flags 40 addr 0 +A HOME size 8 flags 20 addr 0 +S A$ledmatrix$400 Def0006 +S A$ledmatrix$376 Def0000 +S A$ledmatrix$398 Def0003 +S __sdcc_program_startup Def0003 +A GSINIT0 size 0 flags 20 addr 0 +A GSINIT1 size 0 flags 20 addr 0 +A GSINIT2 size 0 flags 20 addr 0 +A GSINIT3 size 0 flags 20 addr 0 +A GSINIT4 size 0 flags 20 addr 0 +A GSINIT5 size 0 flags 20 addr 0 +A GSINIT size 0 flags 20 addr 0 +A GSFINAL size 3 flags 20 addr 0 +S A$ledmatrix$391 Def0000 +A CSEG size 3F flags 20 addr 0 +S _main Def0000 +S A$ledmatrix$430 Def0000 +S A$ledmatrix$431 Def0002 +S A$ledmatrix$450 Def001A +S A$ledmatrix$460 Def0028 +S A$ledmatrix$451 Def001C +S A$ledmatrix$442 Def000F +S A$ledmatrix$433 Def0004 +S A$ledmatrix$470 Def0033 +S A$ledmatrix$452 Def001D +S A$ledmatrix$434 Def0005 +S A$ledmatrix$480 Def003D +S A$ledmatrix$471 Def0035 +S A$ledmatrix$462 Def002A +S A$ledmatrix$453 Def001E +S A$ledmatrix$435 Def0006 +S A$ledmatrix$472 Def0036 +S A$ledmatrix$463 Def002B +S A$ledmatrix$445 Def0012 +S A$ledmatrix$436 Def0008 +S XG$main$0$0 Def003D +S A$ledmatrix$464 Def002C +S A$ledmatrix$446 Def0013 +S A$ledmatrix$437 Def0009 +S A$ledmatrix$465 Def002D +S A$ledmatrix$456 Def0020 +S A$ledmatrix$447 Def0015 +S A$ledmatrix$438 Def000B +S A$ledmatrix$475 Def0038 +S A$ledmatrix$466 Def002E +S A$ledmatrix$457 Def0022 +S A$ledmatrix$448 Def0017 +S A$ledmatrix$439 Def000D +S C$ledmatrix.c$30$1$1 Def0000 +S A$ledmatrix$476 Def0039 +S A$ledmatrix$467 Def002F +S A$ledmatrix$458 Def0024 +S A$ledmatrix$449 Def0018 +S A$ledmatrix$477 Def003C +S A$ledmatrix$459 Def0026 +S A$ledmatrix$469 Def0030 +S C$ledmatrix.c$31$2$2 Def0038 +S C$ledmatrix.c$27$0$0 Def0000 +S G$main$0$0 Def0000 +S C$ledmatrix.c$32$3$3 Def000F +S C$ledmatrix.c$37$1$1 Def003D +S C$ledmatrix.c$33$3$3 Def0012 +S C$ledmatrix.c$34$3$3 Def0020 +A CONST size 8 flags 20 addr 0 +S Fledmatrix$image$0$0 Def0000 +A XINIT size 0 flags 20 addr 0 +A CABS size 0 flags 28 addr 0 +T 00 00 +R 00 00 00 02 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 05 +T 00 00 +R 00 00 00 0D +T 00 00 02 00 00 +R 00 00 00 0D 02 03 00 BA +T 00 00 02 00 03 +R 00 00 00 15 00 03 00 0D +T 00 03 +R 00 00 00 0D +T 00 03 12 00 00 80 FE +R 00 00 00 0D 00 03 00 16 +T 00 00 +R 00 00 00 16 +T 00 00 +R 00 00 00 16 +T 00 00 7A 00 7B 00 +R 00 00 00 16 +T 00 04 +R 00 00 00 16 +T 00 04 C3 EA 94 08 EB 64 80 94 80 50 F1 75 90 FF +R 00 00 00 16 +T 00 12 EA 24 00 00 00 F5 82 EB 34 00 00 00 F5 83 +R 00 00 00 16 F1 01 04 00 17 F1 81 0B 00 17 +T 00 1C E4 93 F5 80 8A F0 05 F0 7C 01 7D 00 80 06 +R 00 00 00 16 +T 00 2A +R 00 00 00 16 +T 00 2A EC 2C FC ED 33 FD +R 00 00 00 16 +T 00 30 +R 00 00 00 16 +T 00 30 D5 F0 F7 74 FF 6C F5 90 0A BA 00 C8 0B 80 +R 00 00 00 16 +T 00 3E C5 +R 00 00 00 16 +T 00 00 +R 00 00 00 17 +T 00 00 B1 9D BD B1 B7 B7 11 FF +R 00 00 00 17 diff --git a/demo/ledmatrix.rst b/demo/ledmatrix.rst new file mode 100644 index 0000000..9a26795 --- /dev/null +++ b/demo/ledmatrix.rst @@ -0,0 +1,494 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX) + 4 ; This file was generated Mon Oct 19 23:11:07 2009 + 5 ;-------------------------------------------------------- + 6 .module ledmatrix + 7 .optsdcc -mmcs51 --model-small + 8 + 9 ;-------------------------------------------------------- + 10 ; Public variables in this module + 11 ;-------------------------------------------------------- + 12 .globl _main + 13 .globl _CY + 14 .globl _AC + 15 .globl _F0 + 16 .globl _RS1 + 17 .globl _RS0 + 18 .globl _OV + 19 .globl _FL + 20 .globl _P + 21 .globl _PS + 22 .globl _PT1 + 23 .globl _PX1 + 24 .globl _PT0 + 25 .globl _PX0 + 26 .globl _RD + 27 .globl _WR + 28 .globl _T1 + 29 .globl _T0 + 30 .globl _INT1 + 31 .globl _INT0 + 32 .globl _TXD + 33 .globl _RXD + 34 .globl _P3_7 + 35 .globl _P3_6 + 36 .globl _P3_5 + 37 .globl _P3_4 + 38 .globl _P3_3 + 39 .globl _P3_2 + 40 .globl _P3_1 + 41 .globl _P3_0 + 42 .globl _EA + 43 .globl _ES + 44 .globl _ET1 + 45 .globl _EX1 + 46 .globl _ET0 + 47 .globl _EX0 + 48 .globl _P2_7 + 49 .globl _P2_6 + 50 .globl _P2_5 + 51 .globl _P2_4 + 52 .globl _P2_3 + 53 .globl _P2_2 + 54 .globl _P2_1 + 55 .globl _P2_0 + 56 .globl _SM0 + 57 .globl _SM1 + 58 .globl _SM2 + 59 .globl _REN + 60 .globl _TB8 + 61 .globl _RB8 + 62 .globl _TI + 63 .globl _RI + 64 .globl _P1_7 + 65 .globl _P1_6 + 66 .globl _P1_5 + 67 .globl _P1_4 + 68 .globl _P1_3 + 69 .globl _P1_2 + 70 .globl _P1_1 + 71 .globl _P1_0 + 72 .globl _TF1 + 73 .globl _TR1 + 74 .globl _TF0 + 75 .globl _TR0 + 76 .globl _IE1 + 77 .globl _IT1 + 78 .globl _IE0 + 79 .globl _IT0 + 80 .globl _P0_7 + 81 .globl _P0_6 + 82 .globl _P0_5 + 83 .globl _P0_4 + 84 .globl _P0_3 + 85 .globl _P0_2 + 86 .globl _P0_1 + 87 .globl _P0_0 + 88 .globl _B + 89 .globl _A + 90 .globl _ACC + 91 .globl _PSW + 92 .globl _IP + 93 .globl _P3 + 94 .globl _IE + 95 .globl _P2 + 96 .globl _SBUF + 97 .globl _SCON + 98 .globl _P1 + 99 .globl _TH1 + 100 .globl _TH0 + 101 .globl _TL1 + 102 .globl _TL0 + 103 .globl _TMOD + 104 .globl _TCON + 105 .globl _PCON + 106 .globl _DPH + 107 .globl _DPL + 108 .globl _SP + 109 .globl _P0 + 110 ;-------------------------------------------------------- + 111 ; special function registers + 112 ;-------------------------------------------------------- + 113 .area RSEG (DATA) + 0080 114 G$P0$0$0 == 0x0080 + 0080 115 _P0 = 0x0080 + 0081 116 G$SP$0$0 == 0x0081 + 0081 117 _SP = 0x0081 + 0082 118 G$DPL$0$0 == 0x0082 + 0082 119 _DPL = 0x0082 + 0083 120 G$DPH$0$0 == 0x0083 + 0083 121 _DPH = 0x0083 + 0087 122 G$PCON$0$0 == 0x0087 + 0087 123 _PCON = 0x0087 + 0088 124 G$TCON$0$0 == 0x0088 + 0088 125 _TCON = 0x0088 + 0089 126 G$TMOD$0$0 == 0x0089 + 0089 127 _TMOD = 0x0089 + 008A 128 G$TL0$0$0 == 0x008a + 008A 129 _TL0 = 0x008a + 008B 130 G$TL1$0$0 == 0x008b + 008B 131 _TL1 = 0x008b + 008C 132 G$TH0$0$0 == 0x008c + 008C 133 _TH0 = 0x008c + 008D 134 G$TH1$0$0 == 0x008d + 008D 135 _TH1 = 0x008d + 0090 136 G$P1$0$0 == 0x0090 + 0090 137 _P1 = 0x0090 + 0098 138 G$SCON$0$0 == 0x0098 + 0098 139 _SCON = 0x0098 + 0099 140 G$SBUF$0$0 == 0x0099 + 0099 141 _SBUF = 0x0099 + 00A0 142 G$P2$0$0 == 0x00a0 + 00A0 143 _P2 = 0x00a0 + 00A8 144 G$IE$0$0 == 0x00a8 + 00A8 145 _IE = 0x00a8 + 00B0 146 G$P3$0$0 == 0x00b0 + 00B0 147 _P3 = 0x00b0 + 00B8 148 G$IP$0$0 == 0x00b8 + 00B8 149 _IP = 0x00b8 + 00D0 150 G$PSW$0$0 == 0x00d0 + 00D0 151 _PSW = 0x00d0 + 00E0 152 G$ACC$0$0 == 0x00e0 + 00E0 153 _ACC = 0x00e0 + 00E0 154 G$A$0$0 == 0x00e0 + 00E0 155 _A = 0x00e0 + 00F0 156 G$B$0$0 == 0x00f0 + 00F0 157 _B = 0x00f0 + 158 ;-------------------------------------------------------- + 159 ; special function bits + 160 ;-------------------------------------------------------- + 161 .area RSEG (DATA) + 0080 162 G$P0_0$0$0 == 0x0080 + 0080 163 _P0_0 = 0x0080 + 0081 164 G$P0_1$0$0 == 0x0081 + 0081 165 _P0_1 = 0x0081 + 0082 166 G$P0_2$0$0 == 0x0082 + 0082 167 _P0_2 = 0x0082 + 0083 168 G$P0_3$0$0 == 0x0083 + 0083 169 _P0_3 = 0x0083 + 0084 170 G$P0_4$0$0 == 0x0084 + 0084 171 _P0_4 = 0x0084 + 0085 172 G$P0_5$0$0 == 0x0085 + 0085 173 _P0_5 = 0x0085 + 0086 174 G$P0_6$0$0 == 0x0086 + 0086 175 _P0_6 = 0x0086 + 0087 176 G$P0_7$0$0 == 0x0087 + 0087 177 _P0_7 = 0x0087 + 0088 178 G$IT0$0$0 == 0x0088 + 0088 179 _IT0 = 0x0088 + 0089 180 G$IE0$0$0 == 0x0089 + 0089 181 _IE0 = 0x0089 + 008A 182 G$IT1$0$0 == 0x008a + 008A 183 _IT1 = 0x008a + 008B 184 G$IE1$0$0 == 0x008b + 008B 185 _IE1 = 0x008b + 008C 186 G$TR0$0$0 == 0x008c + 008C 187 _TR0 = 0x008c + 008D 188 G$TF0$0$0 == 0x008d + 008D 189 _TF0 = 0x008d + 008E 190 G$TR1$0$0 == 0x008e + 008E 191 _TR1 = 0x008e + 008F 192 G$TF1$0$0 == 0x008f + 008F 193 _TF1 = 0x008f + 0090 194 G$P1_0$0$0 == 0x0090 + 0090 195 _P1_0 = 0x0090 + 0091 196 G$P1_1$0$0 == 0x0091 + 0091 197 _P1_1 = 0x0091 + 0092 198 G$P1_2$0$0 == 0x0092 + 0092 199 _P1_2 = 0x0092 + 0093 200 G$P1_3$0$0 == 0x0093 + 0093 201 _P1_3 = 0x0093 + 0094 202 G$P1_4$0$0 == 0x0094 + 0094 203 _P1_4 = 0x0094 + 0095 204 G$P1_5$0$0 == 0x0095 + 0095 205 _P1_5 = 0x0095 + 0096 206 G$P1_6$0$0 == 0x0096 + 0096 207 _P1_6 = 0x0096 + 0097 208 G$P1_7$0$0 == 0x0097 + 0097 209 _P1_7 = 0x0097 + 0098 210 G$RI$0$0 == 0x0098 + 0098 211 _RI = 0x0098 + 0099 212 G$TI$0$0 == 0x0099 + 0099 213 _TI = 0x0099 + 009A 214 G$RB8$0$0 == 0x009a + 009A 215 _RB8 = 0x009a + 009B 216 G$TB8$0$0 == 0x009b + 009B 217 _TB8 = 0x009b + 009C 218 G$REN$0$0 == 0x009c + 009C 219 _REN = 0x009c + 009D 220 G$SM2$0$0 == 0x009d + 009D 221 _SM2 = 0x009d + 009E 222 G$SM1$0$0 == 0x009e + 009E 223 _SM1 = 0x009e + 009F 224 G$SM0$0$0 == 0x009f + 009F 225 _SM0 = 0x009f + 00A0 226 G$P2_0$0$0 == 0x00a0 + 00A0 227 _P2_0 = 0x00a0 + 00A1 228 G$P2_1$0$0 == 0x00a1 + 00A1 229 _P2_1 = 0x00a1 + 00A2 230 G$P2_2$0$0 == 0x00a2 + 00A2 231 _P2_2 = 0x00a2 + 00A3 232 G$P2_3$0$0 == 0x00a3 + 00A3 233 _P2_3 = 0x00a3 + 00A4 234 G$P2_4$0$0 == 0x00a4 + 00A4 235 _P2_4 = 0x00a4 + 00A5 236 G$P2_5$0$0 == 0x00a5 + 00A5 237 _P2_5 = 0x00a5 + 00A6 238 G$P2_6$0$0 == 0x00a6 + 00A6 239 _P2_6 = 0x00a6 + 00A7 240 G$P2_7$0$0 == 0x00a7 + 00A7 241 _P2_7 = 0x00a7 + 00A8 242 G$EX0$0$0 == 0x00a8 + 00A8 243 _EX0 = 0x00a8 + 00A9 244 G$ET0$0$0 == 0x00a9 + 00A9 245 _ET0 = 0x00a9 + 00AA 246 G$EX1$0$0 == 0x00aa + 00AA 247 _EX1 = 0x00aa + 00AB 248 G$ET1$0$0 == 0x00ab + 00AB 249 _ET1 = 0x00ab + 00AC 250 G$ES$0$0 == 0x00ac + 00AC 251 _ES = 0x00ac + 00AF 252 G$EA$0$0 == 0x00af + 00AF 253 _EA = 0x00af + 00B0 254 G$P3_0$0$0 == 0x00b0 + 00B0 255 _P3_0 = 0x00b0 + 00B1 256 G$P3_1$0$0 == 0x00b1 + 00B1 257 _P3_1 = 0x00b1 + 00B2 258 G$P3_2$0$0 == 0x00b2 + 00B2 259 _P3_2 = 0x00b2 + 00B3 260 G$P3_3$0$0 == 0x00b3 + 00B3 261 _P3_3 = 0x00b3 + 00B4 262 G$P3_4$0$0 == 0x00b4 + 00B4 263 _P3_4 = 0x00b4 + 00B5 264 G$P3_5$0$0 == 0x00b5 + 00B5 265 _P3_5 = 0x00b5 + 00B6 266 G$P3_6$0$0 == 0x00b6 + 00B6 267 _P3_6 = 0x00b6 + 00B7 268 G$P3_7$0$0 == 0x00b7 + 00B7 269 _P3_7 = 0x00b7 + 00B0 270 G$RXD$0$0 == 0x00b0 + 00B0 271 _RXD = 0x00b0 + 00B1 272 G$TXD$0$0 == 0x00b1 + 00B1 273 _TXD = 0x00b1 + 00B2 274 G$INT0$0$0 == 0x00b2 + 00B2 275 _INT0 = 0x00b2 + 00B3 276 G$INT1$0$0 == 0x00b3 + 00B3 277 _INT1 = 0x00b3 + 00B4 278 G$T0$0$0 == 0x00b4 + 00B4 279 _T0 = 0x00b4 + 00B5 280 G$T1$0$0 == 0x00b5 + 00B5 281 _T1 = 0x00b5 + 00B6 282 G$WR$0$0 == 0x00b6 + 00B6 283 _WR = 0x00b6 + 00B7 284 G$RD$0$0 == 0x00b7 + 00B7 285 _RD = 0x00b7 + 00B8 286 G$PX0$0$0 == 0x00b8 + 00B8 287 _PX0 = 0x00b8 + 00B9 288 G$PT0$0$0 == 0x00b9 + 00B9 289 _PT0 = 0x00b9 + 00BA 290 G$PX1$0$0 == 0x00ba + 00BA 291 _PX1 = 0x00ba + 00BB 292 G$PT1$0$0 == 0x00bb + 00BB 293 _PT1 = 0x00bb + 00BC 294 G$PS$0$0 == 0x00bc + 00BC 295 _PS = 0x00bc + 00D0 296 G$P$0$0 == 0x00d0 + 00D0 297 _P = 0x00d0 + 00D1 298 G$FL$0$0 == 0x00d1 + 00D1 299 _FL = 0x00d1 + 00D2 300 G$OV$0$0 == 0x00d2 + 00D2 301 _OV = 0x00d2 + 00D3 302 G$RS0$0$0 == 0x00d3 + 00D3 303 _RS0 = 0x00d3 + 00D4 304 G$RS1$0$0 == 0x00d4 + 00D4 305 _RS1 = 0x00d4 + 00D5 306 G$F0$0$0 == 0x00d5 + 00D5 307 _F0 = 0x00d5 + 00D6 308 G$AC$0$0 == 0x00d6 + 00D6 309 _AC = 0x00d6 + 00D7 310 G$CY$0$0 == 0x00d7 + 00D7 311 _CY = 0x00d7 + 312 ;-------------------------------------------------------- + 313 ; overlayable register banks + 314 ;-------------------------------------------------------- + 315 .area REG_BANK_0 (REL,OVR,DATA) + 0000 316 .ds 8 + 317 ;-------------------------------------------------------- + 318 ; internal ram data + 319 ;-------------------------------------------------------- + 320 .area DSEG (DATA) + 321 ;-------------------------------------------------------- + 322 ; overlayable items in internal ram + 323 ;-------------------------------------------------------- + 324 .area OSEG (OVR,DATA) + 325 ;-------------------------------------------------------- + 326 ; Stack segment in internal ram + 327 ;-------------------------------------------------------- + 328 .area SSEG (DATA) + 0008 329 __start__stack: + 0008 330 .ds 1 + 331 + 332 ;-------------------------------------------------------- + 333 ; indirectly addressable internal ram data + 334 ;-------------------------------------------------------- + 335 .area ISEG (DATA) + 336 ;-------------------------------------------------------- + 337 ; absolute internal ram data + 338 ;-------------------------------------------------------- + 339 .area IABS (ABS,DATA) + 340 .area IABS (ABS,DATA) + 341 ;-------------------------------------------------------- + 342 ; bit data + 343 ;-------------------------------------------------------- + 344 .area BSEG (BIT) + 345 ;-------------------------------------------------------- + 346 ; paged external ram data + 347 ;-------------------------------------------------------- + 348 .area PSEG (PAG,XDATA) + 349 ;-------------------------------------------------------- + 350 ; external ram data + 351 ;-------------------------------------------------------- + 352 .area XSEG (XDATA) + 353 ;-------------------------------------------------------- + 354 ; absolute external ram data + 355 ;-------------------------------------------------------- + 356 .area XABS (ABS,XDATA) + 357 ;-------------------------------------------------------- + 358 ; external initialized ram data + 359 ;-------------------------------------------------------- + 360 .area XISEG (XDATA) + 361 .area HOME (CODE) + 362 .area GSINIT0 (CODE) + 363 .area GSINIT1 (CODE) + 364 .area GSINIT2 (CODE) + 365 .area GSINIT3 (CODE) + 366 .area GSINIT4 (CODE) + 367 .area GSINIT5 (CODE) + 368 .area GSINIT (CODE) + 369 .area GSFINAL (CODE) + 370 .area CSEG (CODE) + 371 ;-------------------------------------------------------- + 372 ; interrupt vector + 373 ;-------------------------------------------------------- + 374 .area HOME (CODE) + 0000 375 __interrupt_vect: + 0000 02 00 08 376 ljmp __sdcc_gsinit_startup + 377 ;-------------------------------------------------------- + 378 ; global & static initialisations + 379 ;-------------------------------------------------------- + 380 .area HOME (CODE) + 381 .area GSINIT (CODE) + 382 .area GSFINAL (CODE) + 383 .area GSINIT (CODE) + 384 .globl __sdcc_gsinit_startup + 385 .globl __sdcc_program_startup + 386 .globl __start__stack + 387 .globl __mcs51_genXINIT + 388 .globl __mcs51_genXRAMCLEAR + 389 .globl __mcs51_genRAMCLEAR + 390 .area GSFINAL (CODE) + 0061 02 00 03 391 ljmp __sdcc_program_startup + 392 ;-------------------------------------------------------- + 393 ; Home + 394 ;-------------------------------------------------------- + 395 .area HOME (CODE) + 396 .area HOME (CODE) + 0003 397 __sdcc_program_startup: + 0003 12 00 64 398 lcall _main + 399 ; return from main will lock up + 0006 80 FE 400 sjmp . + 401 ;-------------------------------------------------------- + 402 ; code + 403 ;-------------------------------------------------------- + 404 .area CSEG (CODE) + 405 ;------------------------------------------------------------ + 406 ;Allocation info for local variables in function 'main' + 407 ;------------------------------------------------------------ + 408 ;i Allocated to registers r2 r3 + 409 ;------------------------------------------------------------ + 0000 410 G$main$0$0 ==. + 0000 411 C$ledmatrix.c$27$0$0 ==. + 412 ; ledmatrix.c:27: int main() + 413 ; ----------------------------------------- + 414 ; function main + 415 ; ----------------------------------------- + 0064 416 _main: + 0002 417 ar2 = 0x02 + 0003 418 ar3 = 0x03 + 0004 419 ar4 = 0x04 + 0005 420 ar5 = 0x05 + 0006 421 ar6 = 0x06 + 0007 422 ar7 = 0x07 + 0000 423 ar0 = 0x00 + 0001 424 ar1 = 0x01 + 0000 425 C$ledmatrix.c$30$1$1 ==. + 426 ; ledmatrix.c:30: while(1) { + 0064 427 00102$: + 0000 428 C$ledmatrix.c$31$2$2 ==. + 429 ; ledmatrix.c:31: for(i=0; i<8; i++) { + 0064 7A 00 430 mov r2,#0x00 + 0066 7B 00 431 mov r3,#0x00 + 0068 432 00104$: + 0068 C3 433 clr c + 0069 EA 434 mov a,r2 + 006A 94 08 435 subb a,#0x08 + 006C EB 436 mov a,r3 + 006D 64 80 437 xrl a,#0x80 + 006F 94 80 438 subb a,#0x80 + 0071 50 F1 439 jnc 00102$ + 000F 440 C$ledmatrix.c$32$3$3 ==. + 441 ; ledmatrix.c:32: P1 = 0xff; + 0073 75 90 FF 442 mov _P1,#0xFF + 0012 443 C$ledmatrix.c$33$3$3 ==. + 444 ; ledmatrix.c:33: P0 = image[i]; + 0076 EA 445 mov a,r2 + 0077 24 A7 446 add a,#_image + 0079 F5 82 447 mov dpl,a + 007B EB 448 mov a,r3 + 007C 34 00 449 addc a,#(_image >> 8) + 007E F5 83 450 mov dph,a + 0080 E4 451 clr a + 0081 93 452 movc a,@a+dptr + 0082 F5 80 453 mov _P0,a + 0020 454 C$ledmatrix.c$34$3$3 ==. + 455 ; ledmatrix.c:34: P1 = (1 << i) ^ 255; + 0084 8A F0 456 mov b,r2 + 0086 05 F0 457 inc b + 0088 7C 01 458 mov r4,#0x01 + 008A 7D 00 459 mov r5,#0x00 + 008C 80 06 460 sjmp 00115$ + 008E 461 00114$: + 008E EC 462 mov a,r4 + 008F 2C 463 add a,r4 + 0090 FC 464 mov r4,a + 0091 ED 465 mov a,r5 + 0092 33 466 rlc a + 0093 FD 467 mov r5,a + 0094 468 00115$: + 0094 D5 F0 F7 469 djnz b,00114$ + 0097 74 FF 470 mov a,#0xFF + 0099 6C 471 xrl a,r4 + 009A F5 90 472 mov _P1,a + 0038 473 C$ledmatrix.c$31$2$2 ==. + 474 ; ledmatrix.c:31: for(i=0; i<8; i++) { + 009C 0A 475 inc r2 + 009D BA 00 C8 476 cjne r2,#0x00,00104$ + 00A0 0B 477 inc r3 + 003D 478 C$ledmatrix.c$37$1$1 ==. + 003D 479 XG$main$0$0 ==. + 00A1 80 C5 480 sjmp 00104$ + 481 .area CSEG (CODE) + 482 .area CONST (CODE) + 0000 483 Fledmatrix$image$0$0 == . + 00A7 484 _image: + 00A7 B1 485 .db #0xB1 + 00A8 9D 486 .db #0x9D + 00A9 BD 487 .db #0xBD + 00AA B1 488 .db #0xB1 + 00AB B7 489 .db #0xB7 + 00AC B7 490 .db #0xB7 + 00AD 11 491 .db #0x11 + 00AE FF 492 .db #0xFF + 493 .area XINIT (CODE) + 494 .area CABS (ABS,CODE) diff --git a/demo/ledmatrix.sym b/demo/ledmatrix.sym new file mode 100644 index 0000000..e61476a --- /dev/null +++ b/demo/ledmatrix.sym @@ -0,0 +1,634 @@ + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 1. + +Symbol Table + + A 00D6 + D A$ledmatrix$376 0000 GR + 15 A$ledmatrix$391 0000 GR + D A$ledmatrix$398 0003 GR + D A$ledmatrix$400 0006 GR + 16 A$ledmatrix$430 0000 GR + 16 A$ledmatrix$431 0002 GR + 16 A$ledmatrix$433 0004 GR + 16 A$ledmatrix$434 0005 GR + 16 A$ledmatrix$435 0006 GR + 16 A$ledmatrix$436 0008 GR + 16 A$ledmatrix$437 0009 GR + 16 A$ledmatrix$438 000B GR + 16 A$ledmatrix$439 000D GR + 16 A$ledmatrix$442 000F GR + 16 A$ledmatrix$445 0012 GR + 16 A$ledmatrix$446 0013 GR + 16 A$ledmatrix$447 0015 GR + 16 A$ledmatrix$448 0017 GR + 16 A$ledmatrix$449 0018 GR + 16 A$ledmatrix$450 001A GR + 16 A$ledmatrix$451 001C GR + 16 A$ledmatrix$452 001D GR + 16 A$ledmatrix$453 001E GR + 16 A$ledmatrix$456 0020 GR + 16 A$ledmatrix$457 0022 GR + 16 A$ledmatrix$458 0024 GR + 16 A$ledmatrix$459 0026 GR + 16 A$ledmatrix$460 0028 GR + 16 A$ledmatrix$462 002A GR + 16 A$ledmatrix$463 002B GR + 16 A$ledmatrix$464 002C GR + 16 A$ledmatrix$465 002D GR + 16 A$ledmatrix$466 002E GR + 16 A$ledmatrix$467 002F GR + 16 A$ledmatrix$469 0030 GR + 16 A$ledmatrix$470 0033 GR + 16 A$ledmatrix$471 0035 GR + 16 A$ledmatrix$472 0036 GR + 16 A$ledmatrix$475 0038 GR + 16 A$ledmatrix$476 0039 GR + 16 A$ledmatrix$477 003C GR + 16 A$ledmatrix$480 003D GR + AC 00D6 + ACC 00E0 + ACC.0 00E0 + ACC.1 00E1 + ACC.2 00E2 + ACC.3 00E3 + ACC.4 00E4 + ACC.5 00E5 + ACC.6 00E6 + ACC.7 00E7 + B 00F0 + B.0 00F0 + B.1 00F1 + B.2 00F2 + B.3 00F3 + B.4 00F4 + B.5 00F5 + B.6 00F6 + B.7 00F7 + 16 C$ledmatrix.c$27$0$0 = 0000 GR + 16 C$ledmatrix.c$30$1$1 = 0000 GR + 16 C$ledmatrix.c$31$2$2 = 0038 GR + 16 C$ledmatrix.c$32$3$3 = 000F GR + 16 C$ledmatrix.c$33$3$3 = 0012 GR + 16 C$ledmatrix.c$34$3$3 = 0020 GR + 16 C$ledmatrix.c$37$1$1 = 003D GR + CPRL2 00C8 + CT2 00C9 + CY 00D7 + DPH 0083 + DPL 0082 + EA 00AF + ES 00AC + ET0 00A9 + ET1 00AB + ET2 00AD + EX0 00A8 + EX1 00AA + EXEN2 00CB + EXF2 00CE + F0 00D5 + 17 Fledmatrix$image$0$0 = 0000 GR + G$A$0$0 = 00E0 G + G$AC$0$0 = 00D6 G + G$ACC$0$0 = 00E0 G + G$B$0$0 = 00F0 G + G$CY$0$0 = 00D7 G + G$DPH$0$0 = 0083 G + G$DPL$0$0 = 0082 G + G$EA$0$0 = 00AF G + G$ES$0$0 = 00AC G + G$ET0$0$0 = 00A9 G + G$ET1$0$0 = 00AB G + G$EX0$0$0 = 00A8 G + G$EX1$0$0 = 00AA G + G$F0$0$0 = 00D5 G + G$FL$0$0 = 00D1 G + G$IE$0$0 = 00A8 G + G$IE0$0$0 = 0089 G + G$IE1$0$0 = 008B G + G$INT0$0$0 = 00B2 G + G$INT1$0$0 = 00B3 G + G$IP$0$0 = 00B8 G + G$IT0$0$0 = 0088 G + G$IT1$0$0 = 008A G + G$OV$0$0 = 00D2 G + G$P$0$0 = 00D0 G + G$P0$0$0 = 0080 G + G$P0_0$0$0 = 0080 G + G$P0_1$0$0 = 0081 G + G$P0_2$0$0 = 0082 G + G$P0_3$0$0 = 0083 G + G$P0_4$0$0 = 0084 G + G$P0_5$0$0 = 0085 G + G$P0_6$0$0 = 0086 G + G$P0_7$0$0 = 0087 G + G$P1$0$0 = 0090 G + G$P1_0$0$0 = 0090 G + G$P1_1$0$0 = 0091 G + G$P1_2$0$0 = 0092 G + G$P1_3$0$0 = 0093 G + G$P1_4$0$0 = 0094 G + G$P1_5$0$0 = 0095 G + G$P1_6$0$0 = 0096 G + G$P1_7$0$0 = 0097 G + G$P2$0$0 = 00A0 G + G$P2_0$0$0 = 00A0 G + G$P2_1$0$0 = 00A1 G + G$P2_2$0$0 = 00A2 G + G$P2_3$0$0 = 00A3 G + G$P2_4$0$0 = 00A4 G + G$P2_5$0$0 = 00A5 G + G$P2_6$0$0 = 00A6 G + G$P2_7$0$0 = 00A7 G + G$P3$0$0 = 00B0 G + G$P3_0$0$0 = 00B0 G + G$P3_1$0$0 = 00B1 G + G$P3_2$0$0 = 00B2 G + G$P3_3$0$0 = 00B3 G + G$P3_4$0$0 = 00B4 G + G$P3_5$0$0 = 00B5 G + G$P3_6$0$0 = 00B6 G + G$P3_7$0$0 = 00B7 G + G$PCON$0$0 = 0087 G + G$PS$0$0 = 00BC G + G$PSW$0$0 = 00D0 G + G$PT0$0$0 = 00B9 G + G$PT1$0$0 = 00BB G + G$PX0$0$0 = 00B8 G + G$PX1$0$0 = 00BA G + G$RB8$0$0 = 009A G + G$RD$0$0 = 00B7 G + G$REN$0$0 = 009C G + G$RI$0$0 = 0098 G + G$RS0$0$0 = 00D3 G + G$RS1$0$0 = 00D4 G + G$RXD$0$0 = 00B0 G + G$SBUF$0$0 = 0099 G + G$SCON$0$0 = 0098 G + G$SM0$0$0 = 009F G + G$SM1$0$0 = 009E G + G$SM2$0$0 = 009D G + G$SP$0$0 = 0081 G + G$T0$0$0 = 00B4 G + G$T1$0$0 = 00B5 G + G$TB8$0$0 = 009B G + G$TCON$0$0 = 0088 G + G$TF0$0$0 = 008D G + G$TF1$0$0 = 008F G + G$TH0$0$0 = 008C G + G$TH1$0$0 = 008D G + G$TI$0$0 = 0099 G + G$TL0$0$0 = 008A G + G$TL1$0$0 = 008B G + G$TMOD$0$0 = 0089 G + G$TR0$0$0 = 008C G + G$TR1$0$0 = 008E G + G$TXD$0$0 = 00B1 G + G$WR$0$0 = 00B6 G + 16 G$main$0$0 = 0000 GR + IE 00A8 + IE.0 00A8 + IE.1 00A9 + IE.2 00AA + IE.3 00AB + IE.4 00AC + IE.5 00AD + IE.7 00AF + IE0 0089 + IE1 008B + INT0 00B2 + INT1 00B3 + IP 00B8 + IP.0 00B8 + IP.1 00B9 + IP.2 00BA + IP.3 00BB + IP.4 00BC + IP.5 00BD + IT0 0088 + IT1 008A + OV 00D2 + P 00D0 + P0 0080 + P0.0 0080 + P0.1 0081 + P0.2 0082 + P0.3 0083 + P0.4 0084 + P0.5 0085 + P0.6 0086 + P0.7 0087 + P1 0090 + P1.0 0090 + P1.1 0091 + P1.2 0092 + P1.3 0093 + P1.4 0094 + P1.5 0095 + P1.6 0096 + P1.7 0097 + P2 00A0 + P2.0 00A0 + P2.1 00A1 + P2.2 00A2 + P2.3 00A3 + P2.4 00A4 + P2.5 00A5 + P2.6 00A6 + P2.7 00A7 + P3 00B0 + P3.0 00B0 + P3.1 00B1 + P3.2 00B2 + P3.3 00B3 + P3.4 00B4 + P3.5 00B5 + P3.6 00B6 + P3.7 00B7 + PCON 0087 + PS 00BC + PSW 00D0 + PSW.0 00D0 + PSW.1 00D1 + PSW.2 00D2 + PSW.3 00D3 + PSW.4 00D4 + PSW.5 00D5 + PSW.6 00D6 + PSW.7 00D7 + PT0 00B9 + PT1 00BB + PT2 00BD + PX0 00B8 + PX1 00BA + RB8 009A + RCAP2H 00CB + RCAP2L 00CA + RCLK 00CD + REN 009C + RI 0098 + RS0 00D3 + RS1 00D4 + RXD 00B0 + SBUF 0099 + SCON 0098 + SCON.0 0098 + SCON.1 0099 + SCON.2 009A + SCON.3 009B + SCON.4 009C + SCON.5 009D + SCON.6 009E + SCON.7 009F + SM0 009F + SM1 009E + SM2 009D + SP 0081 + T2CON 00C8 + T2CON.0 00C8 + T2CON.1 00C9 + T2CON.2 00CA + T2CON.3 00CB + T2CON.4 00CC + T2CON.5 00CD + T2CON.6 00CE + T2CON.7 00CF + TB8 009B + TCLK 00CC + TCON 0088 + TCON.0 0088 + TCON.1 0089 + TCON.2 008A + TCON.3 008B + TCON.4 008C + TCON.5 008D + TCON.6 008E + TCON.7 008F + TF0 008D + TF1 008F + TF2 00CF + TH0 008C + TH1 008D + TH2 00CD + TI 0099 + TL0 008A + TL1 008B + TL2 00CC + TMOD 0089 + TR0 008C + TR1 008E + TR2 00CA + TXD 00B1 + 16 XG$main$0$0 = 003D GR + _A = 00E0 G + _AC = 00D6 G + _ACC = 00E0 G + _B = 00F0 G + _CY = 00D7 G + _DPH = 0083 G + _DPL = 0082 G + _EA = 00AF G + _ES = 00AC G + _ET0 = 00A9 G + _ET1 = 00AB G + _EX0 = 00A8 G + _EX1 = 00AA G + _F0 = 00D5 G + _FL = 00D1 G + _IE = 00A8 G + _IE0 = 0089 G + _IE1 = 008B G + _INT0 = 00B2 G + _INT1 = 00B3 G + _IP = 00B8 G + _IT0 = 0088 G + _IT1 = 008A G + _OV = 00D2 G + _P = 00D0 G + _P0 = 0080 G + _P0_0 = 0080 G + _P0_1 = 0081 G + _P0_2 = 0082 G + _P0_3 = 0083 G + _P0_4 = 0084 G + _P0_5 = 0085 G + _P0_6 = 0086 G + _P0_7 = 0087 G + _P1 = 0090 G + _P1_0 = 0090 G + _P1_1 = 0091 G + _P1_2 = 0092 G + _P1_3 = 0093 G + _P1_4 = 0094 G + _P1_5 = 0095 G + _P1_6 = 0096 G + _P1_7 = 0097 G + _P2 = 00A0 G + _P2_0 = 00A0 G + _P2_1 = 00A1 G + _P2_2 = 00A2 G + _P2_3 = 00A3 G + _P2_4 = 00A4 G + _P2_5 = 00A5 G + _P2_6 = 00A6 G + _P2_7 = 00A7 G + _P3 = 00B0 G + _P3_0 = 00B0 G + _P3_1 = 00B1 G + _P3_2 = 00B2 G + _P3_3 = 00B3 G + _P3_4 = 00B4 G + _P3_5 = 00B5 G + _P3_6 = 00B6 G + _P3_7 = 00B7 G + _PCON = 0087 G + _PS = 00BC G + _PSW = 00D0 G + _PT0 = 00B9 G + _PT1 = 00BB G + _PX0 = 00B8 G + _PX1 = 00BA G + _RB8 = 009A G + _RD = 00B7 G + _REN = 009C G + _RI = 0098 G + _RS0 = 00D3 G + _RS1 = 00D4 G + _RXD = 00B0 G + _SBUF = 0099 G + _SCON = 0098 G + _SM0 = 009F G + _SM1 = 009E G + _SM2 = 009D G + _SP = 0081 G + _T0 = 00B4 G + _T1 = 00B5 G + _TB8 = 009B G + _TCON = 0088 G + _TF0 = 008D G + _TF1 = 008F G + _TH0 = 008C G + _TH1 = 008D G + _TI = 0099 G + _TL0 = 008A G + _TL1 = 008B G + _TMOD = 0089 G + _TR0 = 008C G + _TR1 = 008E G + _TXD = 00B1 G + _WR = 00B6 G + D __interrupt_vect 0000 R + __mcs51_genRAMCLEAR **** GX + __mcs51_genXINIT **** GX + __mcs51_genXRAMCLEAR **** GX + __sdcc_gsinit_startup **** GX + D __sdcc_program_startup 0003 GR + 5 __start__stack 0000 GR + 17 _image 0000 R + 16 _main 0000 GR + a 00D6 + ac 00D6 + acc 00E0 + acc.0 00E0 + acc.1 00E1 + acc.2 00E2 + acc.3 00E3 + acc.4 00E4 + acc.5 00E5 + acc.6 00E6 + acc.7 00E7 + ar0 = 0000 + ar1 = 0001 + ar2 = 0002 + ar3 = 0003 + ar4 = 0004 + ar5 = 0005 + ar6 = 0006 + ar7 = 0007 + b 00F0 + b.0 00F0 + b.1 00F1 + b.2 00F2 + b.3 00F3 + b.4 00F4 + b.5 00F5 + b.6 00F6 + b.7 00F7 + cprl2 00C8 + ct2 00C9 + cy 00D7 + dph 0083 + dpl 0082 + ea 00AF + es 00AC + et0 00A9 + et1 00AB + et2 00AD + ex0 00A8 + ex1 00AA + exen2 00CB + exf2 00CE + f0 00D5 + ie 00A8 + ie.0 00A8 + ie.1 00A9 + ie.2 00AA + ie.3 00AB + ie.4 00AC + ie.5 00AD + ie.7 00AF + ie0 0089 + ie1 008B + int0 00B2 + int1 00B3 + ip 00B8 + ip.0 00B8 + ip.1 00B9 + ip.2 00BA + ip.3 00BB + ip.4 00BC + ip.5 00BD + it0 0088 + it1 008A + ov 00D2 + p 00D0 + p0 0080 + p0.0 0080 + p0.1 0081 + p0.2 0082 + p0.3 0083 + p0.4 0084 + p0.5 0085 + p0.6 0086 + p0.7 0087 + p1 0090 + p1.0 0090 + p1.1 0091 + p1.2 0092 + p1.3 0093 + p1.4 0094 + p1.5 0095 + p1.6 0096 + p1.7 0097 + p2 00A0 + p2.0 00A0 + p2.1 00A1 + p2.2 00A2 + p2.3 00A3 + p2.4 00A4 + p2.5 00A5 + p2.6 00A6 + p2.7 00A7 + p3 00B0 + p3.0 00B0 + p3.1 00B1 + p3.2 00B2 + p3.3 00B3 + p3.4 00B4 + p3.5 00B5 + p3.6 00B6 + p3.7 00B7 + pcon 0087 + ps 00BC + psw 00D0 + psw.0 00D0 + psw.1 00D1 + psw.2 00D2 + psw.3 00D3 + psw.4 00D4 + psw.5 00D5 + psw.6 00D6 + psw.7 00D7 + pt0 00B9 + pt1 00BB + pt2 00BD + px0 00B8 + px1 00BA + rb8 009A + rcap2h 00CB + rcap2l 00CA + rclk 00CD + ren 009C + ri 0098 + rs0 00D3 + rs1 00D4 + rxd 00B0 + sbuf 0099 + scon 0098 + scon.0 0098 + scon.1 0099 + scon.2 009A + scon.3 009B + scon.4 009C + scon.5 009D + scon.6 009E + scon.7 009F + sm0 009F + sm1 009E + sm2 009D + sp 0081 + t2con 00C8 + t2con.0 00C8 + t2con.1 00C9 + t2con.2 00CA + t2con.3 00CB + t2con.4 00CC + t2con.5 00CD + t2con.6 00CE + t2con.7 00CF + tb8 009B + tclk 00CC + tcon 0088 + tcon.0 0088 + tcon.1 0089 + tcon.2 008A + tcon.3 008B + tcon.4 008C + tcon.5 008D + tcon.6 008E + tcon.7 008F + tf0 008D + tf1 008F + tf2 00CF + th0 008C + th1 008D + th2 00CD + ti 0099 + tl0 008A + tl1 008B + tl2 00CC + tmod 0089 + tr0 008C + tr1 008E + tr2 00CA + txd 00B1 + + ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 2. + +Area Table + + 0 _CODE size 0 flags 0 + 1 RSEG size 0 flags 0 + 2 REG_BANK_0 size 8 flags 4 + 3 DSEG size 0 flags 0 + 4 OSEG size 0 flags 4 + 5 SSEG size 1 flags 0 + 6 ISEG size 0 flags 0 + 7 IABS size 0 flags 8 + 8 BSEG size 0 flags 80 + 9 PSEG size 0 flags 50 + A XSEG size 0 flags 40 + B XABS size 0 flags 48 + C XISEG size 0 flags 40 + D HOME size 8 flags 20 + E GSINIT0 size 0 flags 20 + F GSINIT1 size 0 flags 20 + 10 GSINIT2 size 0 flags 20 + 11 GSINIT3 size 0 flags 20 + 12 GSINIT4 size 0 flags 20 + 13 GSINIT5 size 0 flags 20 + 14 GSINIT size 0 flags 20 + 15 GSFINAL size 3 flags 20 + 16 CSEG size 3F flags 20 + 17 CONST size 8 flags 20 + 18 XINIT size 0 flags 20 + 19 CABS size 0 flags 28 diff --git a/demo/ledmatrix.vhc b/demo/ledmatrix.vhc new file mode 100644 index 0000000..4c8f25e --- /dev/null +++ b/demo/ledmatrix.vhc @@ -0,0 +1,6 @@ +# MCU 8051 IDE: Virtual HW component configuration file +# Date: 02/27/09 +# Project: Demo-project +# Component: LED matrix + +LedMatrix {{C5 0 C6 0 C7 0 R0 1 R1 1 R2 1 R3 1 R4 1 R5 1 R6 1 R7 1 C0 0 C1 0 C2 0 C3 0 C4 0} {C5 2 C6 1 C7 0 R0 7 R1 6 R2 5 R3 4 R4 3 R5 2 R6 1 R7 0 C0 7 C1 6 C2 5 C3 4 C4 3} {} {Some user note ...} blue 500 {0 0}} diff --git a/demo/mleddisplay.adf b/demo/mleddisplay.adf new file mode 100644 index 0000000..f3c5764 --- /dev/null +++ b/demo/mleddisplay.adf @@ -0,0 +1,45 @@ +# Assembler debug file for MCU 8051 IDE v1.1 +# Used assembler: MCU 8051 IDE +# Date: 03/02/09 +BFC1B21D558BFAE2B1E43162DAEFE347 "mleddisplay.asm" +0 37 0 2 0 37 +0 51 3 6 +0 52 4 182 10 9 +0 54 7 118 0 +0 55 9 8 +0 56 10 184 36 1 +0 57 13 34 +0 58 14 17 3 +0 60 16 34 +0 72 17 24 +0 73 18 229 240 +0 74 20 3 +0 75 21 245 240 +0 79 23 230 +0 80 24 147 +0 83 25 117 176 255 +0 84 28 245 144 +0 85 30 133 240 176 +0 88 33 184 32 237 +0 89 36 34 +0 96 37 117 32 0 +0 97 40 117 33 0 +0 98 43 117 34 0 +0 99 46 117 35 0 +0 102 49 117 240 238 +0 104 52 144 0 65 +0 112 55 120 36 +0 113 57 17 17 +0 116 59 120 32 +0 117 61 17 3 +0 120 63 1 55 +0 21 65 192 +0 22 66 249 +0 23 67 164 +0 24 68 176 +0 25 69 153 +0 26 70 146 +0 27 71 130 +0 28 72 248 +0 29 73 128 +0 30 74 144
\ No newline at end of file diff --git a/demo/mleddisplay.asm b/demo/mleddisplay.asm new file mode 100644 index 0000000..8e2add9 --- /dev/null +++ b/demo/mleddisplay.asm @@ -0,0 +1,125 @@ +; Demonstration code for MCU 8051 IDE +; +; Load virtual HW from "mleddisplay.vhc" +; and press F2 and F6 +; +; It should increment 4 digit number displayed +; on multiplexed LED display + + +; ----------------------------------------------- +; CONSTANTS +; ----------------------------------------------- + +data_ptr data 20h ; Number to display +data_len equ 4h ; Number of digits + +;; Codes for 8-segment LED display + ; They can be easily determinated with + ; 8-segment editor ( [Main menu] - > + ; [Utilities] -> [8-segment editor] ) +numbers:db 11000000b ; 0 + db 11111001b ; 1 + db 10100100b ; 2 + db 10110000b ; 3 + db 10011001b ; 4 + db 10010010b ; 5 + db 10000010b ; 6 + db 11111000b ; 7 + db 10000000b ; 8 + db 10010000b ; 9 + +; ----------------------------------------------- +; VECTORS +; ----------------------------------------------- + ; Reset vector + org 0 + jmp start + +; ----------------------------------------------- +; SUBPROGRAMS +; ----------------------------------------------- + +;; Increment the number + ; + ; R0 must be set to data_ptr before call + ; + ; Affected registers: R0 + ; Interrupts: None + ; Notes: Recursive subprogram +inrement_number: + inc @R0 + cjne @R0, #0Ah, inc_num_end + + mov @R0, #0 + inc R0 + cjne R0, #data_ptr+data_len, $+4 + ret + call inrement_number +inc_num_end: + ret + +;; Display the number on the LED display + ; + ; DPTR must point to table numbers + ; R0 must contain (data_ptr+data_len) + ; + ; Affected registers: A, B, R0, P1, P3 + ; Interrupts: None + ; Notes: Uses DPTR +display_number: + ; Select digit to display + dec R0 ; In uC + mov A, B + rr A + mov B, A + + ; Translate the digit to binary + ; representation for the LED display + mov A, @R0 + movc A, @A+DPTR + + ; Display the digit on the display + mov P3, #0ffh + mov P1, A + mov P3, B + + ; Display next digit + cjne R0, #data_ptr, display_number + ret + +; ----------------------------------------------- +; PROGRAM START +; ----------------------------------------------- +start: + ; Data to zeroes + mov data_ptr+0, #0h ; left-most + mov data_ptr+1, #0h + mov data_ptr+2, #0h + mov data_ptr+3, #0h ; right-most + + ; Address 1st number on the display + mov B, #0EEh + ; Initialize DPTR (Data PoinTeR) + mov DPTR, #numbers + +; ----------------------------------------------- +; MAIN LOOP +; ----------------------------------------------- + +main: + ; Show the number on the LED display + mov R0, #data_ptr+data_len + call display_number + + ; Increment the number + mov R0, #data_ptr + call inrement_number + + ; Close main loop + jmp main + +; ----------------------------------------------- +; PROGRAM END +; ----------------------------------------------- + end diff --git a/demo/mleddisplay.bin b/demo/mleddisplay.bin Binary files differnew file mode 100644 index 0000000..18d8eb4 --- /dev/null +++ b/demo/mleddisplay.bin diff --git a/demo/mleddisplay.hex b/demo/mleddisplay.hex new file mode 100644 index 0000000..abf8563 --- /dev/null +++ b/demo/mleddisplay.hex @@ -0,0 +1,2 @@ +:4B00000002002506B60A09760008B824012211032218E5F003F5F0E69375B0FFF59085F0B0B820ED2275200075210075220075230075F0EE90004178241111782011030137C0F9A4B0999282F8809027 +:00000001FF
\ No newline at end of file diff --git a/demo/mleddisplay.lst b/demo/mleddisplay.lst new file mode 100644 index 0000000..f87d046 --- /dev/null +++ b/demo/mleddisplay.lst @@ -0,0 +1,316 @@ +mleddisplay PAGE 1 + 1 ; Demonstration code for MCU 8051 IDE + 2 ; + 3 ; Load virtual HW from "mleddisplay.vhc" + 4 ; and press F2 and F6 + 5 ; + 6 ; It should increment 4 digit number displayed + 7 ; on multiplexed LED display + 8 + 9 + 10 ; ----------------------------------------------- + 11 ; CONSTANTS + 12 ; ----------------------------------------------- + 13 + 0020 14 data_ptr data 20h ; Number to display + 0004 15 data_len equ 4h ; Number of digits + 16 + 17 ;; Codes for 8-segment LED display + 18 ; They can be easily determinated with + 19 ; 8-segment editor ( [Main menu] - > + 20 ; [Utilities] -> [8-segment editor] ) +0041 C0 21 numbers:db 11000000b ; 0 +0042 F9 22 db 11111001b ; 1 +0043 A4 23 db 10100100b ; 2 +0044 B0 24 db 10110000b ; 3 +0045 99 25 db 10011001b ; 4 +0046 92 26 db 10010010b ; 5 +0047 82 27 db 10000010b ; 6 +0048 F8 28 db 11111000b ; 7 +0049 80 29 db 10000000b ; 8 +004A 90 30 db 10010000b ; 9 + 31 + 32 ; ----------------------------------------------- + 33 ; VECTORS + 34 ; ----------------------------------------------- + 35 ; Reset vector + 36 org 0 +0000 06 37 jmp start + 38 + 39 ; ----------------------------------------------- + 40 ; SUBPROGRAMS + 41 ; ----------------------------------------------- + 42 + 43 ;; Increment the number + 44 ; + 45 ; R0 must be set to data_ptr before call + 46 ; + 47 ; Affected registers: R0 + 48 ; Interrupts: None + 49 ; Notes: Recursive subprogram + 50 inrement_number: +0003 B60A09 51 inc @R0 +0004 7600 52 cjne @R0, #0Ah, inc_num_end + 53 +0007 08 54 mov @R0, #0 +0009 B82401 55 inc R0 +000A 22 56 cjne R0, #data_ptr+data_len, $+4 + 57 ret +000E 0137 58 call inrement_number + 59 inc_num_end: +0010 7820 60 ret + 61 + 62 ;; Display the number on the LED display + 63 ; + 64 ; DPTR must point to table numbers + 65 ; R0 must contain (data_ptr+data_len) + 66 ; + 67 ; Affected registers: A, B, R0, P1, P3 + 68 ; Interrupts: None + 69 ; Notes: Uses DPTR + 70 display_number: + 71 ; Select digit to display +0011 18 72 dec R0 ; In uC +0012 E5F0 73 mov A, B +0014 03 74 rr A +0015 F5F0 75 mov B, A + 76 + 77 ; Translate the digit to binary + 78 ; representation for the LED display +0017 E6 79 mov A, @R0 +0018 93 80 movc A, @A+DPTR + 81 + 82 ; Display the digit on the display +0019 75B0FF 83 mov P3, #0ffh +001C F590 84 mov P1, A +001E 85F0B0 85 mov P3, B + 86 + 87 ; Display next digit +0021 B820ED 88 cjne R0, #data_ptr, display_number +0024 22 89 ret + 90 + 91 ; ----------------------------------------------- + 92 ; PROGRAM START + 93 ; ----------------------------------------------- + 94 start: + 95 ; Data to zeroes +0025 752000 96 mov data_ptr+0, #0h ; left-most +0028 752100 97 mov data_ptr+1, #0h +002B 752200 98 mov data_ptr+2, #0h +002E 752300 99 mov data_ptr+3, #0h ; right-most + 100 + 101 ; Address 1st number on the display +0031 75F0EE 102 mov B, #0EEh + 103 ; Initialize DPTR (Data PoinTeR) +0034 900041 104 mov DPTR, #numbers + 105 + 106 ; ----------------------------------------------- + 107 ; MAIN LOOP + 108 ; ----------------------------------------------- + 109 + 110 main: + 111 ; Show the number on the LED display +0037 7824 112 mov R0, #data_ptr+data_len + 113 call display_number + 114 + 115 ; Increment the number + 116 mov R0, #data_ptr + 117 call inrement_number + 118 + 119 ; Close main loop + 120 jmp main + 121 + 122 ; ----------------------------------------------- + 123 ; PROGRAM END + 124 ; ----------------------------------------------- + 125 end +ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS + + +SYMBOL TABLE: +AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED +ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED +ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED +ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED +ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED +ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED +ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED +AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED +AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED +B. . . . . . . . . . . . . . . . . . D ADDR 00F0H +BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED +BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED +BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED +CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED +CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED +CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED +CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED +CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED +CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED +CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED +CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED +CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED +CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED +CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED +CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED +CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED +CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED +CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED +CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED +CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED +CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED +CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED +CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED +CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED +CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED +CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED +CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED +CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED +CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED +CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED +CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED +CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED +CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED +CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED +DATA_LEN . . . . . . . . . . . . . . N NUMB 0004H NOT USED +DATA_PTR . . . . . . . . . . . . . . D ADDR 0020H +DISPLAY_NUMBER . . . . . . . . . . . C ADDR 0011H +DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED +DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED +DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED +DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED +EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED +EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED +EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED +ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED +ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED +ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED +ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED +EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED +EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED +EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED +EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED +EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED +EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED +F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED +FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED +IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED +IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED +INC_NUM_END. . . . . . . . . . . . . C ADDR 0010H +INREMENT_NUMBER. . . . . . . . . . . C ADDR 0003H +INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED +INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED +IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED +IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED +IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED +IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED +IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED +IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED +KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED +KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED +KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED +MAIN . . . . . . . . . . . . . . . . C ADDR 0037H +NUMBERS. . . . . . . . . . . . . . . C ADDR 0041H +OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED +P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED +P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED +P1 . . . . . . . . . . . . . . . . . D ADDR 0090H +P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED +P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED +P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED +P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H +P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED +P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED +P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED +P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED +P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED +PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED +PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED +PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED +PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED +PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED +PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED +PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED +PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED +PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED +RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED +RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED +RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED +RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED +RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED +REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED +RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED +RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED +RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED +RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED +RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED +SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED +SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED +SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED +SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED +SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED +SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED +SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED +SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED +SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED +SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED +SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED +SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED +SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED +SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED +SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED +SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED +START. . . . . . . . . . . . . . . . C ADDR 0025H +T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED +T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED +T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED +T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED +TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED +TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED +TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED +TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED +TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED +TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED +TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED +TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED +TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED +TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED +TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED +TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED +TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED +TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED +TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED +TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED +TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED +TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED +TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED +TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED +TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED +WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED +WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED +WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
\ No newline at end of file diff --git a/demo/mleddisplay.vhw b/demo/mleddisplay.vhw new file mode 100644 index 0000000..ecdf182 --- /dev/null +++ b/demo/mleddisplay.vhw @@ -0,0 +1,5 @@ +# MCU 8051 IDE: Virtual HW configuration file +# Date: 05/10/2010 +# Project: Demo-project + +MultiplexedLedDisplay {{0 1 1 1 2 1 3 1 4 1 T0 3 5 1 T1 3 6 1 T2 3 7 1 T3 3} {0 7 1 6 2 5 3 4 4 3 T0 7 5 2 T1 6 6 1 T2 5 7 0 T3 4} 425x225+850+345 {Demo for "leddisplay.asm"} red 50 1} |