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| author | Ruben Undheim <ruben.undheim@gmail.com> | 2018-08-30 20:46:20 +0200 |
|---|---|---|
| committer | Ruben Undheim <ruben.undheim@gmail.com> | 2018-08-30 20:46:20 +0200 |
| commit | 5033b51947a6ef02cb785b5622e993335efa750a (patch) | |
| tree | 7bed18c526bd94917fa2f08e3df12209863698a1 /examples/basys3 | |
| parent | fefe0fc0430f4f173a25e674708aa0f4f0854b31 (diff) | |
New upstream version 0.7+20180830git0b7a184
Diffstat (limited to 'examples/basys3')
| -rw-r--r-- | examples/basys3/example.xdc | 3 | ||||
| -rw-r--r-- | examples/basys3/run_prog.tcl | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/examples/basys3/example.xdc b/examples/basys3/example.xdc index c1fd0e92..8cdaa199 100644 --- a/examples/basys3/example.xdc +++ b/examples/basys3/example.xdc @@ -19,3 +19,6 @@ set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN L1 } [get_ports {LD[15]}] create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property CFGBVS VCCO [current_design] + diff --git a/examples/basys3/run_prog.tcl b/examples/basys3/run_prog.tcl index d711af84..b078ad51 100644 --- a/examples/basys3/run_prog.tcl +++ b/examples/basys3/run_prog.tcl @@ -1,3 +1,4 @@ +open_hw connect_hw_server open_hw_target [lindex [get_hw_targets] 0] set_property PROGRAM.FILE example.bit [lindex [get_hw_devices] 0] |