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authorClifford Wolf <clifford@clifford.at>2013-01-05 11:13:26 +0100
committerClifford Wolf <clifford@clifford.at>2013-01-05 11:13:26 +0100
commit7764d0ba1dcf064ae487ee985c43083a0909e7f4 (patch)
tree18c05b8729df381af71b707748ce1d605e0df764 /tests/asicworld/code_hdl_models_lfsr.v
initial import
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diff --git a/tests/asicworld/code_hdl_models_lfsr.v b/tests/asicworld/code_hdl_models_lfsr.v
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+//-----------------------------------------------------
+// Design Name : lfsr
+// File Name : lfsr.v
+// Function : Linear feedback shift register
+// Coder : Deepak Kumar Tala
+//-----------------------------------------------------
+module lfsr (
+out , // Output of the counter
+enable , // Enable for counter
+clk , // clock input
+reset // reset input
+);
+
+//----------Output Ports--------------
+output [7:0] out;
+//------------Input Ports--------------
+input enable, clk, reset;
+//------------Internal Variables--------
+reg [7:0] out;
+wire linear_feedback;
+
+//-------------Code Starts Here-------
+assign linear_feedback = !(out[7] ^ out[3]);
+
+always @(posedge clk)
+if (reset) begin // active high reset
+ out <= 8'b0 ;
+end else if (enable) begin
+ out <= {out[6],out[5],
+ out[4],out[3],
+ out[2],out[1],
+ out[0], linear_feedback};
+end
+
+endmodule // End Of Module counter