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| author | Clifford Wolf <clifford@clifford.at> | 2013-01-05 11:13:26 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-01-05 11:13:26 +0100 |
| commit | 7764d0ba1dcf064ae487ee985c43083a0909e7f4 (patch) | |
| tree | 18c05b8729df381af71b707748ce1d605e0df764 /tests/asicworld/code_hdl_models_rom_using_case.v | |
initial import
Diffstat (limited to 'tests/asicworld/code_hdl_models_rom_using_case.v')
| -rw-r--r-- | tests/asicworld/code_hdl_models_rom_using_case.v | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/tests/asicworld/code_hdl_models_rom_using_case.v b/tests/asicworld/code_hdl_models_rom_using_case.v new file mode 100644 index 00000000..6b700993 --- /dev/null +++ b/tests/asicworld/code_hdl_models_rom_using_case.v @@ -0,0 +1,42 @@ +//----------------------------------------------------- +// Design Name : rom_using_case +// File Name : rom_using_case.v +// Function : ROM using case +// Coder : Deepak Kumar Tala +//----------------------------------------------------- +module rom_using_case ( +address , // Address input +data , // Data output +read_en , // Read Enable +ce // Chip Enable +); +input [3:0] address; +output [7:0] data; +input read_en; +input ce; + +reg [7:0] data ; + +always @ (ce or read_en or address) +begin + case (address) + 0 : data = 10; + 1 : data = 55; + 2 : data = 244; + 3 : data = 0; + 4 : data = 1; + 5 : data = 8'hff; + 6 : data = 8'h11; + 7 : data = 8'h1; + 8 : data = 8'h10; + 9 : data = 8'h0; + 10 : data = 8'h10; + 11 : data = 8'h15; + 12 : data = 8'h60; + 13 : data = 8'h90; + 14 : data = 8'h70; + 15 : data = 8'h90; + endcase +end + +endmodule |