initial import

1 files changed, 17 insertions, 0 deletions

diff --git a/tests/asicworld/code_tidbits_blocking.v b/tests/asicworld/code_tidbits_blocking.v
new file mode 100644
index 00000000..e13b72cc
--- /dev/null
+++ b/tests/asicworld/code_tidbits_blocking.v
@@ -0,0 +1,17 @@
+module blocking (clk,a,c);
+input clk;
+input a;
+output c;
+ 
+wire clk;
+wire a;
+reg c;
+reg b;
+  
+always @ (posedge clk )
+begin
+ b = a;
+ c = b;
+end
+   
+endmodule