yosys - Debian dgit repo for package yosys

	Commit message (Collapse)	Author	Age
*	Encode large (>32 bits) parameters as hex string in edif backend	Clifford Wolf	2013-08-28
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*	Improved edif backend	Clifford Wolf	2013-08-27
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*	Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos)	Clifford Wolf	2013-08-27
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*	Added simple xilinx7 technology mapping files	Clifford Wolf	2013-08-22
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*	More explicit integer output in verilog backend	Clifford Wolf	2013-08-22
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*	Added correct encoding of identifiers in EDIF backend	Clifford Wolf	2013-08-22
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*	Added edif backend (still under construction)	Clifford Wolf	2013-08-22
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*	Merge pull request #10 from hansiglaser/master	Clifford Wolf	2013-08-21
\|\ \| \| \| \|	fixed Verilog parser filename and line numbering issue with include files
\| *	fixed Verilog parser filename and line numbering issue with include files	Johann Glaser	2013-08-21
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* \|	Some minor documentation fixes	Clifford Wolf	2013-08-21
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* \|	Merge pull request #9 from hansiglaser/master	Clifford Wolf	2013-08-20
\|\\| \| \| \| \|	Added support for include directories with the new '-I' argument of the 'read_verilog' command
\| *	Added support for include directories with the new '-I' argument of the	Johann Glaser	2013-08-20
\| \| \| \| \| \| \| \|	'read_verilog' command
* \|	Merge pull request #8 from hansiglaser/master	Clifford Wolf	2013-08-20
\|\\| \| \| \| \|	Added support for notif0/notif1 primitives
\| *	Added support for notif0/notif1 primitives	Johann Glaser	2013-08-20
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*	Added cleaning of old version_* files to version_* make rule	Clifford Wolf	2013-08-20
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*	Added version info to yosys command and added -V option	Clifford Wolf	2013-08-20
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*	Minor fixes in abc build instructions and abc pass	Clifford Wolf	2013-08-20
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*	Fixed width and sign detection for ** operator	Clifford Wolf	2013-08-19
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*	Added support for bufif0/bufif1 primitives	Clifford Wolf	2013-08-19
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*	Improved ast dumping (ast/verilog frontend)	Clifford Wolf	2013-08-19
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*	Implemented same div-by-zero behavior as found in other synthesis tools	Clifford Wolf	2013-08-15
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*	Fixed signed div/mod in const eval (rounding and stuff)	Clifford Wolf	2013-08-15
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*	Added ezsat api for creation of anonymous vectors	Clifford Wolf	2013-08-15
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*	Added sat -ignore_div_by_zero switch	Clifford Wolf	2013-08-15
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*	Added eval -brute_force_equiv_checker_x mode	Clifford Wolf	2013-08-15
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*	Added support for "2**n" shifter encoding	Clifford Wolf	2013-08-12
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*	Added SAT support for $div and $mod cells	Clifford Wolf	2013-08-11
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*	Added "clean -purge" and ";;;" support	Clifford Wolf	2013-08-11
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*	Added ";;" as shortcut for "; clean;"	Clifford Wolf	2013-08-11
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*	freduce performance fix	Clifford Wolf	2013-08-10
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*	Added $div and $mod technology mapping	Clifford Wolf	2013-08-09
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*	Added techmap -opt mode	Clifford Wolf	2013-08-09
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*	Some fixes to improve determinism	Clifford Wolf	2013-08-09
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*	Sort ctrl signals in fsm_extract	Clifford Wolf	2013-08-08
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*	Added -try option to freduce pass	Clifford Wolf	2013-08-08
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*	Added "clean" command (less verbose opt_clean)	Clifford Wolf	2013-08-08
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*	Fixed topological ordering in freduce pass	Clifford Wolf	2013-08-07
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*	Improved handling of private names in opt_clean and rename commands	Clifford Wolf	2013-08-07
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*	Added stubnets example to manual prog chapter	Clifford Wolf	2013-08-07
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*	Small bugfixes in freduce pass	Clifford Wolf	2013-08-06
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*	Added freduce command	Clifford Wolf	2013-08-06
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*	Fixed SigPool::del() method	Clifford Wolf	2013-08-06
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*	Added proper deallocation of history buffer	Clifford Wolf	2013-08-06
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*	Updated TODO section in README	Clifford Wolf	2013-08-01
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*	Added "design" command (-reset, -save, -load)	Clifford Wolf	2013-07-27
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*	Added "help -write-web-command-reference-manual"	Clifford Wolf	2013-07-26
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*	Fixed comments in manual rtlil/ilang syntax	Clifford Wolf	2013-07-25
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*	Added RTLIL and Liberty syntax highlighting to manual	Clifford Wolf	2013-07-25
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*	Automatically run "proc" on extract map files	Clifford Wolf	2013-07-24
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*	Added $lut cells and abc lut mapping support	Clifford Wolf	2013-07-23
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