yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	New upstream version 0.9	Ruben Undheim	2019-10-18
*	Imported GIT HEAD: 0.8+20190328git32bd0f2	Ruben Undheim	2019-03-28
*	New upstream version 0.8	Ruben Undheim	2018-10-17
*	New upstream version 0.7+20181007git9850de4	Ruben Undheim	2018-10-15
*	New upstream version 0.7+20180830git0b7a184	Ruben Undheim	2018-08-30
*	Squashed commit of the following:	Ruben Undheim	2016-09-23
*	Support for more Verific primitives (patch I got per email)	Clifford Wolf	2016-02-13
*	Bugfix in Verific front-end	Clifford Wolf	2016-02-03
*	Updated verific build instructions	Clifford Wolf	2016-02-02
*	Added addBufGate module method	Clifford Wolf	2016-02-02
*	Added PRIM_DLATCHRS support to verific front-end	Clifford Wolf	2015-11-24
*	Fixed performance bug in Verific importer	Clifford Wolf	2015-11-16
*	Changes for Verific 3.16_484_32_151112	Clifford Wolf	2015-11-12
*	Import more std:: stuff into Yosys namespace	Clifford Wolf	2015-10-25
*	Added read-enable to memory model	Clifford Wolf	2015-09-25
*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14
*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02
*	Verific build fixes	Clifford Wolf	2015-05-17
*	Added log_warning() API	Clifford Wolf	2014-11-09
*	Added "ENABLE_PLUGINS := 0" to verific amd64 build instructions	Clifford Wolf	2014-11-08
*	Header changes so it will compile on VS	William Speirs	2014-10-17
*	Renamed SIZE() to GetSize() because of name collision on Win32	Clifford Wolf	2014-10-10
*	Corrected spelling mistakes found by lintian	Ruben Undheim	2014-09-06
*	Added module->uniquify()	Clifford Wolf	2014-08-16
*	Renamed $_INV_ cell type to $_NOT_	Clifford Wolf	2014-08-15
*	Fixed building verific bindings	Clifford Wolf	2014-08-12
*	Fixed build of verific bindings	Clifford Wolf	2014-07-31
*	Added module->design and cell->module, wire->module pointers	Clifford Wolf	2014-07-31
*	Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace	Clifford Wolf	2014-07-31
*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28
*	Fixed verific bindings for new RTLIL api	Clifford Wolf	2014-07-27
*	Updated verific build/test instructions	Clifford Wolf	2014-07-25
*	Various fixes in Verific frontend for new RTLIL API	Clifford Wolf	2014-07-23
*	Fixed mapping of Verific WIDE_DFFRS operator	Clifford Wolf	2014-03-20
*	Fixed mapping of Verific FADD primitive with unconnected outputs	Clifford Wolf	2014-03-20
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Progress in Verific bindings	Clifford Wolf	2014-03-17
*	Added support for memories to verific bindings	Clifford Wolf	2014-03-16
*	Use Verific Net::{IsGnd,IsPwr} API in Verific bindings	Clifford Wolf	2014-03-16
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15
*	Progress in Verific bindings	Clifford Wolf	2014-03-14
*	Progress in Verific bindings	Clifford Wolf	2014-03-14
*	Progress in Verific bindings	Clifford Wolf	2014-03-13
*	Copy Verific vdbs files to Yosys "share" data directory	Clifford Wolf	2014-03-13
*	Added test_navre.ys for verific frontend	Clifford Wolf	2014-03-13
*	Improved verific command (added support for some operators)	Clifford Wolf	2014-03-10
*	Improvements in verific command	Clifford Wolf	2014-03-10