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verilog
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Author
Age
*
fixed parsing of constant with comment between size and value
Clifford Wolf
2014-07-02
*
Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)
Clifford Wolf
2014-06-16
*
Improved parsing of large integer constants
Clifford Wolf
2014-06-15
*
Added handling of real-valued parameters/localparams
Clifford Wolf
2014-06-14
*
Added Verilog lexer and parser support for real values
Clifford Wolf
2014-06-13
*
Added read_verilog -sv options, added support for bit, logic,
Clifford Wolf
2014-06-12
*
Add support for cell arrays
Clifford Wolf
2014-06-07
*
made the generate..endgenrate keywords optional
Clifford Wolf
2014-06-06
*
added while and repeat support to verilog parser
Clifford Wolf
2014-06-06
*
Improved error message for options after front-end filename arguments
Clifford Wolf
2014-06-04
*
Fixed clang -Wdeprecated-register warnings
Clifford Wolf
2014-04-20
*
Replaced depricated %name-prefix= bison directive
Clifford Wolf
2014-04-20
*
Merged OSX fixes from Siesh1oo with some modifications
Clifford Wolf
2014-03-13
*
Added support for `line compiler directive
Clifford Wolf
2014-03-11
*
Added Verilog support for "`default_nettype none"
Clifford Wolf
2014-02-17
*
Added a warning note about error reporting to read_verilog help message
Clifford Wolf
2014-02-16
*
Implemented read_verilog -defer
Clifford Wolf
2014-02-13
*
Added support for functions returning integer
Clifford Wolf
2014-02-12
*
Added read_verilog -setattr
Clifford Wolf
2014-02-05
*
Added support for blanks after -I and -D in read_verilog
Clifford Wolf
2014-02-02
*
Added constant size expression support of sized constants
Clifford Wolf
2014-02-01
*
Added read_verilog -icells option
Clifford Wolf
2014-01-29
*
Fixed handling of unsized constants in verilog frontend
Clifford Wolf
2014-01-24
*
Added Verilog parser support for asserts
Clifford Wolf
2014-01-19
*
Fixed parsing of verilog macros at end of line
Clifford Wolf
2014-01-18
*
Added verilog_defaults command
Clifford Wolf
2014-01-17
*
Fixed parsing of non-arg macro calls followed by "("
Clifford Wolf
2013-12-27
*
Fixed parsing of macros with no arguments and expansion text starting with "("
Clifford Wolf
2013-12-27
*
Added proper === and !== support in constant expressions
Clifford Wolf
2013-12-27
*
Added elsif preproc support
Clifford Wolf
2013-12-18
*
Added support for macro arguments
Clifford Wolf
2013-12-18
*
Added AstNode::mkconst_str API
Clifford Wolf
2013-12-05
*
Various improvements in support for generate statements
Clifford Wolf
2013-12-04
*
Added support for local regs in named blocks
Clifford Wolf
2013-12-04
*
Added verilog frontend -ignore_redef option
Clifford Wolf
2013-11-24
*
Improved handling of initialized registers
Clifford Wolf
2013-11-23
*
Renamed "placeholder" to "blackbox"
Clifford Wolf
2013-11-22
*
Fixed O(n^2) performance bug in verilog preprocessor
Clifford Wolf
2013-11-22
*
Enable {* .. *} feature per default (removes dependency to REJECT feature in ...
Clifford Wolf
2013-11-22
*
Implemented indexed part selects
Clifford Wolf
2013-11-20
*
Added "synthesis" in (synopsys|synthesis) comment support
Clifford Wolf
2013-11-20
*
Implemented part/bit select on memory read
Clifford Wolf
2013-11-20
*
Added init= attribute for fpga-style reset values
Clifford Wolf
2013-11-20
*
Fixed parsing of module arguments when one type is used for many args
Clifford Wolf
2013-11-19
*
Fixed parsing of "parameter integer"
Clifford Wolf
2013-11-13
*
Various fixes for correct parameter support
Clifford Wolf
2013-11-07
*
Fixed handling of boolean attributes (frontends)
Clifford Wolf
2013-10-24
*
Fixed handling of boolean attributes (kernel)
Clifford Wolf
2013-10-24
*
fixed Verilog parser filename and line numbering issue with include files
Johann Glaser
2013-08-21
*
Added support for include directories with the new '-I' argument of the
Johann Glaser
2013-08-20
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