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ice40
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Author
Age
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Imported GIT HEAD: 0.8+20190328git32bd0f2
Ruben Undheim
2019-03-28
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New upstream version 0.7+20181007git9850de4
Ruben Undheim
2018-10-15
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New upstream version 0.7+20180830git0b7a184
Ruben Undheim
2018-08-30
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Imported yosys 0.7
Ruben Undheim
2016-11-03
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Squashed commit of the following:
Ruben Undheim
2016-09-23
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Work around DDR dout sim glitches in ice40 SB_IO sim model
Clifford Wolf
2016-02-07
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Added dffsr2dff
Clifford Wolf
2016-02-02
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Re-run ice40_opt in "synth_ice40 -abc2"
Clifford Wolf
2015-12-22
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Improvements in ice40_opt
Clifford Wolf
2015-12-22
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Bugfix in ice40_ffinit
Clifford Wolf
2015-12-22
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Improved ice40_ffinit
Clifford Wolf
2015-12-22
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Added "synth_ice40 -abc2"
Clifford Wolf
2015-12-08
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Merge pull request #108 from cseed/master
Clifford Wolf
2015-12-07
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Added LO to ICESTORM_LC for LUT cascade route.
Cotton Seed
2015-12-06
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Added ice40_ffinit pass
Clifford Wolf
2015-11-26
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Fixed WE/RE usage in iCE40 BRAM mapping
Clifford Wolf
2015-11-24
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Fixed iCE40 SB_IO OUTPUT_ENABLE vs. outena_q handling
Clifford Wolf
2015-11-06
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Added read-enable to memory model
Clifford Wolf
2015-09-25
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Fixed ice40 handling of negclk RAM40
Clifford Wolf
2015-09-10
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Switched to Python 3
Clifford Wolf
2015-08-22
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Another bugfix for ice40 and xilinx brams_init make rules
Clifford Wolf
2015-08-16
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Fixed Makefile rules for generated share files
Clifford Wolf
2015-08-16
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Added tribuf command
Clifford Wolf
2015-08-16
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Adjust makefiles to work with out-of-tree builds
Clifford Wolf
2015-08-12
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Improved handling of "keep" attributes in hierarchical designs in opt_clean
Clifford Wolf
2015-08-12
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Added iCE40 WARMBOOT cell
Marcus Comstedt
2015-08-06
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Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle)
Clifford Wolf
2015-07-27
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iCE40 DFF sim models: init Q regs to 0
Clifford Wolf
2015-07-20
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Avoid tristate warning for blackbox ice40/cells_sim.v
Clifford Wolf
2015-07-18
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Fixed trailing whitespaces
Clifford Wolf
2015-07-02
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iCE40: set min bram efficiency to 2%
Clifford Wolf
2015-06-20
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synth_ice40 now flattens by default
Clifford Wolf
2015-06-09
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Added iCE40 PLL cells
Clifford Wolf
2015-05-31
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Added output args to synth_ice40
Clifford Wolf
2015-05-26
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improved ice40 SB_IO sim model
Clifford Wolf
2015-05-23
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Added ice40 SB_IO sim model
Clifford Wolf
2015-05-23
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Verific build fixes
Clifford Wolf
2015-05-17
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ice40_opt bugfix
Clifford Wolf
2015-04-27
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iCE40: SB_CARRY const fold -> unmap SB_LUT
Clifford Wolf
2015-04-27
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Added iCE40 const folding support for SB_CARRY
Clifford Wolf
2015-04-27
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Initialization support for all iCE40 bram modes
Clifford Wolf
2015-04-26
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initialized iCE40 brams (mode 0)
Clifford Wolf
2015-04-25
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improved iCE40 SB_RAM40_4K simulation model
Clifford Wolf
2015-04-25
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More iCE40 bram improvements
Clifford Wolf
2015-04-25
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iCE40 bram progress
Clifford Wolf
2015-04-24
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iCE40 bram tests and fixes
Clifford Wolf
2015-04-24
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Added ice40 bram support
Clifford Wolf
2015-04-24
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iCE40: Added SB_RAM40_4K{,NR,NW,NRNW}* models
Clifford Wolf
2015-04-19
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added sync reset to ice40 test_ffs.sh
Clifford Wolf
2015-04-18
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Added ice40 test_arith
Clifford Wolf
2015-04-18
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