Commit message (Expand) | Author | Age | ||
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* | Added test cases from 2012 paper on comparison of foss verilog synthesis tools | Clifford Wolf | 2013-03-31 | |
* | Renamed hansimem.v test case to mem_arst.v | Clifford Wolf | 2013-03-24 | |
* | Added hansimem testcase (memory with async reset) | Clifford Wolf | 2013-03-24 | |
* | added ckeck for Icarus Verilog, otherwise the tests are silently stopped | Johann Glaser | 2013-03-17 | |
* | added more .gitignore files (make test) | Clifford Wolf | 2013-01-05 | |
* | initial import | Clifford Wolf | 2013-01-05 |