New upstream version 0.7+20180830git0b7a184

6 files changed, 134 insertions, 20 deletions

diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc
index 236d6c55..ab961ac0 100644
--- a/techlibs/common/Makefile.inc
+++ b/techlibs/common/Makefile.inc
@@ -24,5 +24,6 @@ $(eval $(call add_share_file,share,techlibs/common/simcells.v))
 $(eval $(call add_share_file,share,techlibs/common/techmap.v))
 $(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
 $(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
+$(eval $(call add_share_file,share,techlibs/common/dff2ff.v))
 $(eval $(call add_share_file,share,techlibs/common/cells.lib))
 
diff --git a/techlibs/common/dff2ff.v b/techlibs/common/dff2ff.v
new file mode 100644
index 00000000..2dc4d20d
--- /dev/null
+++ b/techlibs/common/dff2ff.v
@@ -0,0 +1,14 @@
+(* techmap_celltype = "$dff" *)
+module dff2ff (CLK, D, Q);
+	parameter WIDTH = 1;
+	parameter CLK_POLARITY = 1;
+
+	input CLK;
+	input [WIDTH-1:0] D;
+	output reg [WIDTH-1:0] Q;
+
+	wire [1023:0] _TECHMAP_DO_ = "proc;;";
+
+	always @($global_clock)
+		Q <= D;
+endmodule
diff --git a/techlibs/common/prep.cc b/techlibs/common/prep.cc
index 71534983..897f37db 100644
--- a/techlibs/common/prep.cc
+++ b/techlibs/common/prep.cc
@@ -29,7 +29,7 @@ struct PrepPass : public ScriptPass
 {
 	PrepPass() : ScriptPass("prep", "generic synthesis script") { }
 
-	virtual void help() YS_OVERRIDE
+	void help() YS_OVERRIDE
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
 		log("\n");
@@ -55,15 +55,16 @@ struct PrepPass : public ScriptPass
 		log("\n");
 		log("    -memx\n");
 		log("        simulate verilog simulation behavior for out-of-bounds memory accesses\n");
-		log("        using the 'memory_memx' pass. This option implies -nordff.\n");
+		log("        using the 'memory_memx' pass.\n");
 		log("\n");
 		log("    -nomem\n");
 		log("        do not run any of the memory_* passes\n");
 		log("\n");
-		log("    -nordff\n");
-		log("        passed to 'memory_dff'. prohibits merging of FFs into memory read ports\n");
+		log("    -rdff\n");
+		log("        do not pass -nordff to 'memory_dff'. This enables merging of FFs into\n");
+		log("        memory read ports.\n");
 		log("\n");
-		log("     -nokeepdc\n");
+		log("    -nokeepdc\n");
 		log("        do not call opt_* with -keepdc\n");
 		log("\n");
 		log("    -run <from_label>[:<to_label>]\n");
@@ -77,13 +78,12 @@ struct PrepPass : public ScriptPass
 		log("\n");
 	}
 
-	string top_module, fsm_opts, memory_opts;
-	bool autotop, flatten, ifxmode, memxmode, nomemmode, nokeepdc;
+	string top_module, fsm_opts;
+	bool autotop, flatten, ifxmode, memxmode, nomemmode, nokeepdc, nordff;
 
-	virtual void clear_flags() YS_OVERRIDE
+	void clear_flags() YS_OVERRIDE
 	{
 		top_module.clear();
-		memory_opts.clear();
 
 		autotop = false;
 		flatten = false;
@@ -91,9 +91,10 @@ struct PrepPass : public ScriptPass
 		memxmode = false;
 		nomemmode = false;
 		nokeepdc = false;
+		nordff = true;
 	}
 
-	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
+	void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
 	{
 		string run_from, run_to;
 
@@ -129,7 +130,6 @@ struct PrepPass : public ScriptPass
 			}
 			if (args[argidx] == "-memx") {
 				memxmode = true;
-				memory_opts += " -nordff";
 				continue;
 			}
 			if (args[argidx] == "-nomem") {
@@ -137,7 +137,11 @@ struct PrepPass : public ScriptPass
 				continue;
 			}
 			if (args[argidx] == "-nordff") {
-				memory_opts += " -nordff";
+				nordff = true;
+				continue;
+			}
+			if (args[argidx] == "-rdff") {
+				nordff = false;
 				continue;
 			}
 			if (args[argidx] == "-nokeepdc") {
@@ -159,7 +163,7 @@ struct PrepPass : public ScriptPass
 		log_pop();
 	}
 
-	virtual void script() YS_OVERRIDE
+	void script() YS_OVERRIDE
 	{
 
 		if (check_label("begin"))
@@ -196,7 +200,7 @@ struct PrepPass : public ScriptPass
 					run(memxmode ? "wreduce -memx" : "wreduce");
 			}
 			if (!nomemmode) {
-				run("memory_dff" + (help_mode ? " [-nordff]" : memory_opts));
+				run(string("memory_dff") + (help_mode ? " [-nordff]" : nordff ? " -nordff" : ""));
 				if (help_mode || memxmode)
 					run("memory_memx", "(if -memx)");
 				run("opt_clean");
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index e770c545..937512e7 100644
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -175,6 +175,44 @@ endmodule
 
 //  |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
 //-
+//-     $_ANDNOT_ (A, B, Y)
+//-
+//- A 2-input AND-NOT gate.
+//-
+//- Truth table:    A B | Y
+//-                -----+---
+//-                 0 0 | 0
+//-                 0 1 | 0
+//-                 1 0 | 1
+//-                 1 1 | 0
+//-
+module \$_ANDNOT_ (A, B, Y);
+input A, B;
+output Y;
+assign Y = A & (~B);
+endmodule
+
+//  |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
+//-
+//-     $_ORNOT_ (A, B, Y)
+//-
+//- A 2-input OR-NOT gate.
+//-
+//- Truth table:    A B | Y
+//-                -----+---
+//-                 0 0 | 1
+//-                 0 1 | 0
+//-                 1 0 | 1
+//-                 1 1 | 1
+//-
+module \$_ORNOT_ (A, B, Y);
+input A, B;
+output Y;
+assign Y = A | (~B);
+endmodule
+
+//  |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
+//-
 //-     $_MUX_ (A, B, S, Y)
 //-
 //- A 2-input MUX gate.
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 2c4db1ac..8e43fe05 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1305,6 +1305,30 @@ endmodule
 
 // --------------------------------------------------------
 
+module \$live (A, EN);
+
+input A, EN;
+
+endmodule
+
+// --------------------------------------------------------
+
+module \$fair (A, EN);
+
+input A, EN;
+
+endmodule
+
+// --------------------------------------------------------
+
+module \$cover (A, EN);
+
+input A, EN;
+
+endmodule
+
+// --------------------------------------------------------
+
 module \$initstate (Y);
 
 output reg Y = 1;
@@ -1346,6 +1370,30 @@ endmodule
 
 // --------------------------------------------------------
 
+module \$allconst (Y);
+
+parameter WIDTH = 0;
+
+output [WIDTH-1:0] Y;
+
+assign Y = 'bx;
+
+endmodule
+
+// --------------------------------------------------------
+
+module \$allseq (Y);
+
+parameter WIDTH = 0;
+
+output [WIDTH-1:0] Y;
+
+assign Y = 'bx;
+
+endmodule
+
+// --------------------------------------------------------
+
 module \$equiv (A, B, Y);
 
 input A, B;
diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc
index 11ebe533..efb21475 100644
--- a/techlibs/common/synth.cc
+++ b/techlibs/common/synth.cc
@@ -29,7 +29,7 @@ struct SynthPass : public ScriptPass
 {
 	SynthPass() : ScriptPass("synth", "generic synthesis script") { }
 
-	virtual void help() YS_OVERRIDE
+	void help() YS_OVERRIDE
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
 		log("\n");
@@ -64,6 +64,9 @@ struct SynthPass : public ScriptPass
 		log("    -nordff\n");
 		log("        passed to 'memory'. prohibits merging of FFs into memory read ports\n");
 		log("\n");
+		log("    -noshare\n");
+		log("        do not run SAT-based resource sharing\n");
+		log("\n");
 		log("    -run <from_label>[:<to_label>]\n");
 		log("        only run the commands between the labels (see below). an empty\n");
 		log("        from label is synonymous to 'begin', and empty to label is\n");
@@ -76,9 +79,9 @@ struct SynthPass : public ScriptPass
 	}
 
 	string top_module, fsm_opts, memory_opts;
-	bool autotop, flatten, noalumacc, nofsm, noabc;
+	bool autotop, flatten, noalumacc, nofsm, noabc, noshare;
 
-	virtual void clear_flags() YS_OVERRIDE
+	void clear_flags() YS_OVERRIDE
 	{
 		top_module.clear();
 		fsm_opts.clear();
@@ -89,9 +92,10 @@ struct SynthPass : public ScriptPass
 		noalumacc = false;
 		nofsm = false;
 		noabc = false;
+		noshare = false;
 	}
 
-	virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
+	void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
 	{
 		string run_from, run_to;
 		clear_flags();
@@ -142,6 +146,10 @@ struct SynthPass : public ScriptPass
 				memory_opts += " -nordff";
 				continue;
 			}
+			if (args[argidx] == "-noshare") {
+				noshare = true;
+				continue;
+			}
 			break;
 		}
 		extra_args(args, argidx, design);
@@ -157,7 +165,7 @@ struct SynthPass : public ScriptPass
 		log_pop();
 	}
 
-	virtual void script() YS_OVERRIDE
+	void script() YS_OVERRIDE
 	{
 		if (check_label("begin"))
 		{
@@ -186,7 +194,8 @@ struct SynthPass : public ScriptPass
 			run("wreduce");
 			if (!noalumacc)
 				run("alumacc");
-			run("share");
+			if (!noshare)
+				run("share");
 			run("opt");
 			if (!nofsm)
 				run("fsm" + fsm_opts);