yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
...
* \|	dch: switch from UNRELEASED to unstable	Sebastian Kuzminsky	2016-03-03
* \|	d/control: add Seb to the uploaders	Sebastian Kuzminsky	2016-03-03
* \|	handle yosys-smtbmc's dependency on python	Sebastian Kuzminsky	2016-03-03
* \|	add a manpage for yosys-smtbmc	Sebastian Kuzminsky	2016-03-03
* \|	enable parallel compilation	Sebastian Kuzminsky	2016-03-03
* \|	don't run "make" as part of override_dh_auto_configure	Sebastian Kuzminsky	2016-03-03
* \|	fix upstream spelling mistakes	Sebastian Kuzminsky	2016-03-03
* \|	refresh gitrevision patch	Sebastian Kuzminsky	2016-03-03
* \|	update changelog for 0.6-1	Sebastian Kuzminsky	2016-03-03
* \|	Merge tag 'upstream/0.6' into new	Sebastian Kuzminsky	2016-02-29
\|\\|
\| *	Yosys 0.6	Clifford Wolf	2016-02-26
\| *	Fixed BLIF parser for empty port assignments	Clifford Wolf	2016-02-24
\| *	Use easyer-to-read unoptimized ceil_log2()	Clifford Wolf	2016-02-15
\| *	Updated ABC to ae7d65e71adc	Clifford Wolf	2016-02-15
\| *	Updated command reference in manual	Clifford Wolf	2016-02-14
\| *	Changelog for upcoming 0.6 release	Clifford Wolf	2016-02-14
\| *	Fixed more visual studio warnings	Clifford Wolf	2016-02-14
\| *	Fixed some visual studio warnings	Clifford Wolf	2016-02-13
\| *	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2016-02-13
\| \|\
\| \| *	Fixed MXE ABC build	Clifford Wolf	2016-02-13
\| * \|	Added "int ceil_log2(int)" function	Clifford Wolf	2016-02-13
\| \|/
\| *	Run dffsr2dff in synth_xilinx	Clifford Wolf	2016-02-13
\| *	Support for more Verific primitives (patch I got per email)	Clifford Wolf	2016-02-13
\| *	Updated ABC	Clifford Wolf	2016-02-08
\| *	Work around DDR dout sim glitches in ice40 SB_IO sim model	Clifford Wolf	2016-02-07
\| *	Updated ABC	Clifford Wolf	2016-02-07
\| *	Added "stat -liberty" for calculating chip area	Clifford Wolf	2016-02-04
\| *	Bugfix in Verific front-end	Clifford Wolf	2016-02-03
\| *	Updated verific build instructions	Clifford Wolf	2016-02-02
\| *	Improved dffsr2dff pass	Clifford Wolf	2016-02-02
\| *	Added dffsr2dff	Clifford Wolf	2016-02-02
\| *	Added addBufGate module method	Clifford Wolf	2016-02-02
\| *	Use alphanumerical order instead of idstring idx in opt_clean compare_signals()	Clifford Wolf	2016-02-02
\| *	Added CodeOfConduct	Clifford Wolf	2016-02-01
\| *	Updated ABC to hg rev ee212a9e94df	Clifford Wolf	2016-02-01
\| *	Progress in cell library documentation	Clifford Wolf	2016-02-01
\| *	Added "abc -luts" option, Improved Xilinx logic mapping	Clifford Wolf	2016-02-01
\| *	Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs)	Clifford Wolf	2016-02-01
\| *	SigMap performance improvement	Clifford Wolf	2016-02-01
\| *	hashlib mfp<> performance improvements	Clifford Wolf	2016-02-01
\| *	Added reserve() method to haslib classes and	Clifford Wolf	2016-01-31
\| *	Merge branch 'rtlil_remove2_speedup' of https://github.com/kc8apf/yosys	Clifford Wolf	2016-01-31
\| \|\
\| \| *	rtlil: Improve performance of SigSpec::extract(SigSpec, SigSpec*)	Rick Altherr	2016-01-31
\| \| *	rtlil: speed up SigSpec::sort_and_unify()	Rick Altherr	2016-01-31
\| \| *	rtlil: improve performance of SigSpec::replace(SigSpec, SigSpec, SigSpec*)	Rick Altherr	2016-01-31
\| \| *	genrtlil: avoid converting SigSpec to set<SigBit> when going through removeSi...	Rick Altherr	2016-01-31
\| \| *	rtlil: improve performance of SigSpec::remove2(SigSpec, SigSpec*)	Rick Altherr	2016-01-31
\| * \|	More clang sanitizer stuff	Clifford Wolf	2016-01-31
\| \|/
\| *	Meaningless coding style change	Clifford Wolf	2016-01-31
\| *	Merge branch 'rtlil_remove2_speedup' of https://github.com/kc8apf/yosys	Clifford Wolf	2016-01-31
\| \|\