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Age
*
Added $tribuf and $_TBUF_ sim models
Clifford Wolf
2015-08-16
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Added tribuf command
Clifford Wolf
2015-08-16
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Added $tribuf and $_TBUF_ cell types
Clifford Wolf
2015-08-16
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Fixed opt_clean handling of inout ports
Clifford Wolf
2015-08-16
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Fixed generation of smt2 concat statements
Clifford Wolf
2015-08-15
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Fix version strings for out-of-tree builds
Larry Doolittle
2015-08-14
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Another block of spelling fixes
Larry Doolittle
2015-08-14
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Keep gcc from complaining about uninitialized variables
Larry Doolittle
2015-08-14
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Re-created command-reference-manual.tex, copied some doc fixes to online help
Clifford Wolf
2015-08-14
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Spell check (by Larry Doolittle)
Clifford Wolf
2015-08-14
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Merge branch 'master' of github.com:cliffordwolf/yosys
Clifford Wolf
2015-08-13
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Added "write_smt2 -regs"
Clifford Wolf
2015-08-12
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Fixed "make clean" for out-of-tree builds
Clifford Wolf
2015-08-12
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Adjust makefiles to work with out-of-tree builds
Clifford Wolf
2015-08-12
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Improved handling of "keep" attributes in hierarchical designs in opt_clean
Clifford Wolf
2015-08-12
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Fixed hashlib for 64 bit int keys
Clifford Wolf
2015-08-12
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Added SMV back-end 'test_cells.sh' script
Clifford Wolf
2015-08-12
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More ASCII encoding fixes
Clifford Wolf
2015-08-13
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Fixed CRLF line endings
Clifford Wolf
2015-08-13
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Some ASCII encoding fixes (comments and docs) by Larry Doolittle
Clifford Wolf
2015-08-13
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Merge pull request #70 from gaomy3832/bugfix
Clifford Wolf
2015-08-12
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Remove unused blackbox modules in opt_clean.
Mingyu Gao
2015-08-11
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Bugfix for cell hash cache option in opt_share.
Mingyu Gao
2015-08-10
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Bugfix for cell hash cache option in opt_share.
Mingyu Gao
2015-08-11
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Fixed handling of [a-fxz?] in decimal constants
Clifford Wolf
2015-08-11
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Added missing ct_all setup to opt_clean
Clifford Wolf
2015-08-11
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Use MEMID as name for $mem cell
Clifford Wolf
2015-08-09
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Merge pull request #69 from zeldin/master
Clifford Wolf
2015-08-07
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Added iCE40 WARMBOOT cell
Marcus Comstedt
2015-08-06
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Remove some very strange whitespace in btor.cc (by Larry Doolittle)
Clifford Wolf
2015-08-05
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Bugfix in SMV back-end for partially unassigned wires
Clifford Wolf
2015-08-05
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Added ENABLE_LIBYOSYS Makefile option
Clifford Wolf
2015-08-04
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Added $assert support to SMV back-end
Clifford Wolf
2015-08-04
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Added libyosys.so build
Clifford Wolf
2015-08-04
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Merge pull request #68 from zeldin/master
Clifford Wolf
2015-08-01
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Add -noautowire option to verilog frontend
Marcus Comstedt
2015-08-01
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Added WORDS parameter to $meminit
Clifford Wolf
2015-07-31
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Fixed flatten $meminit handling
Clifford Wolf
2015-07-30
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Improvements in BLIF back-end
Clifford Wolf
2015-07-29
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Fixed nested mem2reg
Clifford Wolf
2015-07-29
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Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle)
Clifford Wolf
2015-07-27
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Fixed "check" command for inout ports
Clifford Wolf
2015-07-27
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Some cleanups in opt_rmdff
Clifford Wolf
2015-07-25
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Added "miter -assert"
Clifford Wolf
2015-07-25
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Keep modules with $assume (like $assert)
Clifford Wolf
2015-07-25
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Improved $adff simplification
Clifford Wolf
2015-07-24
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iCE40 DFF sim models: init Q regs to 0
Clifford Wolf
2015-07-20
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Fixed techmap processes error msg
Clifford Wolf
2015-07-18
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Avoid tristate warning for blackbox ice40/cells_sim.v
Clifford Wolf
2015-07-18
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Some fixes in "select" command
Clifford Wolf
2015-07-16
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