Commit message (Expand) | Author | Age | |
---|---|---|---|
* | Added frontend (-f) option to autotest.sh | Clifford Wolf | 2014-02-15 |
* | Updated ABC and some related changes | Clifford Wolf | 2014-02-13 |
* | Disabled "abc -dff" in "make test" for now (waiting for scorr bugfix in ABC) | Clifford Wolf | 2014-02-12 |
* | Replaced isim with xsim in tests/tools/autotest.sh, removed xst support | Clifford Wolf | 2014-02-03 |
* | Added autotest.sh -p option | Clifford Wolf | 2014-01-02 |
* | Use "abc -dff" in "make test" | Clifford Wolf | 2013-12-31 |
* | Fixed commented out techmap call in tests/tools/autotest.sh | Clifford Wolf | 2013-12-31 |
* | Renamed stdcells_sim.v to simcells.v and fixed blackbox.v | Clifford Wolf | 2013-11-24 |
* | Added modelsim support to autotest | Clifford Wolf | 2013-11-24 |
* | Moved common techlib files to techlibs/common | Clifford Wolf | 2013-09-15 |
* | Added $div and $mod technology mapping | Clifford Wolf | 2013-08-09 |
* | Major redesign of expr width/sign detecion (verilog/ast frontend) | Clifford Wolf | 2013-07-09 |
* | initial import | Clifford Wolf | 2013-01-05 |