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Author
Age
*
Added $equiv cell type
Clifford Wolf
2015-01-19
*
Improvements in CodingReadme
Clifford Wolf
2014-12-31
*
Added more documentation fixmes for nontrivial register cells
Clifford Wolf
2014-12-08
*
manual/presentation.tex: bg option is unknown with beamer 3.3 in beamercolorbox
Fabien Marteau
2014-12-07
*
suppressing semi-colon at the end of dot files
Fabien Marteau
2014-12-05
*
Added some missing .gitignore in manual/
Clifford Wolf
2014-12-04
*
Some fixes in stubnets example
Clifford Wolf
2014-11-24
*
Some fixes in presentation
Clifford Wolf
2014-11-08
*
Various documentation updates
Clifford Wolf
2014-11-08
*
Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
*
Added $lcu cell type
Clifford Wolf
2014-09-08
*
Corrected spelling mistakes found by lintian
Ruben Undheim
2014-09-06
*
Removed $bu0 cell type
Clifford Wolf
2014-09-04
*
Removed references to yosys-svgviewer from docs
Clifford Wolf
2014-09-02
*
Added $alu cell type
Clifford Wolf
2014-08-30
*
Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $...
Clifford Wolf
2014-08-16
*
Renamed $_INV_ cell type to $_NOT_
Clifford Wolf
2014-08-15
*
Removed old doc references to $safe_pmux
Clifford Wolf
2014-08-15
*
RIP $safe_pmux
Clifford Wolf
2014-08-14
*
Replaced sha1 implementation
Clifford Wolf
2014-08-01
*
Added module->design and cell->module, wire->module pointers
Clifford Wolf
2014-07-31
*
Renamed "stdcells.v" to "techmap.v"
Clifford Wolf
2014-07-31
*
Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
*
Refactoring: Renamed RTLIL::Module::cells to cells_
Clifford Wolf
2014-07-27
*
Refactoring: Renamed RTLIL::Module::wires to wires_
Clifford Wolf
2014-07-27
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
*
Fixed manual/CHAPTER_Prog/stubnets.cc
Clifford Wolf
2014-07-23
*
Removed RTLIL::SigSpec::expand() method
Clifford Wolf
2014-07-23
*
Changed the $mem/$memwr WR_EN input to a per-data-bit enable signal
Clifford Wolf
2014-07-16
*
small changes in presentation
Clifford Wolf
2014-07-02
*
Tiny fix in presentation
Clifford Wolf
2014-06-29
*
Progress in presentation
Clifford Wolf
2014-06-29
*
Progress in presentation
Clifford Wolf
2014-06-26
*
Progress in presentation
Clifford Wolf
2014-06-22
*
fixed typo
Clifford Wolf
2014-06-21
*
Progress in presentation
Clifford Wolf
2014-06-21
*
Progress in presentation
Clifford Wolf
2014-06-14
*
Progress in presentation
Clifford Wolf
2014-05-06
*
Typos and grammar fixes through chapter 4.
Anthony J. Bentley
2014-05-02
*
Typos and grammar fixes through chapter 2.
Anthony J. Bentley
2014-04-11
*
POSIX find requires a path argument.
Anthony J. Bentley
2014-04-04
*
Progress in presentation
Clifford Wolf
2014-02-21
*
Progress in presentation
Clifford Wolf
2014-02-21
*
Progress in presentation
Clifford Wolf
2014-02-20
*
Progress in presentation
Clifford Wolf
2014-02-20
*
Progress in presentation
Clifford Wolf
2014-02-20
*
Progress in presentation
Clifford Wolf
2014-02-18
*
Progress in presentation
Clifford Wolf
2014-02-17
*
Progress in presentation
Clifford Wolf
2014-02-16
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