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authorAndrej Shadura <andrewsh@debian.org>2018-05-08 15:59:29 +0200
committerAndrej Shadura <andrewsh@debian.org>2018-05-08 15:59:29 +0200
commit5b8466f7fae0e071c0f4eda13051c93313910028 (patch)
tree7061957f770e5e245ba00666dad912a2d44e7fdc
Import Upstream version 1.3.7
-rw-r--r--CMakeLists.txt117
-rw-r--r--ChangeLog198
-rw-r--r--LICENSE341
-rw-r--r--MicrosoftWindows_compatibility/external_command.bat1
-rw-r--r--MicrosoftWindows_compatibility/mcu8051ide.icobin0 -> 16958 bytes
-rw-r--r--MicrosoftWindows_compatibility/mcu8051ide_win_setup.iss66
-rw-r--r--MicrosoftWindows_compatibility/sdcc.bat2
-rw-r--r--README87
-rw-r--r--TODO5
-rwxr-xr-xclear_all.sh11
-rwxr-xr-xconfigure8
-rw-r--r--data/licence.txt341
-rw-r--r--data/m5ihib.dtd103
-rw-r--r--data/mcus.xml1968
-rw-r--r--data/project.dtd220
-rw-r--r--data/tips.xml191
-rw-r--r--demo/Demo project.mcu8051ide441
-rw-r--r--demo/demo.wtc15
-rw-r--r--demo/demo0.adf9
-rw-r--r--demo/demo0.asm27
-rw-r--r--demo/demo0.bin1
-rw-r--r--demo/demo0.hex2
-rw-r--r--demo/demo0.lst198
-rw-r--r--demo/demo0.sim6
-rw-r--r--demo/demo1.adf19
-rw-r--r--demo/demo1.asm63
-rw-r--r--demo/demo1.binbin0 -> 15 bytes
-rw-r--r--demo/demo1.hex2
-rw-r--r--demo/demo1.lst262
-rw-r--r--demo/demo1.sim16
-rw-r--r--demo/demo2.adf50
-rw-r--r--demo/demo2.asm78
-rw-r--r--demo/demo2.binbin0 -> 42 bytes
-rw-r--r--demo/demo2.hex3
-rw-r--r--demo/demo2.lst270
-rw-r--r--demo/demo2.sim47
-rw-r--r--demo/demo3.adf9
-rw-r--r--demo/demo3.asm72
-rw-r--r--demo/demo3.bin1
-rw-r--r--demo/demo3.sim6
-rw-r--r--demo/demo4.adf45
-rw-r--r--demo/demo4.asm81
-rw-r--r--demo/demo4.binbin0 -> 66 bytes
-rw-r--r--demo/demo4.hex9
-rw-r--r--demo/demo4.lst228
-rw-r--r--demo/demo4.sim42
-rw-r--r--demo/demo5.adf5
-rw-r--r--demo/demo5.asm35
-rw-r--r--demo/demo5.bin1
-rw-r--r--demo/demo5.hex2
-rw-r--r--demo/demo5.lst216
-rw-r--r--demo/demo5.sim2
-rw-r--r--demo/demo_c_0bin0 -> 1425 bytes
-rw-r--r--demo/demo_c_0.adb106
-rw-r--r--demo/demo_c_0.asm529
-rw-r--r--demo/demo_c_0.c41
-rw-r--r--demo/demo_c_0.cdb278
-rw-r--r--demo/demo_c_0.hashes1
-rw-r--r--demo/demo_c_0.hex34
-rw-r--r--demo/demo_c_0.ihx34
-rw-r--r--demo/demo_c_0.lnk19
-rw-r--r--demo/demo_c_0.lst529
-rw-r--r--demo/demo_c_0.map488
-rw-r--r--demo/demo_c_0.mem28
-rw-r--r--demo/demo_c_0.rel378
-rw-r--r--demo/demo_c_0.rst529
-rw-r--r--demo/demo_c_0.sym659
-rw-r--r--demo/file.hex2
-rw-r--r--demo/file.lst292
-rw-r--r--demo/keypad_displaybin0 -> 1614 bytes
-rw-r--r--demo/keypad_display.adb106
-rw-r--r--demo/keypad_display.asm624
-rw-r--r--demo/keypad_display.c84
-rw-r--r--demo/keypad_display.cdb328
-rw-r--r--demo/keypad_display.hashes1
-rw-r--r--demo/keypad_display.hex49
-rw-r--r--demo/keypad_display.ihx49
-rw-r--r--demo/keypad_display.lnk19
-rw-r--r--demo/keypad_display.lst624
-rw-r--r--demo/keypad_display.map536
-rw-r--r--demo/keypad_display.mem28
-rw-r--r--demo/keypad_display.rel490
-rw-r--r--demo/keypad_display.rst624
-rw-r--r--demo/keypad_display.sym712
-rw-r--r--demo/keypad_display.vhw6
-rw-r--r--demo/ledmatrix.adb102
-rw-r--r--demo/ledmatrix.asm494
-rw-r--r--demo/ledmatrix.c43
-rw-r--r--demo/ledmatrix.cdb251
-rw-r--r--demo/ledmatrix.hashes1
-rw-r--r--demo/ledmatrix.hex26
-rw-r--r--demo/ledmatrix.ihx26
-rw-r--r--demo/ledmatrix.lnk19
-rw-r--r--demo/ledmatrix.lst494
-rw-r--r--demo/ledmatrix.m5ihib599
-rw-r--r--demo/ledmatrix.map454
-rw-r--r--demo/ledmatrix.mem28
-rw-r--r--demo/ledmatrix.rel328
-rw-r--r--demo/ledmatrix.rst494
-rw-r--r--demo/ledmatrix.sym634
-rw-r--r--demo/ledmatrix.vhc6
-rw-r--r--demo/mleddisplay.adf45
-rw-r--r--demo/mleddisplay.asm125
-rw-r--r--demo/mleddisplay.binbin0 -> 38 bytes
-rw-r--r--demo/mleddisplay.hex2
-rw-r--r--demo/mleddisplay.lst316
-rw-r--r--demo/mleddisplay.vhw5
-rw-r--r--doc/man/mcu8051ide.1.gzbin0 -> 2334 bytes
-rw-r--r--icons/16x16/1downarrow.pngbin0 -> 306 bytes
-rw-r--r--icons/16x16/1leftarrow.pngbin0 -> 296 bytes
-rw-r--r--icons/16x16/1rightarrow.pngbin0 -> 314 bytes
-rw-r--r--icons/16x16/1uparrow.pngbin0 -> 305 bytes
-rw-r--r--icons/16x16/2_rightarrow.pngbin0 -> 333 bytes
-rw-r--r--icons/16x16/2downarrow.pngbin0 -> 407 bytes
-rw-r--r--icons/16x16/2leftarrow.pngbin0 -> 403 bytes
-rw-r--r--icons/16x16/2rightarrow.pngbin0 -> 385 bytes
-rw-r--r--icons/16x16/2uparrow.pngbin0 -> 386 bytes
-rw-r--r--icons/16x16/8seg.pngbin0 -> 232 bytes
-rw-r--r--icons/16x16/_1downarrow.pngbin0 -> 3262 bytes
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-rw-r--r--icons/16x16/ascii.pngbin0 -> 579 bytes
-rw-r--r--icons/16x16/asm.pngbin0 -> 535 bytes
-rw-r--r--icons/16x16/back.pngbin0 -> 571 bytes
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-rw-r--r--icons/16x16/bookmark_add.pngbin0 -> 708 bytes
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-rw-r--r--icons/16x16/bug.pngbin0 -> 1107 bytes
-rw-r--r--icons/16x16/button_cancel.pngbin0 -> 779 bytes
-rw-r--r--icons/16x16/camera_test.pngbin0 -> 611 bytes
-rw-r--r--icons/16x16/cancel.pngbin0 -> 890 bytes
-rw-r--r--icons/16x16/change_case.pngbin0 -> 303 bytes
-rw-r--r--icons/16x16/chardevice.pngbin0 -> 778 bytes
-rw-r--r--icons/16x16/clear_left.pngbin0 -> 388 bytes
-rw-r--r--icons/16x16/clear_left_r.pngbin0 -> 368 bytes
-rw-r--r--icons/16x16/colorize.pngbin0 -> 1023 bytes
-rw-r--r--icons/16x16/compfile.pngbin0 -> 581 bytes
-rw-r--r--icons/16x16/compfile_this.pngbin0 -> 625 bytes
-rw-r--r--icons/16x16/configure.pngbin0 -> 1055 bytes
-rw-r--r--icons/16x16/configure_shortcuts.pngbin0 -> 1009 bytes
-rw-r--r--icons/16x16/configure_toolbars.pngbin0 -> 1160 bytes
-rw-r--r--icons/16x16/contents.pngbin0 -> 1111 bytes
-rw-r--r--icons/16x16/corner.pngbin0 -> 132 bytes
-rw-r--r--icons/16x16/diode.pngbin0 -> 222 bytes
-rw-r--r--icons/16x16/disasm.pngbin0 -> 574 bytes
-rw-r--r--icons/16x16/dot.pngbin0 -> 283 bytes
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-rw-r--r--icons/16x16/edit.pngbin0 -> 691 bytes
-rw-r--r--icons/16x16/editclear.pngbin0 -> 277 bytes
-rw-r--r--icons/16x16/editcopy.pngbin0 -> 777 bytes
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-rw-r--r--icons/16x16/editdelete.pngbin0 -> 892 bytes
-rw-r--r--icons/16x16/editpaste.pngbin0 -> 979 bytes
-rw-r--r--icons/16x16/emacs.pngbin0 -> 632 bytes
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-rw-r--r--icons/16x16/exec.pngbin0 -> 854 bytes
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-rw-r--r--icons/16x16/filefind.pngbin0 -> 790 bytes
-rw-r--r--icons/16x16/fileimport.pngbin0 -> 851 bytes
-rw-r--r--icons/16x16/filenew.pngbin0 -> 686 bytes
-rw-r--r--icons/16x16/fileopen.pngbin0 -> 1080 bytes
-rw-r--r--icons/16x16/filesave.pngbin0 -> 838 bytes
-rw-r--r--icons/16x16/filesaveas.pngbin0 -> 1104 bytes
-rw-r--r--icons/16x16/filter.pngbin0 -> 820 bytes
-rw-r--r--icons/16x16/find.pngbin0 -> 987 bytes
-rw-r--r--icons/16x16/flag.pngbin0 -> 520 bytes
-rw-r--r--icons/16x16/folder_new.pngbin0 -> 649 bytes
-rw-r--r--icons/16x16/forward.pngbin0 -> 543 bytes
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-rw-r--r--icons/16x16/gedit.pngbin0 -> 541 bytes
-rw-r--r--icons/16x16/gohome.pngbin0 -> 410 bytes
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-rw-r--r--icons/32x32/help.pngbin0 -> 1587 bytes
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-rw-r--r--icons/32x32/messagebox_critical.pngbin0 -> 1591 bytes
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-rw-r--r--icons/32x32/messagebox_warning.pngbin0 -> 1692 bytes
-rw-r--r--icons/32x32/user_away.pngbin0 -> 2027 bytes
-rw-r--r--icons/32x32/wizard.pngbin0 -> 1325 bytes
-rw-r--r--icons/mcu/8031.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/8032.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/8051.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/8052.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C31.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C31X2.pngbin0 -> 6578 bytes
-rw-r--r--icons/mcu/80C32.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C32X2.pngbin0 -> 6937 bytes
-rw-r--r--icons/mcu/80C51.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C52.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C52X2.pngbin0 -> 6937 bytes
-rw-r--r--icons/mcu/80C54.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C54X2.pngbin0 -> 6710 bytes
-rw-r--r--icons/mcu/80C58.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/80C58X2.pngbin0 -> 6710 bytes
-rw-r--r--icons/mcu/8731.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/8751.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/8752.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/87C51.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/87C52.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/87C52X2.pngbin0 -> 6937 bytes
-rw-r--r--icons/mcu/87C54.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/87C54X2.pngbin0 -> 6710 bytes
-rw-r--r--icons/mcu/87C58.pngbin0 -> 3841 bytes
-rw-r--r--icons/mcu/87C58X2.pngbin0 -> 6710 bytes
-rw-r--r--icons/mcu/AT80C31X2.pngbin0 -> 4218 bytes
-rw-r--r--icons/mcu/AT80C32X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/AT80C52X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/AT80C54X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/AT80C58X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/AT87C52X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/AT87C54X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/AT87C58X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/AT89C2051.pngbin0 -> 3579 bytes
-rw-r--r--icons/mcu/AT89C4051.pngbin0 -> 3579 bytes
-rw-r--r--icons/mcu/AT89C51.pngbin0 -> 3678 bytes
-rw-r--r--icons/mcu/AT89C51RC.pngbin0 -> 4055 bytes
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-rw-r--r--icons/mcu/AT89C55WD.pngbin0 -> 3208 bytes
-rw-r--r--icons/mcu/AT89LP2052.pngbin0 -> 3892 bytes
-rw-r--r--icons/mcu/AT89LS51.pngbin0 -> 4096 bytes
-rw-r--r--icons/mcu/AT89LS52.pngbin0 -> 3236 bytes
-rw-r--r--icons/mcu/AT89LV51.pngbin0 -> 4256 bytes
-rw-r--r--icons/mcu/AT89LV52.pngbin0 -> 4554 bytes
-rw-r--r--icons/mcu/AT89LV55.pngbin0 -> 4823 bytes
-rw-r--r--icons/mcu/AT89S2051.pngbin0 -> 3752 bytes
-rw-r--r--icons/mcu/AT89S4051.pngbin0 -> 3752 bytes
-rw-r--r--icons/mcu/AT89S52.pngbin0 -> 3805 bytes
-rw-r--r--icons/mcu/AT89S8253.pngbin0 -> 4961 bytes
-rw-r--r--icons/mcu/T83C5101.pngbin0 -> 4084 bytes
-rw-r--r--icons/mcu/T83C5102.pngbin0 -> 4084 bytes
-rw-r--r--icons/mcu/T87C5101.pngbin0 -> 4084 bytes
-rw-r--r--icons/mcu/TS80C31X2.pngbin0 -> 4218 bytes
-rw-r--r--icons/mcu/TS80C32X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/TS80C52X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/TS80C54X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/TS80C58X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/TS87C52X2.pngbin0 -> 4546 bytes
-rw-r--r--icons/mcu/TS87C54X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/mcu/TS87C58X2.pngbin0 -> 4380 bytes
-rw-r--r--icons/other/choff.pngbin0 -> 194 bytes
-rw-r--r--icons/other/chon.pngbin0 -> 277 bytes
-rw-r--r--icons/other/ibrg_brg.pngbin0 -> 7148 bytes
-rw-r--r--icons/other/math0.pngbin0 -> 2226 bytes
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-rw-r--r--icons/other/raon.pngbin0 -> 310 bytes
-rw-r--r--icons/other/splash.pngbin0 -> 44991 bytes
-rw-r--r--icons/other/timer2_updown.pngbin0 -> 25219 bytes
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-rwxr-xr-xinstall.sh102
-rwxr-xr-xlib/X.tcl10648
-rwxr-xr-xlib/bottompanel/bottomnotebook.tcl469
-rwxr-xr-xlib/bottompanel/calculator.tcl2071
-rwxr-xr-xlib/bottompanel/cvarsview.tcl1303
-rwxr-xr-xlib/bottompanel/find_in_files.tcl750
-rwxr-xr-xlib/bottompanel/graph.tcl714
-rwxr-xr-xlib/bottompanel/graph_wdg.tcl1115
-rwxr-xr-xlib/bottompanel/messages.tcl632
-rwxr-xr-xlib/bottompanel/terminal.tcl135
-rwxr-xr-xlib/bottompanel/todo.tcl1496
-rwxr-xr-xlib/cli.tcl725
-rwxr-xr-xlib/compiler/assembler.tcl595
-rwxr-xr-xlib/compiler/codelisting.tcl1169
-rwxr-xr-xlib/compiler/compiler.tcl557
-rwxr-xr-xlib/compiler/compilerconsts.tcl873
-rwxr-xr-xlib/compiler/disassembler.tcl664
-rwxr-xr-xlib/compiler/external_compiler.tcl1076
-rwxr-xr-xlib/compiler/preprocessor.tcl5184
-rwxr-xr-xlib/configdialogs/compiler_config.tcl1875
-rwxr-xr-xlib/configdialogs/configdialogs.tcl51
-rwxr-xr-xlib/configdialogs/custom_commands_config.tcl418
-rwxr-xr-xlib/configdialogs/editor_config.tcl2148
-rwxr-xr-xlib/configdialogs/global_config.tcl318
-rwxr-xr-xlib/configdialogs/rightpanel_config.tcl498
-rwxr-xr-xlib/configdialogs/shortcuts_config.tcl1015
-rwxr-xr-xlib/configdialogs/simulator_config.tcl423
-rwxr-xr-xlib/configdialogs/terminal_config.tcl374
-rwxr-xr-xlib/configdialogs/toolbar_config.tcl706
-rwxr-xr-xlib/custom_command.tcl98
-rwxr-xr-xlib/dialogs/errorhandler.tcl172
-rwxr-xr-xlib/dialogs/fsd.tcl2775
-rwxr-xr-xlib/dialogs/my_tk_messageBox.tcl283
-rwxr-xr-xlib/dialogs/selectmcu.tcl1537
-rwxr-xr-xlib/dialogs/tips.tcl375
-rwxr-xr-xlib/editor/ASMsyntaxhighlight.tcl1675
-rwxr-xr-xlib/editor/Csyntaxhighlight.tcl853
-rwxr-xr-xlib/editor/LSTsyntaxhighlight.tcl443
-rwxr-xr-xlib/editor/R_ASMsyntaxhighlight.tcl1232
-rwxr-xr-xlib/editor/autocompletion.tcl838
-rwxr-xr-xlib/editor/commandline.tcl1275
-rwxr-xr-xlib/editor/editor.tcl2786
-rwxr-xr-xlib/editor/eventhandlers.tcl781
-rwxr-xr-xlib/editor/exports.tcl486
-rwxr-xr-xlib/editor/generalproc.tcl2288
-rwxr-xr-xlib/environment.tcl3184
-rwxr-xr-xlib/external_command.tcl143
-rwxr-xr-xlib/leftpanel/filelist.tcl4824
-rwxr-xr-xlib/leftpanel/fsbrowser.tcl1164
-rwxr-xr-xlib/leftpanel/sfrwatches.tcl620
-rwxr-xr-xlib/lib/Math.tcl954
-rwxr-xr-xlib/lib/hexeditor.tcl2705
-rwxr-xr-xlib/lib/ihextools.tcl523
-rwxr-xr-xlib/lib/innerwindow.tcl360
-rwxr-xr-xlib/lib/settings.tcl293
-rwxr-xr-xlib/main.tcl699
-rwxr-xr-xlib/maintab.tcl425
-rwxr-xr-xlib/pale/leddisplay.tcl707
-rwxr-xr-xlib/pale/ledmatrix.tcl982
-rwxr-xr-xlib/pale/ledpanel.tcl543
-rwxr-xr-xlib/pale/matrixkeypad.tcl889
-rwxr-xr-xlib/pale/multiplexedleddisplay.tcl1179
-rwxr-xr-xlib/pale/pale.tcl991
-rwxr-xr-xlib/pale/simplekeypad.tcl670
-rwxr-xr-xlib/pale/virtual_hw_component.tcl423
-rwxr-xr-xlib/project.tcl868
-rwxr-xr-xlib/rightpanel/hwmanager.tcl419
-rwxr-xr-xlib/rightpanel/instructiondetails.tcl1755
-rwxr-xr-xlib/rightpanel/regwatches.tcl2120
-rwxr-xr-xlib/rightpanel/rightpanel.tcl2273
-rwxr-xr-xlib/rightpanel/subprograms.tcl704
-rwxr-xr-xlib/simulator/bitmap.tcl510
-rwxr-xr-xlib/simulator/engine/engine_auxiliary_alo_functions.tcl171
-rwxr-xr-xlib/simulator/engine/engine_backward_stepping.tcl126
-rwxr-xr-xlib/simulator/engine/engine_control.tcl759
-rwxr-xr-xlib/simulator/engine/engine_core.tcl274
-rwxr-xr-xlib/simulator/engine/engine_external_interface_management.tcl1115
-rwxr-xr-xlib/simulator/engine/engine_hibernation.tcl205
-rwxr-xr-xlib/simulator/engine/engine_initialization_cleanup.tcl340
-rwxr-xr-xlib/simulator/engine/engine_instructions.tcl1596
-rwxr-xr-xlib/simulator/engine/engine_mcu_configuration.tcl555
-rwxr-xr-xlib/simulator/engine/engine_memory_management.tcl387
-rwxr-xr-xlib/simulator/engine/engine_opcodes.tcl435
-rwxr-xr-xlib/simulator/engine/engine_virtual_hw_controller.tcl1413
-rwxr-xr-xlib/simulator/hibernate.tcl1051
-rwxr-xr-xlib/simulator/interruptmonitor.tcl1246
-rwxr-xr-xlib/simulator/sfrmap.tcl523
-rwxr-xr-xlib/simulator/simulator.tcl1202
-rwxr-xr-xlib/simulator/simulator_gui.tcl3986
-rwxr-xr-xlib/simulator/stackmonitor.tcl519
-rwxr-xr-xlib/simulator/stopwatch.tcl702
-rwxr-xr-xlib/simulator/virtual_uart_term.tcl646
-rwxr-xr-xlib/utilities/asciichart.tcl752
-rwxr-xr-xlib/utilities/baseconvertor.tcl912
-rwxr-xr-xlib/utilities/eightsegment.tcl509
-rwxr-xr-xlib/utilities/hexeditdlg.tcl1793
-rwxr-xr-xlib/utilities/notes.tcl896
-rwxr-xr-xlib/utilities/rs232debugger.tcl1460
-rwxr-xr-xlib/utilities/speccalc.tcl2390
-rwxr-xr-xlib/utilities/symbol_viewer.tcl837
-rwxr-xr-xmake-launcher59
-rw-r--r--mcu8051ide.desktop21
-rw-r--r--mcu8051ide.pngbin0 -> 1941 bytes
-rwxr-xr-xtest-lib.sh41
-rw-r--r--translations/README1
601 files changed, 132491 insertions, 0 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 0000000..c8e16d6
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,117 @@
+PROJECT(mcu8051ide)
+
+#
+# INITIALIZE
+#
+
+CMAKE_MINIMUM_REQUIRED(VERSION 2.4.2)
+SET(CMAKE_BUILD_TYPE None)
+SET(CMAKE_COLOR_MAKEFILE ON)
+SET(CMAKE_VERBOSE_MAKEFILE ON)
+SET(CMAKE_INCLUDE_CURRENT_DIR TRUE)
+
+# target directory (for data files)
+SET(target_installation_directory /usr/share/mcu8051ide)
+
+#
+# CONFIGURE
+#
+
+MESSAGE("Check for Tcl Interpreter")
+FIND_PACKAGE(TCL)
+IF(NOT TCL_FOUND)
+ MESSAGE("!!! TCL interpreter not found !!!")
+ENDIF(NOT TCL_FOUND)
+
+FOREACH(library
+ "BWidget 1.8"
+ "Itcl 3.4"
+ "Tcl 8.5"
+ "md5 2.0"
+ "Tk 8.5"
+ "img::png 1.3"
+ "tdom 0.8"
+ "Tclx 8.4"
+)
+ STRING(REGEX REPLACE "\t+.*$" "" library_name ${library})
+ MESSAGE("Check for ${library_name}")
+
+ EXECUTE_PROCESS(
+ COMMAND "./test-lib.sh ${library}"
+ RESULT_VARIABLE library_found
+ )
+
+ IF(NOT library_found)
+ MESSAGE(FATAL_ERROR "Unable to find library: ${library}")
+ ENDIF(NOT library_found)
+
+ENDFOREACH(library)
+
+
+#
+# BUILD
+#
+
+# create launcher
+FILE(WRITE mcu8051ide
+ "#!/bin/sh\n"
+ "exec tclsh ${target_installation_directory}/lib/main.tcl \"$@\"\n"
+)
+
+#
+# INSTALL
+#
+
+# Install icons
+FOREACH(subdir mcu other 16x16 22x22 32x32)
+ FILE(GLOB_RECURSE icons icons/${subdir}/*.png)
+ INSTALL(FILES ${icons} DESTINATION ${target_installation_directory}/icons/${subdir})
+ENDFOREACH(subdir)
+
+# Install source code files
+FOREACH(subdir . bottompanel compiler configdialogs dialogs editor leftpanel lib pale rightpanel simulator simulator/engine utilities)
+ FILE(GLOB lib lib/${subdir}/*.tcl)
+ INSTALL(FILES ${lib} DESTINATION ${target_installation_directory}/lib/${subdir})
+ENDFOREACH(subdir)
+
+# Install documentation files
+FOREACH(subdir handbook)
+ FILE(GLOB doc doc/${subdir}/*)
+ INSTALL(FILES ${doc} DESTINATION ${target_installation_directory}/doc/${subdir})
+ENDFOREACH(subdir)
+
+# Install manual page(s)
+FILE(GLOB man doc/man/*)
+INSTALL(FILES ${man} DESTINATION /usr/share/man/man1)
+
+# Install demonstration project files
+FILE(GLOB demo demo/*)
+INSTALL(FILES ${demo} DESTINATION ${target_installation_directory}/demo)
+
+# Install data files
+FILE(GLOB data data/*)
+INSTALL(FILES ${data} DESTINATION ${target_installation_directory}/data)
+
+# Install translation files
+FILE(GLOB translations translations/*)
+INSTALL(FILES ${translations} DESTINATION ${target_installation_directory}/translations)
+
+# Incstall .desktop spec and application icon
+INSTALL(FILES mcu8051ide.png DESTINATION /usr/share/pixmaps/)
+INSTALL(FILES mcu8051ide.desktop DESTINATION /usr/share/applications/)
+
+# Install launcher
+INSTALL(
+ FILES mcu8051ide
+ DESTINATION /usr/bin
+ PERMISSIONS
+ WORLD_EXECUTE WORLD_READ
+ OWNER_WRITE OWNER_READ OWNER_EXECUTE
+ GROUP_EXECUTE GROUP_READ
+)
+
+# Install misc. files
+INSTALL(
+ FILES ChangeLog LICENSE TODO
+ DESTINATION ${target_installation_directory}
+)
diff --git a/ChangeLog b/ChangeLog
new file mode 100644
index 0000000..0138273
--- /dev/null
+++ b/ChangeLog
@@ -0,0 +1,198 @@
+Change log for MCU 8051 IDE
+
+1.3.7 -> 1.3.7
+ * Bug fixes
+
+1.3.5 -> 1.3.6
+ * Bug fixes
+
+1.3.4 -> 1.3.5
+ * Bug fixes
+
+1.3.3 -> 1.3.4
+ * "Modernized" GUI
+ * Bug fixes
+
+1.3.1 -> 1.3.3
+ * Bug fixes
+
+1.3.1 -> 1.3.2
+ * Bug fixes
+
+1.3 -> 1.3.1
+ * Dependency on TclX is now only optional
+ * Important chage !: Native assembler now expands macro instructions before doing conditional assembly and before defining constants and variables ! Control sequence $NOMACROSFIRST can be used to change this behavior to the state of previous versions.
+ * Added support for AS31 assembler
+ * Added files notepad
+ * Improved instruction help panel
+ * Native assembler was extended to support these directives: "IFN IFDEF IFNDEF BYTE FLAG REPT TIMES" and these constrol sequences: "$NOXR $NOXREF $XR $XREF $NOSB $SB $RESTORE $RS $SA $SAVE $PHILIPS $NOPI $PI $NOTABS $NOMOD51 $NOBUILTIN $NOMO $MO $MOD51 $NOMACRO $NOMR $LI $NOLI $GENONLY $GO $NOGEN $NOGE $GEN $GE $ $EJ $NODB $NODEBUG $DB $DEBUG $CONDONLY $NOCOND $COND $TT $PW $PL $MR $MACRO $INC $WARNING $ERROR $DA $NOMACROSFIRST"
+ * Added stack monitor
+ * Various bug fixes
+
+1.2 -> 1.3
+ * New dependency: TclX (tested with v8.4)
+ * Added RS232/UART debugger
+ * A few changes in assembler
+ * Bug fixes (Thanks to Miroslav Hradílek for many useful bug reports)
+
+1.1.1 -> 1.2
+ * Bug fixes
+ * Added tab bar
+
+1.1 -> 1.1.1
+ * Added "Special calculator"
+ * Added "Base convertor"
+ * Many tiny improvements
+
+1.0.9 -> 1.1
+ * Added support for new MCUs from Intel®: 8031, 8751, 8032, 8752, 80C31, 87C51, 80C52, 87C52, 80C32, 80C54, 87C54, 80C58, 87C58
+ * Added support for simulationg virtual hardware
+ * Improved simulator (Implemented UART (experimental support), improved support for timers, etc.)
+ * Improved register watches
+ * Improved editor (improved autocompletion and many other things)
+ * Improved panel "Instruction details"
+ * Improved 8-segment editor
+ * Bug fixes in assembler, disassembler and simulator engine
+ * Some other bug fixes
+ * Added utility "Scrible notepad"
+ * Improved graph panel
+
+1.0.7 -> 1.0.9
+ * Added support for C language
+ * Added map of bit addressable area
+
+1.0.6 -> 1.0.7
+ * Added Stopwatch
+ * Improved code editor
+ * Some bug fixes
+
+1.0.5 -> 1.0.6
+ * Fixed critical bug in Assembler v1.0.5 (related to peerhole optimalizations)
+ * Added 8 segment LED display editor
+ * Added ASCII chart
+ * Added Assembly symbol table viewer
+
+1.0 -> 1.0.5
+ * Added support for external assemblers ("ASEM-51" and "ASL")
+ * Added support for external editors ("emacs", "gvim", "kwrite" and "gedit")
+ * Added support for embedded editors ("emacs", "vim", "nano", "dav" and "le")
+ * Added embedded terminal emulator (rxvt-unicode)
+ * Added function "File statistics"
+ * Improved assembler
+ * Added syntaxt highlight for code listing (*.lst)
+ * Added search bars for "Messages" and "Todo"
+ * Removed dependency on "tcl-thread" and "tclxml"
+ * Added dependency on "TkImg" and "tdom"
+ * Improved hexeditor
+ * Improved simulator (especialy simulation across multiple files)
+ * Added panel "Find in files"
+ * Modified GUI
+ * New error handling dialog
+ * Some bug fixes (especialy critical bug in disassembler and a few bugs in assembler)
+ * All images are now in PNG (Portable Network Graphics) (Reguires TkImg)
+ * Some more improvements
+
+0.9.5 -> 1.0
+ * MANY BUG FIXES ! (including critical)
+ * Added support for some new MCUs (
+ AT89S52, AT89LS51, AT89LS52, AT89S8253, AT89S2051, AT89S4051,
+ T87C5101, T83C5101, T83C5102, TS80C32X2, TS80C52X2, TS87C52X2,
+ AT80C32X2, AT80C52X2, AT87C52X2, AT80C54X2, AT80C58X2, AT87C54X2,
+ AT87C58X2, TS80C54X2, TS80C58X2, TS87C54X2, TS87C58X2, TS80C31X2,
+ AT80C31X2
+ )
+ * Added supprort for peerhole optimalizations
+ * Faster project opening
+ * Added interrupt monitor
+ * Added subprograms monitor
+ * Added SFR map
+ * Added SFR watches
+ * Extended command line interface
+ * Compiler now checks for valid memory addressing (new CLI options --iram-size, --eram-size, --xram-size, --code-size)
+ * Added program hibernation capability
+ * Added editor commands hibernate, resume, switch-mcu, set-xcode and set-xdata
+ * Added desktop file and application icon
+ * Some more improvements
+
+0.9.1 -> 0.9.5
+ * Implemented support for 80C51, 8052, AT89C2051, AT89C4051, AT89C51, AT89C51RC, AT89C52, AT89C55WD, AT89LV51, AT89LV52 and AT89LV55
+ * Simulator can now step back
+ * Added popup-based completion for editor
+ * Added tooltips for bits in simulator control panel
+ * Added simulator configuration dialog
+ * Added autosave function
+ * Manual page
+ * Added support for multiview (editor can be now splitted verticaly or horizontaly)
+ * Many bug fixes (in compiler, editor, file selection dialog, syntax highlight, simulator, etc.)
+ * Some minor improvements (graph, disassembler, etc.)
+ * Thread extension is no longer required to run this program (but custom commands will won't work without it)
+
+0.9.0 -> 0.9.1
+ * New hexadecimal editor
+ * New file selection dialog
+ * Added filesystem browser tab on left panel
+ * Added tips on startup
+ * Added editor command line
+ * Improved editor configuration dialog
+ * A few bug fixes
+ * Removed dependency on IWidgets and Tix
+ * Some minor improvements
+
+0.8.7 -> 0.9.0
+ * Implemented graph
+ * Many bug fixes (GUI, compiler, memory leaks)
+ * Editable shortcuts
+ * Bookmarks for opened and project files
+ * Search panels in left and right panel
+ * Modified GUI (checkboxes, radio buttons ...)
+ * Support for various encodings and EOLs
+ * Added "Tools" -> "Change letter case", "Normalize HEX" and "SIM -> BIN"
+ * Added editor functions "Lowercase", "Uppercase" and "Capitalize"
+ * Added helpwindows for opened and project files and opened projects
+ * Added popup menus for entry and text widgets (globaly)
+ * Fixed problem with fonts (bad sizes)
+ * Implemented support for line wrapping (experimental)
+ * Added new command line options (see `mcu8051ide --help')
+ * More status tips and tool tips
+ * Added welcome dialog
+ * Added demonstration project
+ * Cleaner, faster and safer compiler
+ * Some more minor improvements
+
+0.8.5 -> 0.8.7
+ * Implemented code validation
+ * Added tab "Instruction details" (on the right panel)
+ * Added Clean Up dialog
+ * Added Right Panel configuration dialog
+ * Added Toolbar configuration dialog
+ * Added support for custom commands
+ * Fixed some bugs (in GUI)
+ * Fixed many memory leaks
+ * Cleaner code
+
+0.8.4 -> 0.8.5
+ * Fixed many bugs in GUI
+ * Improved editor
+ * Extended calculator
+ * Redesigned editor config dialog
+ * Added functions "Tools -> Reformat code" and "Tools -> Sim2Hex"
+ * Extended CLI (--reset-user-settings, --config-file, --compile, --hex2bin ...)
+
+0.8.1 -> 0.8.4
+ * Fixed many bugs ... (including critical)
+ * Added compiler configuration dialog
+ * Added calculator timers preset
+ * Added dialog about
+ * Added support for exporting highlighted source code to LaTeX source
+ * Added many ToolTips
+ * Added StatusBar tips
+ * Added splash screen
+ * Added support for command line options
+ * All images are now *.XPM (X PixMap) (require Tix package)
+ * Changed instalation procedure
+
+0.8.0 -> 0.8.1
+ * Fixed some bugs in compiler (not critical)
+ * Fixed bug in todo list (saving text as SGML)
+ * Fixed bug in project management
+ * Added popup menu to todo list
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..bb68321
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,341 @@
+
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+ 675 Mass Ave, Cambridge, MA 02139, USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundations software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
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+These restrictions translate to certain responsibilities for you if you
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+
+ For example, if you distribute copies of such a program, whether
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+
+ Also, for each authors protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
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+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
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+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
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+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
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+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Programs
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
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+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
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+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
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+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
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+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
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+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
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+ a) Accompany it with the complete corresponding machine-readable
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+ years, to give any third party, for a charge no more than your
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+ 4. You may not copy, modify, sublicense, or distribute the Program
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+
+ 5. You are not required to accept this License, since you have not
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+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
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+ 6. Each time you redistribute the Program (or any work based on the
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+infringement or for any other reason (not limited to patent issues),
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+refrain entirely from distribution of the Program.
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+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
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+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
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+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
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+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
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+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
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+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ Appendix: How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the programs name and a brief idea of what it does.>
+ Copyright (C) 19yy <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) 19yy name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c for details.
+
+The hypothetical commands `show w and `show c should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w and `show c; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Library General
+Public License instead of this License.
+
diff --git a/MicrosoftWindows_compatibility/external_command.bat b/MicrosoftWindows_compatibility/external_command.bat
new file mode 100644
index 0000000..934e804
--- /dev/null
+++ b/MicrosoftWindows_compatibility/external_command.bat
@@ -0,0 +1 @@
+@tclsh85.exe %1 %2 %3 %4 %5 %6 %7 %8 %9 \ No newline at end of file
diff --git a/MicrosoftWindows_compatibility/mcu8051ide.ico b/MicrosoftWindows_compatibility/mcu8051ide.ico
new file mode 100644
index 0000000..c068526
--- /dev/null
+++ b/MicrosoftWindows_compatibility/mcu8051ide.ico
Binary files differ
diff --git a/MicrosoftWindows_compatibility/mcu8051ide_win_setup.iss b/MicrosoftWindows_compatibility/mcu8051ide_win_setup.iss
new file mode 100644
index 0000000..3ad777b
--- /dev/null
+++ b/MicrosoftWindows_compatibility/mcu8051ide_win_setup.iss
@@ -0,0 +1,66 @@
+; Script generated by the Inno Setup Script Wizard.
+; SEE THE DOCUMENTATION FOR DETAILS ON CREATING INNO SETUP SCRIPT FILES!
+
+[Setup]
+; NOTE: The value of AppId uniquely identifies this application.
+; Do not use the same AppId value in installers for other applications.
+; (To generate a new GUID, click Tools | Generate GUID inside the IDE.)
+AppId={{E0D2EFF2-AF92-403C-88F6-6188F369D6BB}
+AppName=MCU 8051 IDE
+AppVerName=MCU 8051 IDE 1.3.6
+AppPublisher=Martin Omera
+AppPublisherURL=http://mcu8051ide.sf.net/
+AppSupportURL=http://mcu8051ide.sf.net/
+AppUpdatesURL=http://mcu8051ide.sf.net/
+DefaultDirName={pf}\MCU 8051 IDE
+DefaultGroupName=MCU 8051 IDE
+AllowNoIcons=yes
+LicenseFile=W:\mcu8051ide\LICENSE
+OutputDir=W:\
+OutputBaseFilename=mcu8051ide-1.3.6-setup
+Compression=lzma
+SolidCompression=yes
+SetupIconFile="W:\mcu8051ide\MicrosoftWindows_compatibility\mcu8051ide.ico"
+WizardImageFile=compiler:WIZMODERNIMAGE-IS.BMP
+
+[Languages]
+Name: "english"; MessagesFile: "compiler:Default.isl"
+
+[Tasks]
+Name: "desktopicon"; Description: "{cm:CreateDesktopIcon}"; GroupDescription: "{cm:AdditionalIcons}"; Flags: unchecked
+Name: "quicklaunchicon"; Description: "{cm:CreateQuickLaunchIcon}"; GroupDescription: "{cm:AdditionalIcons}"; Flags: unchecked; OnlyBelowVersion: 0,6.1
+
+[Files]
+Source: "W:\mcu8051ide\lib\*.tcl"; DestDir: "{app}\lib"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\bottompanel\*.tcl"; DestDir: "{app}\lib\bottompanel"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\compiler\*.tcl"; DestDir: "{app}\lib\compiler"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\configdialogs\*.tcl"; DestDir: "{app}\lib\configdialogs"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\dialogs\*.tcl"; DestDir: "{app}\lib\dialogs"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\editor\*.tcl"; DestDir: "{app}\lib\editor"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\leftpanel\*.tcl"; DestDir: "{app}\lib\leftpanel"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\lib\*.tcl"; DestDir: "{app}\lib\lib"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\pale\*.tcl"; DestDir: "{app}\lib\pale"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\rightpanel\*.tcl"; DestDir: "{app}\lib\rightpanel"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\simulator\*.tcl"; DestDir: "{app}\lib\simulator"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\simulator\engine\*.tcl"; DestDir: "{app}\lib\simulator\engine"; Flags: ignoreversion
+Source: "W:\mcu8051ide\lib\utilities\*.tcl"; DestDir: "{app}\lib\utilities"; Flags: ignoreversion
+Source: "W:\mcu8051ide\icons\16x16\*.png"; DestDir: "{app}\icons\16x16"; Flags: ignoreversion
+Source: "W:\mcu8051ide\icons\22x22\*.png"; DestDir: "{app}\icons\22x22"; Flags: ignoreversion
+Source: "W:\mcu8051ide\icons\32x32\*.png"; DestDir: "{app}\icons\32x32"; Flags: ignoreversion
+Source: "W:\mcu8051ide\icons\mcu\*.png"; DestDir: "{app}\icons\mcu"; Flags: ignoreversion
+Source: "W:\mcu8051ide\icons\other\*.png"; DestDir: "{app}\icons\other"; Flags: ignoreversion
+Source: "W:\mcu8051ide\data\*"; DestDir: "{app}\data"; Flags: ignoreversion
+Source: "W:\mcu8051ide\demo\*"; DestDir: "{app}\demo"; Flags: ignoreversion
+Source: "W:\mcu8051ide\translations\*"; DestDir: "{app}\translations"; Flags: ignoreversion
+Source: "W:\mcu8051ide\MicrosoftWindows_compatibility\mcu8051ide.ico"; DestDir: "{app}"; Flags: ignoreversion
+Source: "W:\mcu8051ide\MicrosoftWindows_compatibility\*.bat"; DestDir: "{app}\lib"; Flags: ignoreversion
+; NOTE: Don't use "Flags: ignoreversion" on any shared system files
+
+[Icons]
+Name: "{group}\MCU 8051 IDE"; Filename: "{app}\lib\main.tcl"; IconFilename: "{app}\mcu8051ide.ico"
+Name: "{commondesktop}\MCU 8051 IDE"; Filename: "{app}\lib\main.tcl"; Tasks: desktopicon; IconFilename: "{app}\mcu8051ide.ico"
+Name: "{userappdata}\Microsoft\Internet Explorer\Quick Launch\MCU 8051 IDE"; Filename: "{app}\lib\main.tcl"; Tasks: quicklaunchicon; IconFilename: "{app}\mcu8051ide.ico"
+
+[Run]
+Filename: "{app}\lib\main.tcl"; Description: "{cm:LaunchProgram,MCU 8051 IDE}"; Flags: shellexec postinstall skipifsilent
+
diff --git a/MicrosoftWindows_compatibility/sdcc.bat b/MicrosoftWindows_compatibility/sdcc.bat
new file mode 100644
index 0000000..ffe50ee
--- /dev/null
+++ b/MicrosoftWindows_compatibility/sdcc.bat
@@ -0,0 +1,2 @@
+@cd %1
+@sdcc --iram-size %2 --xram-size %3 --code-size %4 --nooverlay --noinduction --verbose --debug -V --std-sdcc89 --model-small --pack-iram %5 \ No newline at end of file
diff --git a/README b/README
new file mode 100644
index 0000000..c002f60
--- /dev/null
+++ b/README
@@ -0,0 +1,87 @@
+MCU 8051 IDE v1.3.0
+
+DESCRIPTION:
+-------------
+
+Integrated development enviromet for MCS-51 based processors.
+Written in Tcl/Tk, for POSIX Systems (GNU/Linux etc.)
+
+
+
+INSTALLATION:
+--------------
+
+At first make sure than you have all dependencies installed and install the missing ones.
+(http://mcu8051ide.sourceforge.net/dependencies)
+
+1) INSTALL DEPENDENCIES
+
+ -----------------------------------------------------------------------------------------------------
+ Package min. Version Where it's avaible
+ -----------------------------------------------------------------------------------------------------
+ REQUIRED PACKAGES: (Without these packages this program WILL NOT run)
+ tcl 8.5 http://www.tcl.tk/software/tcltk/downloadnow84.html
+ tk 8.5 http://www.tcl.tk/software/tcltk/downloadnow84.html
+ bwidget 1.8 http://sourceforge.net/projects/tcllib
+ itcl 3.4 http://sourceforge.net/projects/incrtcl
+ tdom 0.8 http://www.tdom.org
+ tkimg 1.3 http://sourceforge.net/projects/tkimg
+ tcllib 1.6 http://sourceforge.net/projects/tcllib
+ Tclx 8.4 http://tclx.sourceforge.net
+ -----------------------------------------------------------------------------------------------------
+ OPTIONAL PACKAGES: (Without these packages some features will not be avaliable)
+ cmake 2.4.3 http://www.cmake.org/HTML/Download.html
+ (If you want to install it using "./configure && make && make install")
+ rxvt-unicode 8.3 http://software.schmorp.de/
+ asem-51 1.3 http://plit.de/asem-51/download.htm
+ asl (I don't know. My e-mail is <martin.osmera@mail.com>)
+ vim http://www.vim.org/download.php
+ emacs http://www.gnu.org/software/emacs/
+ nano http://www.nano-editor.org/
+ le http://www.gnu.org/directory/text/editors/le-editor.html
+ -----------------------------------------------------------------------------------------------------
+
+ NOTE:
+ If you had any problems with installation of any of these packages
+ please mention it at http://mcu8051ide.sourceforge.net/dependencies .
+
+2) INSTALL MCU 8051 IDE
+ You can install this program in two ways:
+
+ A) The recomended one (CMake)
+ ./configure
+ make
+ # here you must be root
+ make install
+
+ B) (Bash script)
+ ./install.sh
+
+ Tip:
+ You can check if all needed libraries are properly installed by this command:
+ mcu8051ide --check-libraries
+ If you are upgrading from some previous version and the program won't run, try this:
+ mcu8051ide --reset-user-settings --ignore-last-session
+
+3) If you failed installing this software, plese let me know at the project web page.
+
+
+PROBLEMS & SUGESTIONS:
+-----------------------
+
+ Project web page:
+ http://mcu8051ide.sf.net
+
+ E-mail to the author:
+ martin.osmera@gmail.cz (Only English or Czech please)
+
+
+BUGS:
+------
+ Currently I don't know about any bug.
+ If you find some bug, plese let me know <martin.osmera@gmail.cz>.
+
+NOTE:
+-----
+ You can help me make installation easier by making installation package for your OS.
+ Thank your for trying/using MCU 8051 IDE.
diff --git a/TODO b/TODO
new file mode 100644
index 0000000..7fb5b90
--- /dev/null
+++ b/TODO
@@ -0,0 +1,5 @@
+TODO list for MCU 8051 IDE
+
+ (I don't know ...)
+
+Comments and suggestions: http://mcu8051ide.sf.net or martin.osmera@gmail.com
diff --git a/clear_all.sh b/clear_all.sh
new file mode 100755
index 0000000..26b85a7
--- /dev/null
+++ b/clear_all.sh
@@ -0,0 +1,11 @@
+#! /bin/bash
+
+for i in *~ */*~ */*/*~ */*/*/*~; do
+ rm -fv $i
+done
+
+rm -fv CMakeCache.txt
+rm -fv cmake_install.cmake
+rm -fv Makefile
+rm -fv mcu8051ide
+rm -rfv CMakeFiles
diff --git a/configure b/configure
new file mode 100755
index 0000000..11fd4f8
--- /dev/null
+++ b/configure
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+if [ ! -z "$@" ]; then
+ printf "\nThis is not real configure script.\n"
+ printf "This script only calls 'cmake .'\n"
+ printf "All options are ignored.\n"
+fi
+cmake .
diff --git a/data/licence.txt b/data/licence.txt
new file mode 100644
index 0000000..6904999
--- /dev/null
+++ b/data/licence.txt
@@ -0,0 +1,341 @@
+
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+ 675 Mass Ave, Cambridge, MA 02139, USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundations software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each authors protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors reputations.
+
+ Finally, any free program is threatened constantly by software
+patents. We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyones free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Programs
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable. However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ Appendix: How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the programs name and a brief idea of what it does.>
+ Copyright (C) 19yy <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) 19yy name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c for details.
+
+The hypothetical commands `show w and `show c should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w and `show c; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Library General
+Public License instead of this License.
+
diff --git a/data/m5ihib.dtd b/data/m5ihib.dtd
new file mode 100644
index 0000000..7140578
--- /dev/null
+++ b/data/m5ihib.dtd
@@ -0,0 +1,103 @@
+<!-- ROOT ELEMENT -->
+<!ELEMENT m5ihib (currentstate, subprograms, stepback)>
+<!-- Root element Parameters:
+ version - File version
+ datetime - Date and time of creation
+ source_file - Souce code compiled and loaded in simulator before hibernation
+ processor - Processor type
+ xdata - Size of External data memory
+ eeprom - Size of data EEPROM
+ md5 - MD5 hash of the source code file
+-->
+<!ATTLIST m5ihib
+ version CDATA #REQUIRED
+ datetime CDATA #REQUIRED
+ source_file CDATA #REQUIRED
+ processor CDATA #REQUIRED
+ xdata CDATA #REQUIRED
+ eeprom CDATA #REQUIRED
+ md5 CDATA #REQUIRED
+>
+
+
+<!-- Current state of MCU -->
+<!ELEMENT currentstate (iram, eram, xram, eeprom, sfr, special)>
+
+<!-- Internal data memory in decimal -->
+<!ELEMENT iram (#PCDATA)>
+
+<!-- Expanded data memory in decimal -->
+<!ELEMENT eram (#PCDATA)>
+
+<!-- External data memory in decimal -->
+<!ELEMENT xram (#PCDATA)>
+
+<!-- Data EEPROM in decimal -->
+<!ELEMENT eeprom (#PCDATA)>
+
+<!-- Special function registers -->
+<!ELEMENT sfr (addresses, values)>
+
+<!-- SFR decimal addresses in the same order as in tag values -->
+<!ELEMENT addresses (#PCDATA)>
+
+<!-- SFR decimal values in the same order as in tag values -->
+<!ELEMENT values (#PCDATA)>
+
+<!-- Special engine variables -->
+<!ELEMENT special (#PCDATA)>
+
+
+<!-- Content of list of active interrupts -->
+<!ELEMENT subprograms (sub)*>
+<!-- Parameters of tag "subprograms":
+ count - Number of recorded subprograms
+-->
+<!ATTLIST subprograms
+ count CDATA #REQUIRED
+>
+
+<!-- Active interrupt -->
+<!ELEMENT sub EMPTY>
+<!-- Parameters of tag "sub":
+ source - Source address
+ target - Target address
+ type - Type
+-->
+<!ATTLIST sub
+ source CDATA #REQUIRED
+ target CDATA #REQUIRED
+ type CDATA #REQUIRED
+>
+
+
+<!-- Stack for stepback function (backward stepping) -->
+<!ELEMENT stepback (step)*>
+<!-- Parameters of tag "stepback":
+ stacklength - Number of recorded program steps
+-->
+<!ATTLIST stepback
+ stacklength CDATA #REQUIRED
+>
+
+<!-- One program step -->
+<!ELEMENT step (spec, normal)>
+
+<!-- Special engine variables -->
+<!ELEMENT spec (#PCDATA)>
+
+<!-- Ordinary registers -->
+<!ELEMENT normal (reg)*>
+
+<!-- One register -->
+<!ELEMENT reg EMPTY>
+<!-- Parameters of tag "reg":
+ type - Memory type (E == ERAM; I == IDATA; X == XDATA; S == SFR)
+ addr - Register address
+ val - Previous register value
+-->
+<!ATTLIST reg
+ type CDATA #REQUIRED
+ addr CDATA #REQUIRED
+ val CDATA #REQUIRED
+>
diff --git a/data/mcus.xml b/data/mcus.xml
new file mode 100644
index 0000000..3c75a4a
--- /dev/null
+++ b/data/mcus.xml
@@ -0,0 +1,1968 @@
+<?xml version='1.0' encoding='utf-8'?>
+<!DOCTYPE mcus [
+ <!-- Root element -->
+ <!ELEMENT mcus (mcu)*>
+ <!--
+ lastupdate - Date of the last update of this file (format: %D, e.g. 11/18/07)
+ -->
+ <!ATTLIST mcus
+ lastupdate CDATA #IMPLIED
+ >
+
+ <!-- MCU definition tag -->
+ <!ELEMENT mcu (timers, more, bits, writeonly, sfr)>
+
+ <!-- Detailed specification of MCU parameters (all of them must not be an empty string)
+ vendor - Vendor name
+ name - Processor type
+ xdata - External data memory connectable
+ xcode - External program memoryconnectable
+ code - Capacity of internal program memory in kilo bytes (not bytes !)
+ frequency - Operating oscilator frequency (e.g "0 to 24 MHz")
+ ram - Capacity of internal data memory in bytes
+ portbits - Number of IO lines
+ uart - UART avaliable
+ interrupts - Number of interrupts
+ voltage - Oprating voltage (e.g "2.7 to 5.5 V")
+ timer2 - Timer 2 avaliable
+ watchdog - Watchdog timer avaliable
+ eram - Size of ERAM (0 means no eram avaliable) (> 0 requires intelpe="no")
+ dualdtpr - Dual Data Pointer (includes register AUXR1 if wdtcon="no")
+ auxr - Register AUXR
+ t2mod - Register T2MOD
+ portN - Implemented bits for port N (N < 6) (empty list means port is not implemented)
+ 0 - Bit not implemented
+ 1 - Bit implemented
+ e.g. port0="11110011" means:
+ P0.0 - implemented
+ P0.1 - implemented
+ P0.2 - implemented
+ P0.3 - implemented
+ P0.4 - not implemented
+ P0.5 - not implemented
+ P0.6 - implemented
+ P0.7 - implemented
+ pof - Power Off Flag implemented
+ gf0 - PCON.3 (General purpose flag) implemented
+ gf1 - PCON.4 (General purpose flag) implemented
+ pd - Power Down flag implemented
+ idl - IDLe mode flag implemented
+ smod0 - PCON.6 (SMOD0) implemented (requires uart="yes")
+ iph - IPH register implemented
+ acomparator - Analog comparator
+ euart - Extended UART (registers SADDR and SADEN)
+ clkreg - Register CLKREG implemented
+ pwdex - Bit PWDEX (CLKREG.1) implemented (requires clkreg="yes")
+ spi - SPI controller implemented
+ wdtcon - Register WDTCON implemented (removes AUXR.WDIDLE and AUXR.DISRTO) (requires watchdog="yes")
+ eeprom - Size of internal data EEPROM in bytes
+ intelpe - Register Intel_Pwd_Exit (AUXR.1) implemented (requires eram="0")
+ pwm - Pulse with modulation controller implemented (PCON.PWMEN)
+ x2reset - Is CLKREG.X2 untouched by reset (requires clkreg="yes" or ckcon="yes")
+ ckcon - SFR 0x8F is CKCON instead of CLKREG (requires clkreg="no")
+ auxr1gf3 - Bit GF3 in AUXR1 present
+ ao - Use AUXR.AO instead of AUXR.DISALE (requires auxr="yes")
+ wdtprg - WDTPRG (T4 T3 T2 T1 T0 S2 S1 S0) 0xA7 (requires watchdog="yes")
+ hddptr - Hidden Dual Data PoiTeR (That means than there is no DP0L, DP0H and DP1L, DP1H) (requires dualdtpr="yes")
+ auxrwdidle - Bit WDIDLE in register AUXR (requires auxr="yes")
+ auxrdisrto - Bit DISRTO in register AUXR (requires auxr="yes")
+ -->
+ <!ATTLIST mcu
+ vendor CDATA #REQUIRED
+ name NMTOKEN #REQUIRED
+ xdata (yes|no) #REQUIRED
+ xcode (yes|no) #REQUIRED
+ code CDATA #REQUIRED
+ frequency CDATA #REQUIRED
+ ram CDATA #REQUIRED
+ portbits CDATA #REQUIRED
+ uart (yes|no) #REQUIRED
+ interrupts CDATA #REQUIRED
+ voltage CDATA #REQUIRED
+ timer2 (yes|no) #REQUIRED
+ watchdog (yes|no) #REQUIRED
+ eram CDATA #REQUIRED
+ dualdtpr (yes|no) #REQUIRED
+ auxr (yes|no) #REQUIRED
+ t2mod (yes|no) #REQUIRED
+ port0 CDATA #REQUIRED
+ port1 CDATA #REQUIRED
+ port2 CDATA #REQUIRED
+ port3 CDATA #REQUIRED
+ port4 CDATA #REQUIRED
+ pof (yes|no) #REQUIRED
+ gf0 (yes|no) #REQUIRED
+ gf1 (yes|no) #REQUIRED
+ pd (yes|no) #REQUIRED
+ idl (yes|no) #REQUIRED
+ smod0 (yes|no) #REQUIRED
+ iph (yes|no) #REQUIRED
+ acomparator (yes|no) #REQUIRED
+ euart (yes|no) #REQUIRED
+ clkreg (yes|no) #REQUIRED
+ pwdex (yes|no) #REQUIRED
+ spi (yes|no) #REQUIRED
+ wdtcon (yes|no) #REQUIRED
+ eeprom CDATA #REQUIRED
+ intelpe (yes|no) #REQUIRED
+ pwm (yes|no) #REQUIRED
+ x2reset (yes|no) #REQUIRED
+ ckcon (yes|no) #REQUIRED
+ auxr1gf3 (yes|no) #REQUIRED
+ ao (yes|no) #REQUIRED
+ wdtprg (yes|no) #REQUIRED
+ hddptr (yes|no) #REQUIRED
+ auxrwdidle (yes|no) #REQUIRED
+ auxrdisrto (yes|no) #REQUIRED
+ >
+
+ <!-- Details about timers/counters (for slection dialog only) -->
+ <!ELEMENT timers (#PCDATA)>
+
+ <!-- More informations about uC (for slection dialog only) -->
+ <!ELEMENT more (#PCDATA)>
+
+ <!-- Map of implemented SFR bits (register not mentionded here have mask "FF")
+ AAMM AAMM ...
+ | |
+ | +- Mask (2 hex digits, 1 == implemented; 0 == not implemented (WRITE ONLY) )
+ +- Address (2 hex digits)
+ -->
+ <!ELEMENT bits (#PCDATA)>
+
+ <!-- Hexadecimal addresses of write only registers (e.g. AF 85 4B) -->
+ <!ELEMENT writeonly (#PCDATA)>
+
+ <!-- List of SFR and SFB which are avaliable on the choosen MCU
+ Implicit SFR and SFB:
+ B ACC A TMOD TH0 TH1 SP DPL DPH PCON
+ TL0 TL1 AB
+
+ PSW C CY AC F0 RS1 RS0 OV P
+ IE EA ET1 EX1 ET0 EX0
+ IP PT1 PX1 PT0 PX0
+ TCON TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
+ -->
+ <!ELEMENT sfr (#PCDATA)>
+]>
+<mcus lastupdate="02/10/09">
+ <mcu
+ vendor="Intel" name="8051"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="8031"
+ xdata="yes" xcode="yes"
+ code="0" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="8751"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C51"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C31"
+ xdata="yes" xcode="yes"
+ code="0" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="87C51"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="8052"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ RCAP2L RCAP2H TL2 TH2
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="8032"
+ xdata="yes" xcode="yes"
+ code="0" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ RCAP2L RCAP2H TL2 TH2
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="8752"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="no"
+ gf1="no" pd="no"
+ idl="no" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ RCAP2L RCAP2H TL2 TH2
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="87C52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C32"
+ xdata="yes" xcode="yes"
+ code="0" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C54"
+ xdata="yes" xcode="yes"
+ code="16" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="87C54"
+ xdata="yes" xcode="yes"
+ code="16" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="80C58"
+ xdata="yes" xcode="yes"
+ code="32" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Intel" name="87C58"
+ xdata="yes" xcode="yes"
+ code="32" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage=" " timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Timer 2
+ — CaptureTimer/Counter
+ — Up/Down Timer/Counter
+ — Baud Rate Generator
+ Full-Duplex Programma Serial Interface with
+ — Framing Error Detection
+ — Automatic Address Recognition
+ 6 InterruptSources
+ Enhanced Power Down Mode
+ Power Off Flag
+ ONCE Mode
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ SADEN SADDR RCAP2L RCAP2H TL2 TH2 T2MOD IPH FE
+
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C2051"
+ xdata="no" xcode="no"
+ code="2" frequency="0 to 24 MHz"
+ ram="128" portbits="15"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 6 V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0=""
+ port1="11111111" port2=""
+ port3="11111101" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Direct LED Drive Outputs
+ On-chip Analog Comparator
+ Low-power Idle and Power-down Modes
+ Two-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P1 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C4051"
+ xdata="no" xcode="no"
+ code="4" frequency="0 to 24 MHz"
+ ram="128" portbits="15"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 6 V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0=""
+ port1="11111111" port2=""
+ port3="11111101" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Direct LED Drive Outputs
+ On-chip Analog Comparator
+ Low-power Idle and Power-down Modes
+ Two-level Program Memory Lock
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P1 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C51"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 24 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="max. 6.6 V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ 878F B81F A89F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C51RC"
+ xdata="yes" xcode="yes"
+ code="32" frequency="0 to 33 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="4 to 5.5 V" timer2="yes"
+ watchdog="yes" eram="256"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="yes" auxrdisrto="yes">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Hardware Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ </more><bits>
+ C903 B83F A8BF A201 8E1B 878F
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD AUXR AUXR1 WDTRST RCAP2L RCAP2H TL2 TH2
+ DP0H DP0L DP1H DP1L
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 24 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="max. 6.6 V" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD RCAP2L RCAP2H TL2 TH2
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89C55WD"
+ xdata="yes" xcode="yes"
+ code="20" frequency="0 to 33 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="4 to 5.5 V" timer2="yes"
+ watchdog="yes" eram="256"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="yes" auxrdisrto="yes">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Hardware Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ </more><bits>
+ C903 B83F A8BF A201
+ 8E1B 878F
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD AUXR AUXR1 WDTRST RCAP2L RCAP2H TL2 TH2
+ DP0H DP0L DP1H DP1L
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89LV51"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 12 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 6 V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-Level Program Memory Lock
+ Low Power Idle and Power Down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89LV52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="2.7 to 6" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-Level Program Memory Lock
+ Low Power Idle and Power Down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2 T2MOD
+ RCAP2L RCAP2H TL2 TH2
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89LV55"
+ xdata="yes" xcode="yes"
+ code="20" frequency="0 to 12 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="2.7 to 6" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ </more><bits>
+ C903 B83F A8BF 878F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD RCAP2L RCAP2H TL2 TH2
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89S52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 33 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="4 to 5.5 V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="yes" auxrdisrto="yes">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ Fast Programming Time
+ Flexible ISP Programming (Byte and Page Mode)
+ </more><bits>
+ C903 B83F A8BF A201 8E19 878F
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD AUXR AUXR1 WDTRST RCAP2L RCAP2H TL2 TH2
+ DP0H DP0L DP1H DP1L
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89LS51"
+ xdata="yes" xcode="yes"
+ code="4" frequency="0 to 16 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 4" timer2="no"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="yes" auxrdisrto="yes">
+ <timers>Two 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ Flexible ISP Programming (Byte and Page Mode)
+ </more><bits>
+ B83F A8BF A201 8E19 878F
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS
+ DP0H DP0L DP1H DP1L AUXR AUXR1 WDTRST
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89LS52"
+ xdata="yes" xcode="yes"
+ code="8" frequency="0 to 16 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="8"
+ voltage="2.7 to 4" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="no" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="no"
+ iph="no" acomparator="no"
+ euart="no" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="yes" auxrdisrto="yes">
+ <timers>Three 16-bit</timers>
+ <more>
+ Three-level Program Memory Lock
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ Flexible ISP Programming (Byte and Page Modes)
+ </more><bits>
+ C903 B83F A8BF A201 8E19 878F
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD AUXR AUXR1 WDTRST RCAP2L RCAP2H TL2 TH2
+ DP0H DP0L DP1H DP1L
+ SCON SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89S2051"
+ xdata="no" xcode="no"
+ code="2" frequency="0 to 24 MHz"
+ ram="256" portbits="15"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0=""
+ port1="11111111" port2=""
+ port3="11111101" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="yes"
+ euart="yes" clkreg="yes"
+ pwdex="yes" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="yes"
+ x2reset="yes" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Two-level Program Memory Lock
+ Direct LED Drive Outputs
+ On-chip Analog Comparator with Selectable Interrupt
+ 8-bit PWM (Pulse-width Modulation)
+ Low Power Idle and Power-down Modes
+ Brownout Reset
+ Enhanced UART Serial Port with Framing Error Detection and Automatic
+ Address Recognition
+ Internal Power-on Reset
+ Interrupt Recovery from Power-down Mode
+ Programmable and Fuseable x2 Clock Option
+ Four-level Enhanced Interrupt Controller
+ Power-off Flag
+ Flexible Programming (Byte and Page Modes)
+ User Serviceable Signature Page (32 Bytes)
+ </more><bits>
+ 8F03 971F A8DF B75F B85F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P1 P3 IPH ACSR CLKREG SADEN SADDR SBUF
+ EC PC ES PS FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89S4051"
+ xdata="no" xcode="no"
+ code="4" frequency="0 to 24 MHz"
+ ram="256" portbits="15"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="no" auxr="no"
+ t2mod="no" port0=""
+ port1="11111111" port2=""
+ port3="11111101" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="yes"
+ euart="yes" clkreg="yes"
+ pwdex="yes" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="yes"
+ x2reset="yes" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ Two-level Program Memory Lock
+ Direct LED Drive Outputs
+ On-chip Analog Comparator with Selectable Interrupt
+ 8-bit PWM (Pulse-width Modulation)
+ Low Power Idle and Power-down Modes
+ Brownout Reset
+ Enhanced UART Serial Port with Framing Error Detection and Automatic
+ Address Recognition
+ Internal Power-on Reset
+ Interrupt Recovery from Power-down Mode
+ Programmable and Fuseable x2 Clock Option
+ Four-level Enhanced Interrupt Controller
+ Power-off Flag
+ Flexible Programming (Byte and Page Modes)
+ User Serviceable Signature Page (32 Bytes)
+ </more><bits>
+ 8F03 971F A8DF B75F B85F
+ </bits><writeonly>
+ </writeonly><sfr>
+ P1 P3 IPH ACSR CLKREG SADEN SADDR SBUF
+ EC PC ES PS FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="AT89S8253"
+ xdata="yes" xcode="yes"
+ code="12" frequency="0 to 24 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="9"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="yes"
+ pwdex="no" spi="yes"
+ wdtcon="yes" eeprom="2048"
+ intelpe="yes" pwm="no"
+ x2reset="no" ckcon="no"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="no"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ 2K Bytes EEPROM Data Memory
+ 64-byte User Signature Array
+ Three-level Program Memory Lock
+ Enhanced UART Serial Port with Framing Error Detection and Automatic Address Recognition
+ Enhanced SPI (Double Write/Read Buffered) Serial Interface
+ Low-power Idle and Power-down Modes
+ Interrupt Recovery from Power-down Mode
+ Programmable Watchdog Timer
+ Dual Data Pointer
+ Power-off Flag
+ Flexible ISP Programming (Byte and Page Modes)
+ Four-level Enhanced Interrupt Controller
+ Programmable and Fuseable x2 Clock Option
+ Internal Power-on Reset
+ 42-pin PDIP Package Option for Reduced EMC Emission
+ </more><bits>
+ 87DF 8E01 8F01 963F AAE3 B73F C903
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD IPH SADEN SADDR SPSD AUXR WDTRST EECON SPCR
+ SPSR WDTCON CLKREG RCAP2L RCAP2H TL2 TH2 SPDR FE
+ DP0H DP0L DP1H DP1L
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="T87C5101"
+ xdata="no" xcode="no"
+ code="16" frequency="0 to 66 MHz"
+ ram="256" portbits="16"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="256"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0=""
+ port1="11111111" port2=""
+ port3="11111100" port4="00000011"
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: EEPROM
+ High-speed Architecture
+ Dual Data Pointer
+ On-chip eXpanded RAM (256 bytes)
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4-Level Priority Interrupt System
+ Full-duplex Enhanced UART
+ Low EMI (no ALE)
+ Idle Mode
+ Power-down Mode
+ </more><bits>
+ C903 C03F B83F B73F A8BF A209 8E03 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2 DP0H DP0L DP1H DP1L
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="T83C5101"
+ xdata="no" xcode="no"
+ code="8" frequency="0 to 66 MHz"
+ ram="256" portbits="16"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="256"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0=""
+ port1="11111111" port2=""
+ port3="11111100" port4="00000011"
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: ROM
+ High-speed Architecture
+ Dual Data Pointer
+ On-chip eXpanded RAM (256 bytes)
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4-Level Priority Interrupt System
+ Full-duplex Enhanced UART
+ Low EMI (no ALE)
+ Idle Mode
+ Power-down Mode
+ </more><bits>
+ C903 C03F B83F B73F A8BF A209 8E03 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="T83C5102"
+ xdata="no" xcode="no"
+ code="8" frequency="0 to 66 MHz"
+ ram="256" portbits="16"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="256"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0=""
+ port1="11111111" port2=""
+ port3="11111100" port4="00000011"
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: ROM
+ High-speed Architecture
+ Dual Data Pointer
+ On-chip eXpanded RAM (256 bytes)
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4-Level Priority Interrupt System
+ Full-duplex Enhanced UART
+ Low EMI (no ALE)
+ Idle Mode
+ Power-down Mode
+ </more><bits>
+ C903 C03F B83F B73F A8BF A209 8E03 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="80C32X2"
+ xdata="yes" xcode="yes"
+ code="0" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ ROMLess
+ High-speed Architecture
+ X2 Speed Improvement Capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4 Level Priority Interrupt System
+ Full Duplex Enhanced UART
+ Low EMI (Inhibit ALE)
+ Idle Mode
+ Power-down Mode
+ Power-off Flag
+ Once Mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 8E01 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="80C52X2"
+ xdata="yes" xcode="yes"
+ code="8" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: ROM
+ High-speed Architecture
+ X2 Speed Improvement Capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4 Level Priority Interrupt System
+ Full Duplex Enhanced UART
+ Low EMI (Inhibit ALE)
+ Idle Mode
+ Power-down Mode
+ Power-off Flag
+ Once Mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 8E01 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="87C52X2"
+ xdata="yes" xcode="yes"
+ code="8" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="no" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: OTP
+ High-speed Architecture
+ X2 Speed Improvement Capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Asynchronous Port Reset
+ 4 Level Priority Interrupt System
+ Full Duplex Enhanced UART
+ Low EMI (Inhibit ALE)
+ Idle Mode
+ Power-down Mode
+ Power-off Flag
+ Once Mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 8E01 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON FE
+ RCAP2L RCAP2H TL2 TH2
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="80C31X2"
+ xdata="yes" xcode="yes"
+ code="0" frequency="20 - 40 MHz"
+ ram="128" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="no"
+ watchdog="no" eram="0"
+ dualdtpr="yes" auxr="no"
+ t2mod="no" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="no" ao="no"
+ wdtprg="no" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Two 16-bit</timers>
+ <more>
+ ROMLess
+ High-Speed Architecture
+ X2 Speed Improvement capability
+ Dual Data Pointer
+ Asynchronous port reset
+ 4 priority level interrupt system
+ Full duplex Enhanced UART
+ Framing error detection
+ Automatic address recognition
+ Idle mode
+ Power-down mode
+ Power-off Flag
+ Once mode (On-chip Emulation)
+ </more><bits>
+ B81F B71F A89F A201 8E01 8F01 87DF
+ </bits><writeonly>
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS FE
+ SADEN SADDR AUXR1 IPH CKCON
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="80C54X2"
+ xdata="yes" xcode="yes"
+ code="16" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="yes" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: ROM
+ High-Speed Architecture
+ X2 Speed Improvement capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Hardware Watchdog Timer
+ Asynchronous port reset
+ 4 level priority interrupt system
+ Full duplex Enhanced UART
+ Framing error detection
+ Automatic address recognition
+ Low EMI (inhibit ALE)
+ Idle mode
+ Power-down mode
+ Power-off Flag
+ Once mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 A707 8E01 8F01 87DF
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON WDTPRG WDTRST
+ RCAP2L RCAP2H TL2 TH2 FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="80C58X2"
+ xdata="yes" xcode="yes"
+ code="32" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="yes" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: ROM
+ High-Speed Architecture
+ X2 Speed Improvement capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Hardware Watchdog Timer
+ Asynchronous port reset
+ 4 level priority interrupt system
+ Full duplex Enhanced UART
+ Framing error detection
+ Automatic address recognition
+ Low EMI (inhibit ALE)
+ Idle mode
+ Power-down mode
+ Power-off Flag
+ Once mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 A707 8E01 8F01 87DF
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON WDTPRG WDTRST
+ RCAP2L RCAP2H TL2 TH2 FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="87C54X2"
+ xdata="yes" xcode="yes"
+ code="16" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="yes" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: EPROM
+ High-Speed Architecture
+ X2 Speed Improvement capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Hardware Watchdog Timer
+ Asynchronous port reset
+ 4 level priority interrupt system
+ Full duplex Enhanced UART
+ Framing error detection
+ Automatic address recognition
+ Low EMI (inhibit ALE)
+ Idle mode
+ Power-down mode
+ Power-off Flag
+ Once mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 A707 8E01 8F01 87DF
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON WDTPRG WDTRST
+ RCAP2L RCAP2H TL2 TH2 FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu><mcu
+ vendor="Atmel" name="87C58X2"
+ xdata="yes" xcode="yes"
+ code="32" frequency="20 - 60 MHz"
+ ram="256" portbits="32"
+ uart="yes" interrupts="6"
+ voltage="2.7 to 5.5V" timer2="yes"
+ watchdog="yes" eram="0"
+ dualdtpr="yes" auxr="yes"
+ t2mod="yes" port0="11111111"
+ port1="11111111" port2="11111111"
+ port3="11111111" port4=""
+ pof="yes" gf0="yes"
+ gf1="yes" pd="yes"
+ idl="yes" smod0="yes"
+ iph="yes" acomparator="no"
+ euart="yes" clkreg="no"
+ pwdex="no" spi="no"
+ wdtcon="no" eeprom="0"
+ intelpe="no" pwm="no"
+ x2reset="no" ckcon="yes"
+ auxr1gf3="yes" ao="yes"
+ wdtprg="yes" hddptr="yes"
+ auxrwdidle="no" auxrdisrto="no">
+ <timers>Three 16-bit</timers>
+ <more>
+ Program memory: EPROM
+ High-Speed Architecture
+ X2 Speed Improvement capability
+ Dual Data Pointer
+ Programmable Clock Out and Up/Down Timer/Counter 2
+ Hardware Watchdog Timer
+ Asynchronous port reset
+ 4 level priority interrupt system
+ Full duplex Enhanced UART
+ Framing error detection
+ Automatic address recognition
+ Low EMI (inhibit ALE)
+ Idle mode
+ Power-down mode
+ Power-off Flag
+ Once mode (On-chip Emulation)
+ </more><bits>
+ C903 B83F B73F A8BF A209 A707 8E01 8F01 87DF
+ </bits><writeonly>
+ A6
+ </writeonly><sfr>
+ P0 P1 P2 P3 SBUF ES PS ET2 PT2
+ T2MOD SADEN SADDR AUXR AUXR1 IPH CKCON WDTPRG WDTRST
+ RCAP2L RCAP2H TL2 TH2 FE
+ SCON FE SM0 SM1 SM2 REN TB8 RB8 TI RI
+ T2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 CT2 CPRL2
+ </sfr>
+ </mcu>
+</mcus>
diff --git a/data/project.dtd b/data/project.dtd
new file mode 100644
index 0000000..8663e17
--- /dev/null
+++ b/data/project.dtd
@@ -0,0 +1,220 @@
+<!-- Declare entities -->
+<!ENTITY quot "&#34;">
+<!ENTITY amp "&#38;">
+<!ENTITY lt "&#60;">
+<!ENTITY gt "&#62;">
+
+<!-- ROOT ELEMENT -->
+<!ELEMENT tk_mcuide_project (general, other_options, compiler_options, files)>
+<!-- Root element Parameters:
+ version - Project version (user defined)
+ date - Project last update (user defined)
+ creator_ver - MCU 8051 IDE version (hardcoded in program)
+-->
+<!ATTLIST tk_mcuide_project
+ version CDATA #IMPLIED
+ date CDATA #IMPLIED
+ creator_ver CDATA #IMPLIED
+>
+
+<!-- General information about the project -->
+<!ELEMENT general (authors, copyright, licence, processor, options, graph, description, todo, calculator)>
+
+<!-- List of project authors, one name per line -->
+<!ELEMENT authors (#PCDATA)>
+
+<!-- Copyrigh information -->
+<!ELEMENT copyright (#PCDATA)>
+
+<!-- Project licence -->
+<!ELEMENT licence (#PCDATA)>
+
+<!-- Processor type and configuration -->
+<!ELEMENT processor EMPTY>
+
+<!-- Parameters of tag "processor":
+ type - Processor type (e.g. AT89C51RC or 80C51)
+ clock - Clock frequency in kHz
+ xdata - Size of connected XDATA memory (0 means disconnected)
+ xcode - Size of connected XCODE memory (0 means disconnected)
+-->
+<!ATTLIST processor
+ type CDATA #IMPLIED
+ clock CDATA #IMPLIED
+ xdata CDATA #IMPLIED
+ xcode CDATA #IMPLIED
+>
+
+<!-- Various project options -->
+<!ELEMENT options EMPTY>
+
+<!-- Parameters of tag "options":
+ watches_file - Relative or absolute path to definition file of register watches
+ scheme - Relative or absolute path to scheme file
+ main_file - Main project source code file (e.g. main.c)
+ auto_sw_enabled - Automatic file switching during simulation locked
+-->
+<!ATTLIST options
+ watches_file CDATA #IMPLIED
+ scheme CDATA #IMPLIED
+ main_file CDATA #IMPLIED
+ auto_sw_enabled (0|1) #IMPLIED
+>
+
+<!-- Ports graph definition -->
+<!ELEMENT graph EMPTY>
+
+<!-- Parameters of tag "graph":
+ grid - Grid mode
+ magnification - Magnification level (must be an integer between 0 and 3)
+ enabled - Graph enable flag (Boolean value 0 or 1)
+ marks_s - List of state graph marks (String of zeros and ones, e.g. 00100110)
+ marks_l - List of laches graph marks (String of zeros and ones, e.g. 00100110)
+ marks_o - List of output graph marks (String of zeros and ones, e.g. 00100110)
+ active_page - Active page
+-->
+<!ATTLIST graph
+ grid (n|b|x|y) #IMPLIED
+ magnification (0|1|2|3) #IMPLIED
+ enabled (0|1) #IMPLIED
+ marks_s CDATA #IMPLIED
+ marks_l CDATA #IMPLIED
+ marks_o CDATA #IMPLIED
+ active_page CDATA #IMPLIED
+>
+
+<!-- Project description text (plain text only) -->
+<!ELEMENT description (#PCDATA)>
+
+<!-- Project to do list (SGML format) -->
+<!ELEMENT todo (#PCDATA)>
+
+<!-- Calculator configuration -->
+<!ELEMENT calculator EMPTY>
+
+<!-- Parameters of tag "calculator":
+ radix - Radix (one of {Dec Hex Bin Oct})
+ angle_unit - Angle unit (one of {deg rad grad})
+ display0 - Primary display
+ display1 - Opereator display
+ display2 - Secondary display
+ memory0 - Content of memory bank 0
+ memory1 - Content of memory bank 1
+ memory2 - Content of memory bank 2
+ freq - Timers preset calculator: Frequency
+ time - Timers preset calculator: Desired time
+ mode - Timers preset calculator: Timer mode (one of {0 1 2})
+-->
+<!ATTLIST calculator
+ radix (Dec|Hex|Bin|Oct) #IMPLIED
+ angle_unit (deg|rad|grad) #IMPLIED
+ display0 CDATA #IMPLIED
+ display1 CDATA #IMPLIED
+ display2 CDATA #IMPLIED
+ memory0 CDATA #IMPLIED
+ memory1 CDATA #IMPLIED
+ memory2 CDATA #IMPLIED
+ freq CDATA #IMPLIED
+ time CDATA #IMPLIED
+ mode (0|1|2) #IMPLIED
+>
+
+<!-- Other options (it can contain anything) -->
+<!ELEMENT other_options (#PCDATA)>
+
+<!-- Compiler options -->
+<!ELEMENT compiler_options (#PCDATA)>
+
+<!-- Project files -->
+<!ELEMENT files (file)*>
+
+<!-- Parameters of tag "files":
+ count - Number of project files
+ current_file - Current file in left/top view
+ current_file2 - Current file in right/bottom view (if it's less than zero then editor won't be splitted)
+ pwin_sash - Position of paned window sash (has meaning only if editor was splitted)
+ selected_view - Active view; 0 == left/top, 1 == right/bottom
+ pwin_orient - Orientation of paned window for multiview (one of {horizontal vertical})
+-->
+<!ATTLIST files
+ count CDATA #IMPLIED
+ current_file CDATA #IMPLIED
+ current_file2 CDATA #IMPLIED
+ pwin_sash CDATA #IMPLIED
+ selected_view (0|1) #IMPLIED
+ pwin_orient (horizontal|vertical) #IMPLIED
+>
+
+<!-- Project file description -->
+<!ELEMENT file (actual_line, md5_hash, path, bookmarks, breakpoints, eol, encoding, notes)>
+
+<!-- Parameters of tag "file":
+ name - File name without path
+ active - "yes" == opended; "no" == closed
+ o_bookmark - Bookmark in list of opened files
+ p_bookmark - Bookmark in list of project files
+ file_index - File index in the list
+ read_only - Read only flag
+ highlight - Syntax highlight
+-->
+<!ATTLIST file
+ name CDATA #IMPLIED
+ active (yes|no) #IMPLIED
+ o_bookmark (1|0) #IMPLIED
+ p_bookmark (1|0) #IMPLIED
+ file_index CDATA #IMPLIED
+ read_only (1|0) #IMPLIED
+ highlight CDATA #IMPLIED
+>
+
+<!-- Current line -->
+<!ELEMENT actual_line EMPTY>
+
+<!-- Parameters of tag "actual_line":
+ value - Current line in the file
+-->
+<!ATTLIST actual_line
+ value CDATA #IMPLIED
+>
+
+<!-- MD5 hash for the file -->
+<!ELEMENT md5_hash EMPTY>
+
+<!-- Parameters of tag "md5_hash":
+ value - Last MD5 hash
+-->
+<!ATTLIST md5_hash
+ value CDATA #IMPLIED
+>
+
+<!-- File path -->
+<!ELEMENT path (#PCDATA)>
+
+<!-- Bookmarks: string of zeros and ones -->
+<!ELEMENT bookmarks (#PCDATA)>
+
+<!-- Breakpoints: string of zeros and ones -->
+<!ELEMENT breakpoints (#PCDATA)>
+
+<!-- End Of Line character name -->
+<!ELEMENT eol EMPTY>
+
+<!-- Parameters of tag "eol":
+ value - EOL character (lf == "Line feed" 0x0A; cr == "Carriage return" 0x0D)
+-->
+<!ATTLIST eol
+ value (lf|cr|crlf) #IMPLIED
+>
+
+<!-- File encoding (we strongly recomend to use utf-8 only) -->
+<!ELEMENT encoding EMPTY>
+
+<!-- File notes -->
+<!ELEMENT notes (#PCDATA)>
+
+<!-- Parameters of tag "encoding":
+ value - Name of choosen encoding
+-->
+<!ATTLIST encoding
+ value CDATA #IMPLIED
+> \ No newline at end of file
diff --git a/data/tips.xml b/data/tips.xml
new file mode 100644
index 0000000..3fca882
--- /dev/null
+++ b/data/tips.xml
@@ -0,0 +1,191 @@
+<?xml version='1.0' encoding='utf-8'?>
+<!DOCTYPE tips [
+ <!-- ROOT ELEMENT -->
+ <!ELEMENT tips (tip)*>
+
+ <!-- Tip text (Text must be in CDATA section)
+ <b>Bold text</b> normal text
+ -->
+ <!ELEMENT tip EMPTY>
+
+ <!-- Parameters for tag "tip":
+ lang - Text language
+ -->
+ <!ATTLIST tip
+ lang CDATA #REQUIRED
+ >
+]>
+<tips>
+ <tip lang="en">
+ <![CDATA[
+ You can cycle through all opened documents by pressing <b>Alt+Left</b> or <b>Alt+Right</b>. The next/previous document will immediately be displayed in the active frame.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Graph (tab "IO Ports") significantly slows down MCU simulation ! It is a good to keep it off unless you need it.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can repeat your last search by just pressing <b>F3</b>, or <b>Shift+F3</b> if you want to search backwards.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can swap the characters on each side of the cursor just by pressing <b>Ctrl+T</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can configure syntax highlighting in <b>Editor configuration dialog</b>.
+ <b>Configure</b> -> <b>Editor Configuration</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can easily switch between tabs on Bottom and Right panel.
+ <b>Ctrl+1</b> -> <b>Simulator</b> (Bottom panel)
+ <b>Ctrl+2</b> -> <b>Graph</b> (Bottom panel)
+ <b>Ctrl+3</b> -> <b>Messages</b> (Bottom panel)
+ <b>Ctrl+4</b> -> <b>Todo</b> (Bottom panel)
+ <b>Ctrl+5</b> -> <b>Calculator</b> (Bottom panel)
+ <b>Ctrl+6</b> -> <b>Graph</b> (Bottom panel)
+ <b>Ctrl+7</b> -> <b>Bookmarks</b> (Right panel)
+ <b>Ctrl+8</b> -> <b>Breakpoints</b> (Right panel)
+ <b>Ctrl+9</b> -> <b>Register watches</b> (Right panel)
+ <b>Ctrl+0</b> -> <b>Instruction</b> (Right panel)
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Sometimes you can make your work easier with editor command line. Inkove it by <b>F10</b> and type <b>help list</b> to get list of avaliable commands.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Use <b>quick search bars</b>. For instance you need to find a file in list of opened file. Write the name of that file to entrybox below the list and it's done.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Burn your MSC51 manual (or better colleague's manual). Tab <b>"Instruction details"</b> (<b>Ctrl+0</b>) in the right panel gives you a list of all possible operands for instruction on current line in the editor.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can use function <b>Auto-indent</b> to make badly formated code more readable.
+
+ main: mov A, #55h
+ mov R0,#20h
+ movx @R0, A
+ sjmp main
+ <b>Tools</b> -> <b>Auto indent</b>
+ main: mov A, #55h
+ mov R0, #20h
+ movx @R0, A
+ sjmp main
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Almost all shortcuts can be redefined in <b>Shortcuts configuration</b> dialog
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can edit content of external data memory and program memory with embedded hexadecimal editor. <b>Simulator</b> -> <b>Show ... memory</b>. So you can write programs directly in machine code (but is's better to use compiler).
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can quickly open files using <b>Filesystem browser</b> on left panel.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ This program have also supprot for command line interaface (CLI). Run <b>mcu8051ide --help</b> to get list of possible options.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Sometimes you might need to run an external program (e.g program uploader). In MCU 8051 IDE it can be accomplished by <b>Custom commands</b> ( <b>Configure</b> -> <b>Custom commands</b> ).
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can export current document (assembly language source) as XHTML-1.1 or LaTeX.
+ <b>Tools</b> -> <b>Export as ...</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can convert between Intel® HEX 8 and binary files.
+ <b>Tools</b> -> <b>... -> ...</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Right panel provides list of bookmarks and breakpoints defined in the editor.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can use various encodings and EOLs (End Of Line).
+ <b>Tools</b> -> <b>Encoding/EOL</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ <b>Register watches</b> can make your work much easier. You can find them in the Right panel. Enter hexadecimal address of register which you want to watch to entry box with label "Addr" and press Enter. (1 or 2 hexadecimal digits means <b>IDATA</b> and 3 or 4 digits means <b>XDATA</b>)
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can discuss this project at <b>http://mcu8051ide.sourceforge.net</b>.
+
+ If you do find a bug, please report it either via <b>http://sourceforge.net/tracker/?func=add&group_id=185864&atid=914981</b> or via mail <b>martin.osmera@gmail.com</b>.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can customize compiler behavior in <b>Compiler config</b> dialog.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can enable/disable <b>popup-based completion</b> in editor configuration dialog.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can significantly improve simulator speed by:
+ <b>1)</b> Disabling <b>Step back function</b>
+ <b>2)</b> Disabling <b>Graph</b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Editor can be splitted vertical or horizontal. It Right click on editor status bar and choose split.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can step your program back, default key shortcut is: <b>Ctrl+F7</b>. Behavior of this capability can be modified in simulator configuration dialog.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ MCU 8051 IDE can "hibernate" running program into a file. Later you can resume the hibernated program excatly from the same point where it was hibernated.
+ <b>Simulator</b> -> <b> Hibernate program </b>
+ <b>Simulator</b> -> <b> Resume hibernated program </b>
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ You can navigate simulator to certain line in your source code. Press <b>Ctrl+G</b> in simulator mode and choose line. Simulator will set PC (Program Counter) to address in program memory coresponding to your choosen line.
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ MCU 8051 IDE assembler can perform certain code optimalizations. They are enabled by default but you can disable the in compiler configuration dialog.
+
+ More about optimalizations:
+ LJMP code11 --> AJMP code11
+ LJMP code8 --> SJMP code11
+ LJMP code8 --> SJMP code8
+ AJMP code8 --> SJMP code8
+ LCALL code11 --> ACALL code11
+ MOV 224d, ... --> MOV A, ...
+ MOV ..., 224d --> MOV ..., A
+ SETB 215 --> SETB C
+ CLR 215 --> CLR C
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ Sometimes it is not easy to track subprograms and interrupts invocations. In this IDE you can track them quite easily usining "Interrupt monitor" (<b>Simulator -> Interrupt Monitor</b>) and "List of subprograms" (<b>Ctrl+0</b>).
+ ]]>
+ </tip><tip lang="en">
+ <![CDATA[
+ <b>Map of SFR</b> (<b>Simulator -> Map of SFR</b>) can provide you a transparent view of all special function registers avaliable on your choosen MCU.
+ ]]>
+ </tip>
+<!--
+ <tip lang="en">
+ <![CDATA[
+ ]]>
+ </tip>
+-->
+</tips>
diff --git a/demo/Demo project.mcu8051ide b/demo/Demo project.mcu8051ide
new file mode 100644
index 0000000..21f2ef6
--- /dev/null
+++ b/demo/Demo project.mcu8051ide
@@ -0,0 +1,441 @@
+<?xml version='1.0' encoding='utf-8'?>
+<!DOCTYPE tk_mcuide_project [
+
+ <!-- Declare entities -->
+ <!ENTITY quot "&#34;">
+ <!ENTITY amp "&#38;">
+ <!ENTITY lt "&#60;">
+ <!ENTITY gt "&#62;">
+
+ <!-- ROOT ELEMENT -->
+ <!ELEMENT tk_mcuide_project (general, other_options, compiler_options, files)>
+ <!-- Root element Parameters:
+ version - Project version (user defined)
+ date - Project last update (user defined)
+ creator_ver - MCU 8051 IDE version (hardcoded in program)
+ -->
+ <!ATTLIST tk_mcuide_project
+ version CDATA #IMPLIED
+ date CDATA #IMPLIED
+ creator_ver CDATA #IMPLIED
+ >
+
+ <!-- General information about the project -->
+ <!ELEMENT general (authors, copyright, licence, processor, options, graph, description, todo, calculator)>
+
+ <!-- List of project authors, one name per line -->
+ <!ELEMENT authors (#PCDATA)>
+
+ <!-- Copyrigh information -->
+ <!ELEMENT copyright (#PCDATA)>
+
+ <!-- Project licence -->
+ <!ELEMENT licence (#PCDATA)>
+
+ <!-- Processor type and configuration -->
+ <!ELEMENT processor EMPTY>
+
+ <!-- Parameters of tag "processor":
+ type - Processor type (e.g. AT89C51RC or 80C51)
+ clock - Clock frequency in kHz
+ xdata - Size of connected XDATA memory (0 means disconnected)
+ xcode - Size of connected XCODE memory (0 means disconnected)
+ -->
+ <!ATTLIST processor
+ type CDATA #IMPLIED
+ clock CDATA #IMPLIED
+ xdata CDATA #IMPLIED
+ xcode CDATA #IMPLIED
+ >
+
+ <!-- Various project options -->
+ <!ELEMENT options EMPTY>
+
+ <!-- Parameters of tag "options":
+ watches_file - Relative or absolute path to definition file of register watches
+ scheme - Relative or absolute path to scheme file
+ main_file - Main project source code file (e.g. main.c)
+ auto_sw_enabled - Automatic file switching during simulation locked
+ -->
+ <!ATTLIST options
+ watches_file CDATA #IMPLIED
+ scheme CDATA #IMPLIED
+ main_file CDATA #IMPLIED
+ auto_sw_enabled (0|1) #IMPLIED
+ >
+
+ <!-- Ports graph definition -->
+ <!ELEMENT graph EMPTY>
+
+ <!-- Parameters of tag "graph":
+ grid - Grid mode
+ magnification - Magnification level (must be an integer between 0 and 3)
+ enabled - Graph enable flag (Boolean value 0 or 1)
+ marks_s - List of state graph marks (String of zeros and ones, e.g. 00100110)
+ marks_l - List of laches graph marks (String of zeros and ones, e.g. 00100110)
+ marks_o - List of output graph marks (String of zeros and ones, e.g. 00100110)
+ active_page - Active page
+ -->
+ <!ATTLIST graph
+ grid (n|b|x|y) #IMPLIED
+ magnification (0|1|2|3) #IMPLIED
+ enabled (0|1) #IMPLIED
+ marks_s CDATA #IMPLIED
+ marks_l CDATA #IMPLIED
+ marks_o CDATA #IMPLIED
+ active_page CDATA #IMPLIED
+ >
+
+ <!-- Project description text (plain text only) -->
+ <!ELEMENT description (#PCDATA)>
+
+ <!-- Project to do list (SGML format) -->
+ <!ELEMENT todo (#PCDATA)>
+
+ <!-- Calculator configuration -->
+ <!ELEMENT calculator EMPTY>
+
+ <!-- Parameters of tag "calculator":
+ radix - Radix (one of {Dec Hex Bin Oct})
+ angle_unit - Angle unit (one of {deg rad grad})
+ display0 - Primary display
+ display1 - Opereator display
+ display2 - Secondary display
+ memory0 - Content of memory bank 0
+ memory1 - Content of memory bank 1
+ memory2 - Content of memory bank 2
+ freq - Timers preset calculator: Frequency
+ time - Timers preset calculator: Desired time
+ mode - Timers preset calculator: Timer mode (one of {0 1 2})
+ -->
+ <!ATTLIST calculator
+ radix (Dec|Hex|Bin|Oct) #IMPLIED
+ angle_unit (deg|rad|grad) #IMPLIED
+ display0 CDATA #IMPLIED
+ display1 CDATA #IMPLIED
+ display2 CDATA #IMPLIED
+ memory0 CDATA #IMPLIED
+ memory1 CDATA #IMPLIED
+ memory2 CDATA #IMPLIED
+ freq CDATA #IMPLIED
+ time CDATA #IMPLIED
+ mode (0|1|2) #IMPLIED
+ >
+
+ <!-- Other options (it can contain anything) -->
+ <!ELEMENT other_options (#PCDATA)>
+
+ <!-- Compiler options -->
+ <!ELEMENT compiler_options (#PCDATA)>
+
+ <!-- Project files -->
+ <!ELEMENT files (file)*>
+
+ <!-- Parameters of tag "files":
+ count - Number of project files
+ current_file - Current file in left/top view
+ current_file2 - Current file in right/bottom view (if it's less than zero then editor won't be splitted)
+ pwin_sash - Position of paned window sash (has meaning only if editor was splitted)
+ selected_view - Active view; 0 == left/top, 1 == right/bottom
+ pwin_orient - Orientation of paned window for multiview (one of {horizontal vertical})
+ -->
+ <!ATTLIST files
+ count CDATA #IMPLIED
+ current_file CDATA #IMPLIED
+ current_file2 CDATA #IMPLIED
+ pwin_sash CDATA #IMPLIED
+ selected_view (0|1) #IMPLIED
+ pwin_orient (horizontal|vertical) #IMPLIED
+ >
+
+ <!-- Project file description -->
+ <!ELEMENT file (actual_line, md5_hash, path, bookmarks, breakpoints, eol, encoding, notes)>
+
+ <!-- Parameters of tag "file":
+ name - File name without path
+ active - "yes" == opended; "no" == closed
+ o_bookmark - Bookmark in list of opened files
+ p_bookmark - Bookmark in list of project files
+ file_index - File index in the list
+ read_only - Read only flag
+ highlight - Syntax highlight
+ -->
+ <!ATTLIST file
+ name CDATA #IMPLIED
+ active (yes|no) #IMPLIED
+ o_bookmark (1|0) #IMPLIED
+ p_bookmark (1|0) #IMPLIED
+ file_index CDATA #IMPLIED
+ read_only (1|0) #IMPLIED
+ highlight CDATA #IMPLIED
+ >
+
+ <!-- Current line -->
+ <!ELEMENT actual_line EMPTY>
+
+ <!-- Parameters of tag "actual_line":
+ value - Current line in the file
+ -->
+ <!ATTLIST actual_line
+ value CDATA #IMPLIED
+ >
+
+ <!-- MD5 hash for the file -->
+ <!ELEMENT md5_hash EMPTY>
+
+ <!-- Parameters of tag "md5_hash":
+ value - Last MD5 hash
+ -->
+ <!ATTLIST md5_hash
+ value CDATA #IMPLIED
+ >
+
+ <!-- File path -->
+ <!ELEMENT path (#PCDATA)>
+
+ <!-- Bookmarks: string of zeros and ones -->
+ <!ELEMENT bookmarks (#PCDATA)>
+
+ <!-- Breakpoints: string of zeros and ones -->
+ <!ELEMENT breakpoints (#PCDATA)>
+
+ <!-- End Of Line character name -->
+ <!ELEMENT eol EMPTY>
+
+ <!-- Parameters of tag "eol":
+ value - EOL character (lf == "Line feed" 0x0A; cr == "Carriage return" 0x0D)
+ -->
+ <!ATTLIST eol
+ value (lf|cr|crlf) #IMPLIED
+ >
+
+ <!-- File encoding (we strongly recomend to use utf-8 only) -->
+ <!ELEMENT encoding EMPTY>
+
+ <!-- File notes -->
+ <!ELEMENT notes (#PCDATA)>
+
+ <!-- Parameters of tag "encoding":
+ value - Name of choosen encoding
+ -->
+ <!ATTLIST encoding
+ value CDATA #IMPLIED
+ >
+]>
+<tk_mcuide_project version="0.9.5" date="03/02/09" creator_ver="1.3.3">
+ <general>
+ <authors><![CDATA[Martin Osmera &lt;martin.osmera@gmail.com&gt;
+]]></authors>
+ <copyright><![CDATA[]]></copyright>
+ <licence><![CDATA[GPLv2]]></licence>
+ <processor type="AT89S2051" clock="12000" xdata="0" xcode="0"/>
+ <options
+ watches_file="demo.wtc"
+ scheme=""
+ main_file=""
+ auto_sw_enabled="1"
+ />
+ <graph
+ grid="y"
+ magnification="0"
+ enabled="1"
+ marks_s="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
+ marks_l="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
+ marks_o="00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
+ active_page="output"
+ />
+ <description><![CDATA[This is demonstration project for MCU 8051 IDE and nothing more.
+
+Thank you for using MCU 8051 IDE.
+]]></description>
+ <todo><![CDATA[ <u><b>WELCOME TO MCU 8051 IDE</u></b>
+
+<u>What does it consist of:</u> <u>Basic key shortcuts:</u>
+ LEFT: <b>F2</b> - <i>Initialize simulator</i>
+<i> 1. List of opened files </i><b>F7</b> - <i>Step program</i>
+<i> 2. List of project files </i><b>F6</b> - <i>Animate program</i>
+<i> 3. Filesystem browser </i><b>F4</b> - <i>Reset simulator</i>
+<i> 4. SFR watches </i><b>CTRL+F7</b> - Step back
+ RIGHT: <bookmark/> Thank you for trying MCU 8051 IDE
+<i> 1. Bookmarks
+ 2. Breakpoints
+ 3. Symbol list
+ 4. Instruction details
+ 5. Register watches
+ 6. Subprograms monitor
+</i> 7. HW plug-ins
+ BOTTOM:
+<i> 1. Simulator panel
+ 2. C code debugger
+ 3. Graph of voltage levels on processor ports
+ 4. Messages text (Compiler output)
+ 5. This text editor
+ 6. Scientific calculator and calculator for computing timer preset
+ 7. Terminal emulator
+</i> 8. Tool for searching in files
+
+]]></todo>
+ <calculator
+ radix="Dec"
+ angle_unit="rad"
+ display0="88"
+ display1="add"
+ display2="99"
+ memory0="88"
+ memory1="66"
+ memory2="45"
+ freq="12000"
+ time="565"
+ mode="0"
+ />
+ </general>
+ <other_options><![CDATA[]]></other_options>
+ <compiler_options><![CDATA[{_title 0 _list 0 _print 0 _nomod 0 max_ihex_rec_length 255 _object 0 _pagelength 0 QUIET 0 _symbols 0 CREATE_SIM_FILE 1 CREATE_BIN_FILE 1 _pagewidth 0 optim_ena 0 _date 0 _paging 0 WARNING_LEVEL 0} 0 {--verbose 1 -i {} custom {} --columns 0 --omf-51 0} {adf 1} {-L 1 -M 0 custom {} -n 0 -P 0 -A 0 -a 0 -r {} -C 0 -c 0 -s 1 -U 0 -u 0 -g MAP -w 0 -cpu 8051 -x 0 -h 0 -quiet 0 -i {} -I 1} {ihex 1 adf 1} {--out-fmt-s19 0 --fdollars-in-identifiers 0 --nogcse 0 --nooverlay 1 --no-peep-comments 0 --no-c-code-in-asm 0 --print-search-dirs 0 --nostdlib 0 --peep-asm 0 --nolabelopt 0 --short-is-8bits 0 --cyclomatic 0 --compile-only 0 --no-reg-params 0 --noinvariant 0 --profile 0 --out-fmt-ihx 0 --noinduction 1 --opt-code-size 0 --nojtbound 0 --no-peep 0 --less-pedantic 0 --no-xinit-opt 0 --xstack 0 --funsigned-char 0 --verbose 1 -S 0 --debug 1 --preprocessonly 0 --opt-code-speed 0 --parms-in-bank1 0 --float-reent 0 -V 1 --c1mode 0 --fverbose-asm 0 --fommit-frame-pointer 0 --xram-movc 0 --main-return 0 --nostdinc 0 --noloopreverse 0 --stack-probe 0 --all-callee-saves 0 --int-long-reent 0 --stack-auto 0 --use-stdout 0} {standard --std-sdcc89 model --model-small stack --pack-iram custom {}} {--stack-size {} --code-loc {} --constseg {} --codeseg {} --xram-loc {} --data-loc {} --stack-loc {} --xstack-loc {} --lib-path {}} {--disable-warning {} -L {} -l {} -I {}} {} {}]]></compiler_options>
+ <files
+ count="9"
+ current_file="8"
+ current_file2="-1"
+ pwin_sash="304"
+ selected_view="0"
+ pwin_orient="horizontal">
+
+ <file name="demo0.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="0" read_only="0" highlight="0">
+ <actual_line value="1"/>
+ <md5_hash value="433B30D0A7A37EA31EA1FC96F9A63294"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 00000000000000001000000000000
+ </bookmarks>
+ <breakpoints>
+ 00000000000000000100000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[Basic demonstration code ...
+]]></notes>
+ </file>
+
+ <file name="demo1.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="1" read_only="0" highlight="0">
+ <actual_line value="1"/>
+ <md5_hash value="D9C47EC024BB961B1F86B2A2C82D6D7A"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 00000000000000000000000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 00000000000000000000000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[Quite more advance demonstration code ...
+]]></notes>
+ </file>
+
+ <file name="demo2.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="2" read_only="0" highlight="0">
+ <actual_line value="1"/>
+ <md5_hash value="016FCF566042EC66EE9118BAFA4D4A35"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[Next demonstration code ...
+]]></notes>
+ </file>
+
+ <file name="demo3.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="3" read_only="0" highlight="0">
+ <actual_line value="1"/>
+ <md5_hash value="6180D365C7F535CABD42C3E78A0798B9"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ <file name="demo5.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="4" read_only="0" highlight="0">
+ <actual_line value="13"/>
+ <md5_hash value="8A77C444C26BA55C5A8AC82FE0C8CFA9"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ <file name="demo_c_0.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="5" read_only="0" highlight="1">
+ <actual_line value="1"/>
+ <md5_hash value="79C98C5ADE29831807D59F6BC438063A"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 0000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 0000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ <file name="ledmatrix.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="6" read_only="0" highlight="1">
+ <actual_line value="1"/>
+ <md5_hash value="517133F895352F3918C3E1250EA990A5"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ <file name="keypad_display.c" active="yes" o_bookmark="0" p_bookmark="0" file_index="7" read_only="0" highlight="1">
+ <actual_line value="10"/>
+ <md5_hash value="E44E4DC2094E8EB729FE653002B40A33"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ <file name="mleddisplay.asm" active="yes" o_bookmark="0" p_bookmark="0" file_index="8" read_only="0" highlight="0">
+ <actual_line value="15"/>
+ <md5_hash value="BFC1B21D558BFAE2B1E43162DAEFE347"/>
+ <path><![CDATA[]]></path>
+ <bookmarks>
+ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </bookmarks>
+ <breakpoints>
+ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
+ </breakpoints>
+ <eol value="lf"/>
+ <encoding value="utf-8"/>
+ <notes><![CDATA[]]></notes>
+ </file>
+
+ </files>
+</tk_mcuide_project> \ No newline at end of file
diff --git a/demo/demo.wtc b/demo/demo.wtc
new file mode 100644
index 0000000..505abd2
--- /dev/null
+++ b/demo/demo.wtc
@@ -0,0 +1,15 @@
+# Watches definition file -- MCU 8051 IDE v1.3.1
+# Date: 10/27/2009
+ FF Register watches
+00FF Some XRAM reg
+ 0FF Some ERAM reg
+ 00 ----------------
+ 80 IDATA reg not SFR
+ 90 IDATA reg not SFR
+ A0 IDATA reg not SFR
+ B0 IDATA reg not SFR
+ D0 ----------------
+ .20 Some bit
+ .21 Another bit
+ 20 DATA_PTR
+ 0F COUNTER \ No newline at end of file
diff --git a/demo/demo0.adf b/demo/demo0.adf
new file mode 100644
index 0000000..7de7de2
--- /dev/null
+++ b/demo/demo0.adf
@@ -0,0 +1,9 @@
+# Assembler debug file for MCU 8051 IDE v1.1
+# Used assembler: MCU 8051 IDE
+# Date: 03/02/09
+87B0FFA871A3B2978A4FD4309AE5D3D4 "demo0.asm"
+0 8 0 8
+0 9 1 6
+0 10 2 184 127 251
+0 11 5 120 0
+0 12 7 128 247 \ No newline at end of file
diff --git a/demo/demo0.asm b/demo/demo0.asm
new file mode 100644
index 0000000..f44ee47
--- /dev/null
+++ b/demo/demo0.asm
@@ -0,0 +1,27 @@
+; MCU 8051 IDE - Demostration code
+; Very simple code
+
+; Press F2 and F6 to run the program (start simulator and animate)
+
+ org 0h
+
+main: inc R0
+ inc @R0
+ cjne R0, #07Fh, main
+ mov R0, #0d
+ sjmp main
+
+ end
+
+; <-- Bookmark (try Alt+PgUp/Alt+PgDown)
+; <-- Breakpoint
+
+; -----------------------------------------
+; NOTICE:
+; Simulator limitations:
+; * SPI
+; * Access to external code memory
+; * Power down modes
+; -----------------------------------------
+
+; IF YOU HAVE FOUND SOME BUG IN THIS IDE , PLEASE LET ME KNOW
diff --git a/demo/demo0.bin b/demo/demo0.bin
new file mode 100644
index 0000000..5511873
--- /dev/null
+++ b/demo/demo0.bin
@@ -0,0 +1 @@
+ \ No newline at end of file
diff --git a/demo/demo0.hex b/demo/demo0.hex
new file mode 100644
index 0000000..d34107a
--- /dev/null
+++ b/demo/demo0.hex
@@ -0,0 +1,2 @@
+:090000000806B87FFB780080F7C8
+:00000001FF \ No newline at end of file
diff --git a/demo/demo0.lst b/demo/demo0.lst
new file mode 100644
index 0000000..2a87958
--- /dev/null
+++ b/demo/demo0.lst
@@ -0,0 +1,198 @@
+demo0 PAGE 1
+ 1 ; MCU 8051 IDE - Demostration code
+ 2 ; Very simple code
+ 3
+ 4 ; Press F2 and F6 to run the program (start simulator and animate)
+ 5
+ 6 org 0h
+ 7
+0000 06 8 main: inc R0
+0001 B87FFB 9 inc @R0
+0002 7800 10 cjne R0, #07Fh, main
+0005 80F7 11 mov R0, #0d
+ 12 sjmp main
+ 13
+ 14 end
+ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS
+
+
+SYMBOL TABLE:
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED
+ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED
+ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED
+ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED
+ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED
+BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED
+CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED
+CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED
+CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED
+CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED
+CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED
+CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED
+CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED
+CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED
+CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED
+CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED
+CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED
+CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED
+CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED
+CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED
+CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED
+CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED
+CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED
+CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED
+CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED
+CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED
+EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED
+IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED
+KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED
+KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+MAIN . . . . . . . . . . . . . . . . C ADDR 0000H
+OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED
+P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED
+P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED
+P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED
+P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED
+P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED
+PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED
+TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED
+TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED \ No newline at end of file
diff --git a/demo/demo0.sim b/demo/demo0.sim
new file mode 100644
index 0000000..a2482bc
--- /dev/null
+++ b/demo/demo0.sim
@@ -0,0 +1,6 @@
+458DB610414A7EC882B8DFA06C1D6748 12/21/07 demo0.asm
+8 0 8
+9 1 6
+10 2 184 127 251
+11 5 120 0
+12 7 128 247 \ No newline at end of file
diff --git a/demo/demo1.adf b/demo/demo1.adf
new file mode 100644
index 0000000..e4387cf
--- /dev/null
+++ b/demo/demo1.adf
@@ -0,0 +1,19 @@
+# Assembler debug file for MCU 8051 IDE v1.1
+# Used assembler: MCU 8051 IDE
+# Date: 03/02/09
+D9C47EC024BB961B1F86B2A2C82D6D7A "demo1.asm"
+0 48 0 128 0
+0 52 2 117 144 15
+0 53 5 117 176 30
+0 54 8 128 0
+0 58 10 229 15
+0 58 12 4
+0 58 13 245 15
+0 58 15 133 144 176
+0 58 18 133 176 144
+0 58 21 211
+0 58 22 229 144
+0 58 24 35
+0 58 25 245 144
+0 59 27 128 237
+0 17 29 4 \ No newline at end of file
diff --git a/demo/demo1.asm b/demo/demo1.asm
new file mode 100644
index 0000000..3ba82dd
--- /dev/null
+++ b/demo/demo1.asm
@@ -0,0 +1,63 @@
+; MCU 8051 IDE - Demostration code
+; Macro instructions, conditional compilation and constants
+; Try tab "Graph" on bottom panel
+
+; Press F2 and F6 to run the program (start simulator and animate)
+
+$TITLE('DEMO 2') ; Set title for code listing
+$DATE(36/-4/1907) ; Set date for code listing
+
+; Constant definitions
+; --------------------
+counter idata 00Fh ; Counter of Px shifts
+x set 100 ; Some variable
+inc_dec equ 100 / X ; Flag: Increment/Decrement counter
+
+ cseg at 1FFh ; Code segment starts at 0x1FF
+something: db 4d ; Reserve 4 bytes in this segment
+
+; Macro instructions
+; --------------------
+
+;; Shift the given registeres
+shift macro reg0, reg1
+
+ ; Increment / Decrement counter
+ mov A, counter
+ if inc_dec <> 0
+ inc A
+ else
+ dec A
+ endif
+ $nolist ; <- Disable code listing
+ mov counter, A
+ $list ; <- Enable code listing
+
+ ; Shift
+ mov reg1, reg0
+ mov reg0, reg1
+ setb C
+ mov A, reg0
+ rl A
+ mov reg0, A
+endm
+
+; Program initilization
+; --------------------
+ org 0h
+ sjmp start
+
+; Program start
+; --------------------
+start: mov P1, #00Fh
+ mov P3, #01Eh
+ sjmp main
+
+; Main loop
+; --------------------
+main: shift P1, P3
+ sjmp main
+
+; Program end
+; --------------------
+ end
diff --git a/demo/demo1.bin b/demo/demo1.bin
new file mode 100644
index 0000000..4f74af1
--- /dev/null
+++ b/demo/demo1.bin
Binary files differ
diff --git a/demo/demo1.hex b/demo/demo1.hex
new file mode 100644
index 0000000..f83cb51
--- /dev/null
+++ b/demo/demo1.hex
@@ -0,0 +1,2 @@
+:1E000000800075900F75B01E8000E50F04F50F8590B085B090D3E59023F59080ED04A4
+:00000001FF \ No newline at end of file
diff --git a/demo/demo1.lst b/demo/demo1.lst
new file mode 100644
index 0000000..25d0ef4
--- /dev/null
+++ b/demo/demo1.lst
@@ -0,0 +1,262 @@
+demo1 DEMO 2 36/-4/1907 PAGE 1
+ 1 ; MCU 8051 IDE - Demostration code
+ 2 ; Macro instructions, conditional compilation and constants
+ 3 ; Try tab "Graph" on bottom panel
+ 4
+ 5 ; Press F2 and F6 to run the program (start simulator and animate)
+ 6
+ 7 $TITLE('DEMO 2') ; Set title for code listing
+ 8 $DATE(36/-4/1907) ; Set date for code listing
+ 9
+ 10 ; Constant definitions
+ 11 ; --------------------
+ 000F 12 counter idata 00Fh ; Counter of Px shifts
+ 0064 13 x set 100 ; Some variable
+ 0001 14 inc_dec equ 100 / X ; Flag: Increment/Decrement counter
+ 15
+ 16 cseg at 1FFh ; Code segment starts at 0x1FF
+ 17 something: db 4d ; Reserve 4 bytes in this segment
+ 18
+ 19 ; Macro instructions
+ 20 ; --------------------
+ 21
+ 22 ;; Shift the given registeres
+ 23 shift macro reg0, reg1
+ 24
+ 25 ; Increment / Decrement counter
+ 26 mov A, counter
+ 27 if inc_dec <> 0
+ 28 inc A
+ 29 else
+ 30 dec A
+ 31 endif
+ 33 mov counter, A
+ 34 $list ; <- Enable code listing
+ 35
+ 36 ; Shift
+ 37 mov reg1, reg0
+ 38 mov reg0, reg1
+ 39 setb C
+ 40 mov A, reg0
+ 41 rl A
+ 42 mov reg0, A
+ 43 endm
+ 44
+ 45 ; Program initilization
+ 46 ; --------------------
+0000 75900F 47 org 0h
+0002 75B01E 48 sjmp start
+ 49
+ 50 ; Program start
+ 51 ; --------------------
+0005 8000 52 start: mov P1, #00Fh
+0008 E50F 53 mov P3, #01Eh
+ 54 +1 sjmp main
+ 55 +1
+000A 04 56 +1 mov a, counter
+000C F50F 57 +1 inc a
+000D 8590B0 58 +1 mov counter, a
+ 59 +1
+000F 85B090 60 +1 mov p3, p1
+0012 D3 61 +1 mov p1, p3
+0015 E590 62 +1 setb c
+0016 23 63 +1 mov a, p1
+0018 F590 64 +1 rl a
+0019 80ED 65 +1 mov p1, a
+ 66
+ 67 ; Main loop
+ 68 ; --------------------
+ 69 main: shift P1, P3
+ 70 sjmp main
+ 71
+ 72 ; Program end
+ 73 ; --------------------
+ 74 end
+ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS
+
+
+SYMBOL TABLE:
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED
+ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED
+ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED
+ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED
+ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED
+BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED
+CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED
+CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED
+CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED
+CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED
+CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED
+CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED
+CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED
+CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED
+CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED
+CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED
+CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED
+CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED
+CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED
+CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED
+CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED
+CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED
+CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED
+CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED
+CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED
+CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED
+COUNTER. . . . . . . . . . . . . . . I ADDR 000FH
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED
+EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INC_DEC. . . . . . . . . . . . . . . N NUMB 0001H NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED
+IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED
+KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED
+KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+MAIN . . . . . . . . . . . . . . . . C ADDR 000AH
+OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H
+P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED
+P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H
+P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED
+P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED
+P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED
+PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SOMETHING. . . . . . . . . . . . . . C ADDR 001DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED
+START. . . . . . . . . . . . . . . . C ADDR 0002H
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED
+TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED
+TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
+X. . . . . . . . . . . . . . . . . . NUMB 0064H NOT USED REDEFINABLE \ No newline at end of file
diff --git a/demo/demo1.sim b/demo/demo1.sim
new file mode 100644
index 0000000..1d235f3
--- /dev/null
+++ b/demo/demo1.sim
@@ -0,0 +1,16 @@
+C4FD5C3C2DF98DDEE6FE5ACA0FD745A8 12/21/07 demo1.asm
+48 0 128 0
+52 2 117 144 15
+53 5 117 176 30
+54 8 128 0
+58 10 229 15
+58 12 4
+58 13 245 15
+58 15 133 176 144
+58 18 133 144 176
+58 21 211
+58 22 229 144
+58 24 35
+58 25 245 144
+59 27 128 237
+17 511 4 \ No newline at end of file
diff --git a/demo/demo2.adf b/demo/demo2.adf
new file mode 100644
index 0000000..f542c32
--- /dev/null
+++ b/demo/demo2.adf
@@ -0,0 +1,50 @@
+# Assembler debug file for MCU 8051 IDE v1.3.1
+# Used assembler: MCU 8051 IDE
+# Date: 10/27/2009
+016FCF566042EC66EE9118BAFA4D4A35 "demo2.asm"
+0 47 0 128 28
+0 50 11 128 0
+0 56 13 127 26
+0 57 15 126 0
+0 58 17 238
+0 58 18 144 0 47
+0 58 21 147
+0 58 22 141 130
+0 58 24 240
+0 58 25 13
+0 58 26 14
+0 59 27 223 244
+0 60 29 50
+0 65 30 125 0
+0 66 32 117 168 255
+0 67 35 117 138 255
+0 68 38 117 137 3
+0 69 41 210 140
+0 70 43 128 0
+0 74 45 128 254
+0 28 47 87
+0 28 48 101
+0 28 49 108
+0 28 50 99
+0 28 51 111
+0 28 52 109
+0 28 53 101
+0 28 54 32
+0 28 55 105
+0 28 56 110
+0 28 57 32
+0 28 58 77
+0 28 59 67
+0 28 60 85
+0 28 61 32
+0 28 62 56
+0 28 63 48
+0 28 64 53
+0 28 65 49
+0 28 66 32
+0 28 67 73
+0 28 68 68
+0 28 69 69
+0 28 70 32
+0 28 71 33
+0 28 72 32 \ No newline at end of file
diff --git a/demo/demo2.asm b/demo/demo2.asm
new file mode 100644
index 0000000..d3f595d
--- /dev/null
+++ b/demo/demo2.asm
@@ -0,0 +1,78 @@
+; MCU 8051 IDE - Demostration code
+; Interrupts, hexadecimal editor and code validator
+; ------------------------------------------------------
+; THIS REQUIRES ANOTHER MCU THAN AT89C2051 BECAUSE
+; AT89C2051 HAS NO XDATA MENORY. CLICK ON
+; [Main menu] -> [Project] -> [Edit project] AND SELECT
+; FOR INSTANCE AT89C51 AND SET XDATA TO SOME VALUE
+; ------------------------------------------------------
+
+; * Click on [Main menu] -> [Simulator] -> [Show XDATA memory]
+; * Press F2 and F6 (start simulator and animate)
+
+
+
+; Code with syntax errors
+ nolist ; Disable code listing
+if 0
+ mov A, #55d, B ; too many operands
+ inc 0FFh,, 04x4h ; invalid operands
+ db (4 *** 5) ; invalid expression
+label?: mul B ; ivalid label and invalid operand
+endif
+ list ; Enable code listing
+
+; Constants
+; --------------------
+ cseg at 0D0h
+string: db 'Welcome in MCU 8051 IDE ! '
+
+string_legth equ 26d
+
+; Macro instructions
+; --------------------
+write_to_xdata macro str, code_ptr, xdata_ptr
+ mov A, code_ptr
+ mov DPTR, #str
+ movc A, @A+DPTR
+ mov DPL, xdata_ptr
+ movx @DPTR, A
+ inc xdata_ptr
+ inc code_ptr
+endm
+
+; Program initilization
+; --------------------
+ org 0h ; Reset vector
+ sjmp start
+
+ org 0Bh ; Interrupt vector - T0
+ sjmp T0_int
+
+; Subprograms
+; --------------------
+
+;; Hadnle interrupt from TF0
+T0_int: mov R7, #string_legth
+ mov R6, #0h
+loop: write_to_xdata string, R6, R5
+ djnz R7, loop
+ reti
+
+; Program start
+; --------------------
+start: ; Start timer 0 in mode 2
+ mov R5, #0h
+ mov IE, #0FFh
+ mov TL0, #255d
+ mov TMOD, #03h
+ setb TR0
+ sjmp main
+
+; Main loop
+; --------------------
+main: sjmp $ ; Inifinite loop
+
+; Program end
+; --------------------
+ end
diff --git a/demo/demo2.bin b/demo/demo2.bin
new file mode 100644
index 0000000..031c85b
--- /dev/null
+++ b/demo/demo2.bin
Binary files differ
diff --git a/demo/demo2.hex b/demo/demo2.hex
new file mode 100644
index 0000000..1139f92
--- /dev/null
+++ b/demo/demo2.hex
@@ -0,0 +1,3 @@
+:02000000801C62
+:3E000B0080007F1A7E00EE90002F938D82F00D0EDFF4327D0075A8FF758AFF758903D28C800080FE57656C636F6D6520696E204D4355203830353120494445202120C4
+:00000001FF \ No newline at end of file
diff --git a/demo/demo2.lst b/demo/demo2.lst
new file mode 100644
index 0000000..4ce2673
--- /dev/null
+++ b/demo/demo2.lst
@@ -0,0 +1,270 @@
+demo2 PAGE 1
+0048 80FE 1 ; MCU 8051 IDE - Demostration code
+ 2 ; Interrupts, hexadecimal editor and code validator
+ 3 ; ------------------------------------------------------
+ 4 ; THIS REQUIRES ANOTHER MCU THAN AT89C2051 BECAUSE
+ 5 ; AT89C2051 HAS NO XDATA MENORY. CLICK ON
+ 6 ; [Main menu] -> [Project] -> [Edit project] AND SELECT
+ 7 ; FOR INSTANCE AT89C51 AND SET XDATA TO SOME VALUE
+ 8 ; ------------------------------------------------------
+ 9
+ 10 ; * Click on [Main menu] -> [Simulator] -> [Show XDATA memory]
+ 11 ; * Press F2 and F6 (start simulator and animate)
+ 12
+ 13
+ 14
+ 15 ; Code with syntax errors
+ 16 nolist ; Disable code listing
+ 23 list ; Enable code listing
+ 24
+ 25 ; Constants
+ 26 ; --------------------
+ 27 cseg at 0D0h
+ 28 string: db 'Welcome in MCU 8051 IDE ! '
+ 29
+ 001A 30 string_legth equ 26d
+ 31
+ 32 ; Macro instructions
+ 33 ; --------------------
+ 34 write_to_xdata macro str, code_ptr, xdata_ptr
+ 35 mov A, code_ptr
+ 36 mov DPTR, #str
+ 37 movc A, @A+DPTR
+ 38 mov DPL, xdata_ptr
+ 39 movx @DPTR, A
+ 40 inc xdata_ptr
+ 41 inc code_ptr
+ 42 endm
+ 43
+ 44 ; Program initilization
+ 45 ; --------------------
+0000 801C 46 org 0h ; Reset vector
+ 47 sjmp start
+ 48
+ 49 org 0Bh ; Interrupt vector - T0
+ 50 sjmp T0_int
+ 51
+ 52 ; Subprograms
+ 53 ; --------------------
+ 54
+ 55 ;; Hadnle interrupt from TF0
+ 56 T0_int: mov R7, #string_legth
+ 57 mov R6, #0h
+ 58 +1 loop: write_to_xdata string, R6, R5
+ 59 +1 mov a, r6
+ 60 +1 mov dptr, #string
+ 61 +1 movc a, @a+dptr
+ 62 +1 mov dpl, r5
+ 63 +1 movx @dptr, a
+ 64 +1 inc r5
+ 65 +1 inc r6
+ 66 djnz R7, loop
+ 67 reti
+ 68
+ 69 ; Program start
+ 70 ; --------------------
+ 71 start: ; Start timer 0 in mode 2
+ 72 mov R5, #0h
+ 73 mov IE, #0FFh
+ 74 mov TL0, #255d
+ 75 mov TMOD, #03h
+ 76 setb TR0
+ 77 sjmp main
+ 78
+ 79 ; Main loop
+ 80 ; --------------------
+ 81 main: sjmp $ ; Inifinite loop
+ 82
+ 83 ; Program end
+ 84 ; --------------------
+ 85 end
+ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS
+
+
+SYMBOL TABLE:
+??MCU_8051_IDE . . . . . . . . . . . N NUMB 8051H NOT USED
+??VERSION. . . . . . . . . . . . . . N NUMB 0131H NOT USED
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED
+ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED
+ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED
+ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED
+ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED
+BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED
+CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED
+CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED
+CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED
+CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED
+CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED
+CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED
+CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED
+CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED
+CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED
+CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED
+CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED
+CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED
+CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED
+CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED
+CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED
+CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED
+CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED
+CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED
+CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED
+CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED
+EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED
+IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED
+KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED
+KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+LOOP . . . . . . . . . . . . . . . . C ADDR 0011H
+MAIN . . . . . . . . . . . . . . . . C ADDR 002DH
+OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED
+P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED
+P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED
+P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED
+P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED
+P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED
+PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED
+START. . . . . . . . . . . . . . . . C ADDR 001EH
+STRING . . . . . . . . . . . . . . . C ADDR 002FH
+STRING_LEGTH . . . . . . . . . . . . N NUMB 001AH
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T0_INT . . . . . . . . . . . . . . . C ADDR 000DH
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED
+TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED
+TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED \ No newline at end of file
diff --git a/demo/demo2.sim b/demo/demo2.sim
new file mode 100644
index 0000000..4230f05
--- /dev/null
+++ b/demo/demo2.sim
@@ -0,0 +1,47 @@
+3E5C5EAE0BA81D024AAE08DD4B210650 12/21/07 demo2.asm
+47 0 128 28
+50 11 128 0
+56 13 127 26
+57 15 126 0
+58 17 238
+58 18 144 0 208
+58 21 147
+58 22 141 130
+58 24 240
+58 25 13
+58 26 14
+59 27 223 244
+60 29 50
+65 30 125 0
+66 32 117 168 255
+67 35 117 138 255
+68 38 117 137 3
+69 41 210 140
+70 43 128 0
+74 45 128 254
+28 208 87
+28 209 101
+28 210 108
+28 211 99
+28 212 111
+28 213 109
+28 214 101
+28 215 32
+28 216 105
+28 217 110
+28 218 32
+28 219 77
+28 220 67
+28 221 85
+28 222 32
+28 223 56
+28 224 48
+28 225 53
+28 226 49
+28 227 32
+28 228 73
+28 229 68
+28 230 69
+28 231 32
+28 232 33
+28 233 32 \ No newline at end of file
diff --git a/demo/demo3.adf b/demo/demo3.adf
new file mode 100644
index 0000000..64c2b62
--- /dev/null
+++ b/demo/demo3.adf
@@ -0,0 +1,9 @@
+# Assembler debug file for MCU 8051 IDE v1.1
+# Used assembler: MCU 8051 IDE
+# Date: 03/02/09
+6180D365C7F535CABD42C3E78A0798B9 "demo3.asm"
+0 67 0 128 254
+0 35 2 51
+0 35 3 52
+0 36 4 51
+0 36 5 52 \ No newline at end of file
diff --git a/demo/demo3.asm b/demo/demo3.asm
new file mode 100644
index 0000000..d93d260
--- /dev/null
+++ b/demo/demo3.asm
@@ -0,0 +1,72 @@
+; MCU 8051 IDE - Demostration code
+; Compiler directives
+
+
+$DATE(32/13/1907)   ; Places date in page header
+; $EJECT ; Places a form feed in listing
+; $INCLUDE(file.asm) ; Inserts file in source program
+; $LIST ; Allows listing to be output
+; $NOLIST ; Stops outputting the listing
+; $NOMOD ; No predefined symbols used
+$OBJECT(file.hex) ; Places object output in file
+; $NOOBJECT ; No object file is generated
+$PAGING ; Break output listing into pages
+; $NOPAGING ; Print listing w/o page breaks
+$PAGELENGTH(10) ; No. of lines on a listing page
+$PAGEWIDTH(20)    ; No. of columns on a listing page
+$PRINT(file.lst) ; Places listing output in file
+; $NOPRINT ; Listing will not be output
+; $SYMBOLS ; Append symbol table to listing
+; $NOSYMBOLS ; Symbol table will not be output
+$TITLE('demo - 3') ; Places string in page header
+
+
+;; Summary of Cross Assembler Directives
+;; -------------------------------------
+
+a EQU 54d ; Define symbol
+b0 DATA a / 2 ; Define internal memory symbol
+c IDATA (b0*2-5) ; Define indirectly addressed internal memory
+d BIT 070Q ; Define internal bit memory symbol
+e CODE 0FFA5h ; Define program memory symbol
+var SET (A * 44) MOD 9 - 14 ; Variable defined by an expression
+
+ CSEG at 20h ; Select program memory space
+x: DB '34' ; Store byte values in program memory
+y: DW 3334h ; Store word values in program memory
+
+ DSEG at 5d ; Select internal memory data space
+m: DS 1 ; Reserve bytes of data memory
+
+ xseg ; Select external memory data space
+n: DS 1 ; Reserve bytes of data memory
+
+ ISEG ; Select indirectly addressed internal memory space
+o: DS 1 ; Reserve bytes of data memory
+
+ NOLIST ; Disable code listing
+ BSEG ; Select bit addressable memory space
+r: DBIT 4 ; Reserve bits of bit memory
+ LIST ; Enable code listing
+
+
+mc macro label ; Define macro instruction
+ IF 2 <> 2 OR 1 = 4
+ EXITM ; Exit macro
+ ENDIF
+ sjmp label
+endm ; End of definition
+
+main: ORG 0 ; Set segment location counter
+ IF 0 ; Begin conditional assembly block
+ USING 2 ; Select register bank (define AR0..7)
+ ELSE ; Alternative conditional assembly block
+ USING 2 ; Select register bank (define AR0..7)
+ ENDIF ; End conditional assembly block
+
+ mc main ; Macro instuction
+
+ END ; End of assembly language source file
+
+
+; This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them.This is a very long line, try to avoid them. This is a very long line, try to avoid them.This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them. This is a very long line, try to avoid them.
diff --git a/demo/demo3.bin b/demo/demo3.bin
new file mode 100644
index 0000000..45d3d20
--- /dev/null
+++ b/demo/demo3.bin
@@ -0,0 +1 @@
+3 \ No newline at end of file
diff --git a/demo/demo3.sim b/demo/demo3.sim
new file mode 100644
index 0000000..ef0cd1f
--- /dev/null
+++ b/demo/demo3.sim
@@ -0,0 +1,6 @@
+6180D365C7F535CABD42C3E78A0798B9 12/21/07 demo3.asm
+67 0 128 254
+35 32 51
+35 33 52
+36 34 51
+36 35 52 \ No newline at end of file
diff --git a/demo/demo4.adf b/demo/demo4.adf
new file mode 100644
index 0000000..fb6a934
--- /dev/null
+++ b/demo/demo4.adf
@@ -0,0 +1,45 @@
+# Assembler Debug File created by MCU 8051 IDE v1.0.5
+# Used assembler: MCU 8051 IDE
+# Date: 04/30/08
+7E1BFADD8BDB7A40D6B8CA5161E3113A "demo4.asm"
+0 27 0 128 64
+0 30 3 210 152
+0 30 5 210 153
+0 30 7 17 58
+0 30 9 50
+0 33 11 210 152
+0 33 13 210 153
+0 33 15 17 58
+0 33 17 50
+0 36 19 210 152
+0 36 21 210 153
+0 36 23 17 58
+0 36 25 50
+0 39 27 210 152
+0 39 29 210 153
+0 39 31 17 58
+0 39 33 50
+0 42 35 210 152
+0 42 37 210 153
+0 42 39 17 58
+0 42 41 50
+0 45 43 210 152
+0 45 45 210 153
+0 45 47 17 58
+0 45 49 50
+0 48 51 210 152
+0 48 53 210 153
+0 48 55 17 58
+0 48 57 50
+0 53 58 127 16
+0 54 60 17 63
+0 55 62 34
+0 58 63 223 254
+0 59 65 34
+0 66 66 210 141
+0 67 68 210 143
+0 68 70 210 137
+0 69 72 210 139
+0 72 74 117 168 255
+0 73 77 210 188
+0 76 79 128 254 \ No newline at end of file
diff --git a/demo/demo4.asm b/demo/demo4.asm
new file mode 100644
index 0000000..662c740
--- /dev/null
+++ b/demo/demo4.asm
@@ -0,0 +1,81 @@
+; MCU 8051 IDE - Demostration code
+; Interrupt monitor and list of active subprograms
+
+; 1) Press Ctrl+0 to show tab "List of subprograms" on righ panel
+; 2) Run interrupt monitor
+; (Main menu: Simulator -> Interrupt monitor)
+; 3) Press F2 to start simulator and F6 to run animation mode
+
+; Macro instructions
+; ------------------
+
+;; Handle interrupt
+intr macro
+ ; Set UART interrupt flags
+ setb RI
+ setb TI
+
+ ; Wait a while and return from interrupt
+ acall wait
+ reti
+endm
+
+
+; Interrupt vectors
+; -----------------
+ org 00h ; Reset
+ ajmp start
+
+ org 03h ; External 0
+ intr
+
+ org 0Bh ; Timer 0
+ intr
+
+ org 13h ; External 0
+ intr
+
+ org 1Bh ; Timer 1
+ intr
+
+ org 23h ; UART and SPI
+ intr
+
+ org 2Bh ; Timer 2
+ intr
+
+ org 33h ; Analog comparator
+ intr
+
+; Subprograms
+; -----------------
+wait: ; Wait for 24 cycles
+ mov R7, #10h
+ acall wait_aux
+ ret
+
+wait_aux:
+ djnz R7, $
+ ret
+
+
+; Program start
+; -----------------
+start:
+ ; Set some interrupt bits
+ setb TF0
+ setb TF1
+ setb IE0
+ setb IE1
+
+ ; Enable all interrupts and set priorities
+ mov IE, #0FFh
+ setb PS
+
+ ; Infinite loop
+ sjmp $
+
+
+; End of code
+; -----------------
+ end
diff --git a/demo/demo4.bin b/demo/demo4.bin
new file mode 100644
index 0000000..413b6f7
--- /dev/null
+++ b/demo/demo4.bin
Binary files differ
diff --git a/demo/demo4.hex b/demo/demo4.hex
new file mode 100644
index 0000000..20def10
--- /dev/null
+++ b/demo/demo4.hex
@@ -0,0 +1,9 @@
+:0200000080403E
+:07000300D298D299113A32A4
+:07000B00D298D299113A329C
+:07001300D298D299113A3294
+:07001B00D298D299113A328C
+:07002300D298D299113A3284
+:07002B00D298D299113A327C
+:1E003300D298D299113A327F10113F22DFFE22D28DD28FD289D28B75A8FFD2BC80FEBD
+:00000001FF \ No newline at end of file
diff --git a/demo/demo4.lst b/demo/demo4.lst
new file mode 100644
index 0000000..867750e
--- /dev/null
+++ b/demo/demo4.lst
@@ -0,0 +1,228 @@
+demo4 PAGE 1
+ 1 ; MCU 8051 IDE - Demostration code
+ 2 ; Interrupt monitor and list of active subprograms
+ 3
+ 4 ; 1) Press Ctrl+0 to show tab "List of subprograms" on righ panel
+ 5 ; 2) Run interrupt monitor
+ 6 ; (Main menu: Simulator -> Interrupt monitor)
+ 7 ; 3) Press F2 to start simulator and F6 to run animation mode
+ 8
+ 9 ; Macro instructions
+ 10 ; ------------------
+ 11
+ 12 ;; Handle interrupt
+ 13 intr macro
+ 14 ; Set UART interrupt flags
+ 15 setb RI
+ 16 setb TI
+ 17
+ 18 ; Wait a while and return from interrupt
+ 19 acall wait
+ 20 reti
+ 21 endm
+ 22
+ 23
+ 24 ; Interrupt vectors
+ 25 ; -----------------
+ 26 org 00h ; Reset
+0000 D298 27 ajmp start
+ 28
+ 29 +1 org 03h ; External 0
+ 30 +2
+ 31 +3
+ 32 +4
+ 33 +5
+ 34 +6
+ 35 +7
+ 36 +7
+ 37 +7 setb RI
+000B 113F 38 +7 setb TI
+000D 22 39 +7
+ 40 +7 acall wait
+000F DFFE 41 +7 reti
+ 42 +6 setb RI
+0011 22 43 +6 setb TI
+ 44 +6
+ 45 +6 acall wait
+0013 D28F 46 +6 reti
+ 47 +5 setb RI
+0015 D289 48 +5 setb TI
+ 49 +5
+0017 D28B 50 +5 acall wait
+0019 75A8FF 51 +5 reti
+ 52 +4 setb RI
+ 53 +4 setb TI
+ 54 +4
+001B 80FE 55 +4 acall wait
+ 56 +4 reti
+ 57 +3 setb RI
+ 58 +3 setb TI
+ 59 +3
+ 60 +3 acall wait
+ 61 +3 reti
+ 62 +2 setb RI
+ 63 +2 setb TI
+ 64 +2
+ 65 +2 acall wait
+ 66 +2 reti
+ 67 +1 setb RI
+ 68 +1 setb TI
+ 69 +1
+ 70 +1 acall wait
+ 71 +1 reti
+ 72 intr
+ 73
+ 74 org 0Bh ; Timer 0
+ 75 intr
+ 76
+ 77 org 13h ; External 0
+ 78 intr
+ 79
+ 80 org 1Bh ; Timer 1
+ 81 intr
+ 82
+ 83 org 23h ; UART and SPI
+ 84 intr
+ 85
+ 86 org 2Bh ; Timer 2
+ 87 intr
+ 88
+ 89 org 33h ; Analog comparator
+ 90 intr
+ 91
+ 92 ; Subprograms
+ 93 ; -----------------
+ 94 wait: ; Wait for 24 cycles
+ 95 mov R7, #10h
+ 96 acall wait_aux
+ 97 ret
+ 98
+ 99 wait_aux:
+ 100 djnz R7, $
+ 101 ret
+ 102
+ 103
+ 104 ; Program start
+ 105 ; -----------------
+ 106 start:
+ 107 ; Set some interrupt bits
+ 108 setb TF0
+ 109 setb TF1
+ 110 setb IE0
+ 111 setb IE1
+ 112
+ 113 ; Enable all interrupts and set priorities
+ 114 mov IE, #0FFh
+ 115 setb PS
+ 116
+ 117 ; Infinite loop
+ 118 sjmp $
+ 119
+ 120
+ 121 ; End of code
+ 122 ; -----------------
+ 123 end
+ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS
+
+
+SYMBOL TABLE:
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+START. . . . . . . . . . . . . . . . C ADDR 0042H NOT USED
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+WAIT . . . . . . . . . . . . . . . . C ADDR 003AH NOT USED
+WAIT_AUX . . . . . . . . . . . . . . C ADDR 003FH NOT USED
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED \ No newline at end of file
diff --git a/demo/demo4.sim b/demo/demo4.sim
new file mode 100644
index 0000000..52643cc
--- /dev/null
+++ b/demo/demo4.sim
@@ -0,0 +1,42 @@
+7E1BFADD8BDB7A40D6B8CA5161E3113A 01/14/08 demo4.asm
+27 0 128 64
+30 3 210 152
+30 5 210 153
+30 7 17 58
+30 9 50
+33 11 210 152
+33 13 210 153
+33 15 17 58
+33 17 50
+36 19 210 152
+36 21 210 153
+36 23 17 58
+36 25 50
+39 27 210 152
+39 29 210 153
+39 31 17 58
+39 33 50
+42 35 210 152
+42 37 210 153
+42 39 17 58
+42 41 50
+45 43 210 152
+45 45 210 153
+45 47 17 58
+45 49 50
+48 51 210 152
+48 53 210 153
+48 55 17 58
+48 57 50
+53 58 127 16
+54 60 17 63
+55 62 34
+58 63 223 254
+59 65 34
+66 66 210 141
+67 68 210 143
+68 70 210 137
+69 72 210 139
+72 74 117 168 255
+73 77 210 188
+76 79 128 254 \ No newline at end of file
diff --git a/demo/demo5.adf b/demo/demo5.adf
new file mode 100644
index 0000000..de35ed8
--- /dev/null
+++ b/demo/demo5.adf
@@ -0,0 +1,5 @@
+# Assembler debug file for MCU 8051 IDE v1.1
+# Used assembler: MCU 8051 IDE
+# Date: 03/02/09
+8A77C444C26BA55C5A8AC82FE0C8CFA9 "demo5.asm"
+0 32 0 128 254 \ No newline at end of file
diff --git a/demo/demo5.asm b/demo/demo5.asm
new file mode 100644
index 0000000..9c3bc68
--- /dev/null
+++ b/demo/demo5.asm
@@ -0,0 +1,35 @@
+; Dissassebler
+; --------------------
+; [Main menu] -> [Tools] -> [Dissasseble]
+; Choose some hex file and see result
+
+; Custom commands
+; --------------------
+; They can be used for instance to load your program into a
+; real processor.
+; [Main menu] -> [Configure] -> [Edit cutom commands]
+; [Main menu] -> [Tools] -> [Cutom command N]
+
+; Tip of the day
+; --------------------
+; You may find some useful advices how to use this
+; IDE more efficiently
+; [Main menu] -> [Help] -> [Tip of the day]
+
+; Project web page:
+; --------------------
+; http://mcu8051ide.sf.net
+
+
+
+; AND NOW YOU ARE READY !
+; Click on [Main menu] -> [Project] -> [New] and create your own 8051 project ...
+
+
+; !!! HAVE A GOOD LUCK WITH THIS IDE !!!
+
+ org 0
+ sjmp $
+ end
+
+; !!! HAVE A GOOD LUCK WITH THIS IDE !!! \ No newline at end of file
diff --git a/demo/demo5.bin b/demo/demo5.bin
new file mode 100644
index 0000000..5416677
--- /dev/null
+++ b/demo/demo5.bin
@@ -0,0 +1 @@
+ \ No newline at end of file
diff --git a/demo/demo5.hex b/demo/demo5.hex
new file mode 100644
index 0000000..0df57c5
--- /dev/null
+++ b/demo/demo5.hex
@@ -0,0 +1,2 @@
+:0200000080FE80
+:00000001FF \ No newline at end of file
diff --git a/demo/demo5.lst b/demo/demo5.lst
new file mode 100644
index 0000000..3468d65
--- /dev/null
+++ b/demo/demo5.lst
@@ -0,0 +1,216 @@
+demo5 PAGE 1
+ 1 ; Dissassebler
+ 2 ; --------------------
+ 3 ; [Main menu] -> [Tools] -> [Dissasseble]
+ 4 ; Choose some hex file and see result
+ 5
+ 6 ; Custom commands
+ 7 ; --------------------
+ 8 ; They can be used for instance to load your program into a
+ 9 ; real processor.
+ 10 ; [Main menu] -> [Configure] -> [Edit cutom commands]
+ 11 ; [Main menu] -> [Tools] -> [Cutom command N]
+ 12
+ 13 ; Tip of the day
+ 14 ; --------------------
+ 15 ; You may find some useful advices how to use this
+ 16 ; IDE more efficiently
+ 17 ; [Main menu] -> [Help] -> [Tip of the day]
+ 18
+ 19 ; Project web page:
+ 20 ; --------------------
+ 21 ; http://mcu8051ide.sf.net
+ 22
+ 23
+ 24
+ 25 ; AND NOW YOU ARE READY !
+ 26 ; Click on [Main menu] -> [Project] -> [New] and create your own 8051 project ...
+ 27
+ 28
+ 29 ; !!! HAVE A GOOD LUCK WITH THIS IDE !!!
+ 30
+ 31 org 0
+ 32 sjmp $
+ 33 end
+ASSEMBLY COMPLETE, NO ERRORS FOUND, NO WARNINGS
+
+
+SYMBOL TABLE:
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED
+ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED
+ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED
+ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED
+ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED
+BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED
+CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED
+CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED
+CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED
+CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED
+CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED
+CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED
+CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED
+CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED
+CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED
+CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED
+CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED
+CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED
+CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED
+CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED
+CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED
+CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED
+CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED
+CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED
+CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED
+CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED
+EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED
+IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED
+KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED
+KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED
+P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED
+P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED
+P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED
+P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED
+P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED
+PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED
+TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED
+TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED \ No newline at end of file
diff --git a/demo/demo5.sim b/demo/demo5.sim
new file mode 100644
index 0000000..7f2a49c
--- /dev/null
+++ b/demo/demo5.sim
@@ -0,0 +1,2 @@
+7D9DA265AF8276820125E7E130CFFF37 12/21/07 demo4.asm
+32 0 128 254 \ No newline at end of file
diff --git a/demo/demo_c_0 b/demo/demo_c_0
new file mode 100644
index 0000000..671d577
--- /dev/null
+++ b/demo/demo_c_0
Binary files differ
diff --git a/demo/demo_c_0.adb b/demo/demo_c_0.adb
new file mode 100644
index 0000000..30be84d
--- /dev/null
+++ b/demo/demo_c_0.adb
@@ -0,0 +1,106 @@
+M:demo_c_0
+F:G$someFunction$0$0({2}DF,SV:S),C,0,0,0,0,0
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+S:G$some_variable$0$0({4}SL:U),E,0,0
+S:G$i$0$0({2}SI:S),E,0,0
+S:LsomeFunction$somevalue$1$1({1}SC:U),R,0,0,[r2]
+S:G$P0$0$0({1}SC:U),I,0,0
+S:G$SP$0$0({1}SC:U),I,0,0
+S:G$DPL$0$0({1}SC:U),I,0,0
+S:G$DPH$0$0({1}SC:U),I,0,0
+S:G$PCON$0$0({1}SC:U),I,0,0
+S:G$TCON$0$0({1}SC:U),I,0,0
+S:G$TMOD$0$0({1}SC:U),I,0,0
+S:G$TL0$0$0({1}SC:U),I,0,0
+S:G$TL1$0$0({1}SC:U),I,0,0
+S:G$TH0$0$0({1}SC:U),I,0,0
+S:G$TH1$0$0({1}SC:U),I,0,0
+S:G$P1$0$0({1}SC:U),I,0,0
+S:G$SCON$0$0({1}SC:U),I,0,0
+S:G$SBUF$0$0({1}SC:U),I,0,0
+S:G$P2$0$0({1}SC:U),I,0,0
+S:G$IE$0$0({1}SC:U),I,0,0
+S:G$P3$0$0({1}SC:U),I,0,0
+S:G$IP$0$0({1}SC:U),I,0,0
+S:G$PSW$0$0({1}SC:U),I,0,0
+S:G$ACC$0$0({1}SC:U),I,0,0
+S:G$A$0$0({1}SC:U),I,0,0
+S:G$B$0$0({1}SC:U),I,0,0
+S:G$P0_0$0$0({1}SX:U),J,0,0
+S:G$P0_1$0$0({1}SX:U),J,0,0
+S:G$P0_2$0$0({1}SX:U),J,0,0
+S:G$P0_3$0$0({1}SX:U),J,0,0
+S:G$P0_4$0$0({1}SX:U),J,0,0
+S:G$P0_5$0$0({1}SX:U),J,0,0
+S:G$P0_6$0$0({1}SX:U),J,0,0
+S:G$P0_7$0$0({1}SX:U),J,0,0
+S:G$IT0$0$0({1}SX:U),J,0,0
+S:G$IE0$0$0({1}SX:U),J,0,0
+S:G$IT1$0$0({1}SX:U),J,0,0
+S:G$IE1$0$0({1}SX:U),J,0,0
+S:G$TR0$0$0({1}SX:U),J,0,0
+S:G$TF0$0$0({1}SX:U),J,0,0
+S:G$TR1$0$0({1}SX:U),J,0,0
+S:G$TF1$0$0({1}SX:U),J,0,0
+S:G$P1_0$0$0({1}SX:U),J,0,0
+S:G$P1_1$0$0({1}SX:U),J,0,0
+S:G$P1_2$0$0({1}SX:U),J,0,0
+S:G$P1_3$0$0({1}SX:U),J,0,0
+S:G$P1_4$0$0({1}SX:U),J,0,0
+S:G$P1_5$0$0({1}SX:U),J,0,0
+S:G$P1_6$0$0({1}SX:U),J,0,0
+S:G$P1_7$0$0({1}SX:U),J,0,0
+S:G$RI$0$0({1}SX:U),J,0,0
+S:G$TI$0$0({1}SX:U),J,0,0
+S:G$RB8$0$0({1}SX:U),J,0,0
+S:G$TB8$0$0({1}SX:U),J,0,0
+S:G$REN$0$0({1}SX:U),J,0,0
+S:G$SM2$0$0({1}SX:U),J,0,0
+S:G$SM1$0$0({1}SX:U),J,0,0
+S:G$SM0$0$0({1}SX:U),J,0,0
+S:G$P2_0$0$0({1}SX:U),J,0,0
+S:G$P2_1$0$0({1}SX:U),J,0,0
+S:G$P2_2$0$0({1}SX:U),J,0,0
+S:G$P2_3$0$0({1}SX:U),J,0,0
+S:G$P2_4$0$0({1}SX:U),J,0,0
+S:G$P2_5$0$0({1}SX:U),J,0,0
+S:G$P2_6$0$0({1}SX:U),J,0,0
+S:G$P2_7$0$0({1}SX:U),J,0,0
+S:G$EX0$0$0({1}SX:U),J,0,0
+S:G$ET0$0$0({1}SX:U),J,0,0
+S:G$EX1$0$0({1}SX:U),J,0,0
+S:G$ET1$0$0({1}SX:U),J,0,0
+S:G$ES$0$0({1}SX:U),J,0,0
+S:G$EA$0$0({1}SX:U),J,0,0
+S:G$P3_0$0$0({1}SX:U),J,0,0
+S:G$P3_1$0$0({1}SX:U),J,0,0
+S:G$P3_2$0$0({1}SX:U),J,0,0
+S:G$P3_3$0$0({1}SX:U),J,0,0
+S:G$P3_4$0$0({1}SX:U),J,0,0
+S:G$P3_5$0$0({1}SX:U),J,0,0
+S:G$P3_6$0$0({1}SX:U),J,0,0
+S:G$P3_7$0$0({1}SX:U),J,0,0
+S:G$RXD$0$0({1}SX:U),J,0,0
+S:G$TXD$0$0({1}SX:U),J,0,0
+S:G$INT0$0$0({1}SX:U),J,0,0
+S:G$INT1$0$0({1}SX:U),J,0,0
+S:G$T0$0$0({1}SX:U),J,0,0
+S:G$T1$0$0({1}SX:U),J,0,0
+S:G$WR$0$0({1}SX:U),J,0,0
+S:G$RD$0$0({1}SX:U),J,0,0
+S:G$PX0$0$0({1}SX:U),J,0,0
+S:G$PT0$0$0({1}SX:U),J,0,0
+S:G$PX1$0$0({1}SX:U),J,0,0
+S:G$PT1$0$0({1}SX:U),J,0,0
+S:G$PS$0$0({1}SX:U),J,0,0
+S:G$P$0$0({1}SX:U),J,0,0
+S:G$FL$0$0({1}SX:U),J,0,0
+S:G$OV$0$0({1}SX:U),J,0,0
+S:G$RS0$0$0({1}SX:U),J,0,0
+S:G$RS1$0$0({1}SX:U),J,0,0
+S:G$F0$0$0({1}SX:U),J,0,0
+S:G$AC$0$0({1}SX:U),J,0,0
+S:G$CY$0$0({1}SX:U),J,0,0
+S:G$someFunction$0$0({2}DF,SV:S),C,0,0
+S:G$main$0$0({2}DF,SI:S),C,0,0
diff --git a/demo/demo_c_0.asm b/demo/demo_c_0.asm
new file mode 100644
index 0000000..8338791
--- /dev/null
+++ b/demo/demo_c_0.asm
@@ -0,0 +1,529 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+; This file was generated Tue Oct 27 23:03:10 2009
+;--------------------------------------------------------
+ .module demo_c_0
+ .optsdcc -mmcs51 --model-small
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _main
+ .globl _someFunction
+ .globl _CY
+ .globl _AC
+ .globl _F0
+ .globl _RS1
+ .globl _RS0
+ .globl _OV
+ .globl _FL
+ .globl _P
+ .globl _PS
+ .globl _PT1
+ .globl _PX1
+ .globl _PT0
+ .globl _PX0
+ .globl _RD
+ .globl _WR
+ .globl _T1
+ .globl _T0
+ .globl _INT1
+ .globl _INT0
+ .globl _TXD
+ .globl _RXD
+ .globl _P3_7
+ .globl _P3_6
+ .globl _P3_5
+ .globl _P3_4
+ .globl _P3_3
+ .globl _P3_2
+ .globl _P3_1
+ .globl _P3_0
+ .globl _EA
+ .globl _ES
+ .globl _ET1
+ .globl _EX1
+ .globl _ET0
+ .globl _EX0
+ .globl _P2_7
+ .globl _P2_6
+ .globl _P2_5
+ .globl _P2_4
+ .globl _P2_3
+ .globl _P2_2
+ .globl _P2_1
+ .globl _P2_0
+ .globl _SM0
+ .globl _SM1
+ .globl _SM2
+ .globl _REN
+ .globl _TB8
+ .globl _RB8
+ .globl _TI
+ .globl _RI
+ .globl _P1_7
+ .globl _P1_6
+ .globl _P1_5
+ .globl _P1_4
+ .globl _P1_3
+ .globl _P1_2
+ .globl _P1_1
+ .globl _P1_0
+ .globl _TF1
+ .globl _TR1
+ .globl _TF0
+ .globl _TR0
+ .globl _IE1
+ .globl _IT1
+ .globl _IE0
+ .globl _IT0
+ .globl _P0_7
+ .globl _P0_6
+ .globl _P0_5
+ .globl _P0_4
+ .globl _P0_3
+ .globl _P0_2
+ .globl _P0_1
+ .globl _P0_0
+ .globl _B
+ .globl _A
+ .globl _ACC
+ .globl _PSW
+ .globl _IP
+ .globl _P3
+ .globl _IE
+ .globl _P2
+ .globl _SBUF
+ .globl _SCON
+ .globl _P1
+ .globl _TH1
+ .globl _TH0
+ .globl _TL1
+ .globl _TL0
+ .globl _TMOD
+ .globl _TCON
+ .globl _PCON
+ .globl _DPH
+ .globl _DPL
+ .globl _SP
+ .globl _P0
+ .globl _i
+ .globl _some_variable
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+ .area RSEG (DATA)
+G$P0$0$0 == 0x0080
+_P0 = 0x0080
+G$SP$0$0 == 0x0081
+_SP = 0x0081
+G$DPL$0$0 == 0x0082
+_DPL = 0x0082
+G$DPH$0$0 == 0x0083
+_DPH = 0x0083
+G$PCON$0$0 == 0x0087
+_PCON = 0x0087
+G$TCON$0$0 == 0x0088
+_TCON = 0x0088
+G$TMOD$0$0 == 0x0089
+_TMOD = 0x0089
+G$TL0$0$0 == 0x008a
+_TL0 = 0x008a
+G$TL1$0$0 == 0x008b
+_TL1 = 0x008b
+G$TH0$0$0 == 0x008c
+_TH0 = 0x008c
+G$TH1$0$0 == 0x008d
+_TH1 = 0x008d
+G$P1$0$0 == 0x0090
+_P1 = 0x0090
+G$SCON$0$0 == 0x0098
+_SCON = 0x0098
+G$SBUF$0$0 == 0x0099
+_SBUF = 0x0099
+G$P2$0$0 == 0x00a0
+_P2 = 0x00a0
+G$IE$0$0 == 0x00a8
+_IE = 0x00a8
+G$P3$0$0 == 0x00b0
+_P3 = 0x00b0
+G$IP$0$0 == 0x00b8
+_IP = 0x00b8
+G$PSW$0$0 == 0x00d0
+_PSW = 0x00d0
+G$ACC$0$0 == 0x00e0
+_ACC = 0x00e0
+G$A$0$0 == 0x00e0
+_A = 0x00e0
+G$B$0$0 == 0x00f0
+_B = 0x00f0
+;--------------------------------------------------------
+; special function bits
+;--------------------------------------------------------
+ .area RSEG (DATA)
+G$P0_0$0$0 == 0x0080
+_P0_0 = 0x0080
+G$P0_1$0$0 == 0x0081
+_P0_1 = 0x0081
+G$P0_2$0$0 == 0x0082
+_P0_2 = 0x0082
+G$P0_3$0$0 == 0x0083
+_P0_3 = 0x0083
+G$P0_4$0$0 == 0x0084
+_P0_4 = 0x0084
+G$P0_5$0$0 == 0x0085
+_P0_5 = 0x0085
+G$P0_6$0$0 == 0x0086
+_P0_6 = 0x0086
+G$P0_7$0$0 == 0x0087
+_P0_7 = 0x0087
+G$IT0$0$0 == 0x0088
+_IT0 = 0x0088
+G$IE0$0$0 == 0x0089
+_IE0 = 0x0089
+G$IT1$0$0 == 0x008a
+_IT1 = 0x008a
+G$IE1$0$0 == 0x008b
+_IE1 = 0x008b
+G$TR0$0$0 == 0x008c
+_TR0 = 0x008c
+G$TF0$0$0 == 0x008d
+_TF0 = 0x008d
+G$TR1$0$0 == 0x008e
+_TR1 = 0x008e
+G$TF1$0$0 == 0x008f
+_TF1 = 0x008f
+G$P1_0$0$0 == 0x0090
+_P1_0 = 0x0090
+G$P1_1$0$0 == 0x0091
+_P1_1 = 0x0091
+G$P1_2$0$0 == 0x0092
+_P1_2 = 0x0092
+G$P1_3$0$0 == 0x0093
+_P1_3 = 0x0093
+G$P1_4$0$0 == 0x0094
+_P1_4 = 0x0094
+G$P1_5$0$0 == 0x0095
+_P1_5 = 0x0095
+G$P1_6$0$0 == 0x0096
+_P1_6 = 0x0096
+G$P1_7$0$0 == 0x0097
+_P1_7 = 0x0097
+G$RI$0$0 == 0x0098
+_RI = 0x0098
+G$TI$0$0 == 0x0099
+_TI = 0x0099
+G$RB8$0$0 == 0x009a
+_RB8 = 0x009a
+G$TB8$0$0 == 0x009b
+_TB8 = 0x009b
+G$REN$0$0 == 0x009c
+_REN = 0x009c
+G$SM2$0$0 == 0x009d
+_SM2 = 0x009d
+G$SM1$0$0 == 0x009e
+_SM1 = 0x009e
+G$SM0$0$0 == 0x009f
+_SM0 = 0x009f
+G$P2_0$0$0 == 0x00a0
+_P2_0 = 0x00a0
+G$P2_1$0$0 == 0x00a1
+_P2_1 = 0x00a1
+G$P2_2$0$0 == 0x00a2
+_P2_2 = 0x00a2
+G$P2_3$0$0 == 0x00a3
+_P2_3 = 0x00a3
+G$P2_4$0$0 == 0x00a4
+_P2_4 = 0x00a4
+G$P2_5$0$0 == 0x00a5
+_P2_5 = 0x00a5
+G$P2_6$0$0 == 0x00a6
+_P2_6 = 0x00a6
+G$P2_7$0$0 == 0x00a7
+_P2_7 = 0x00a7
+G$EX0$0$0 == 0x00a8
+_EX0 = 0x00a8
+G$ET0$0$0 == 0x00a9
+_ET0 = 0x00a9
+G$EX1$0$0 == 0x00aa
+_EX1 = 0x00aa
+G$ET1$0$0 == 0x00ab
+_ET1 = 0x00ab
+G$ES$0$0 == 0x00ac
+_ES = 0x00ac
+G$EA$0$0 == 0x00af
+_EA = 0x00af
+G$P3_0$0$0 == 0x00b0
+_P3_0 = 0x00b0
+G$P3_1$0$0 == 0x00b1
+_P3_1 = 0x00b1
+G$P3_2$0$0 == 0x00b2
+_P3_2 = 0x00b2
+G$P3_3$0$0 == 0x00b3
+_P3_3 = 0x00b3
+G$P3_4$0$0 == 0x00b4
+_P3_4 = 0x00b4
+G$P3_5$0$0 == 0x00b5
+_P3_5 = 0x00b5
+G$P3_6$0$0 == 0x00b6
+_P3_6 = 0x00b6
+G$P3_7$0$0 == 0x00b7
+_P3_7 = 0x00b7
+G$RXD$0$0 == 0x00b0
+_RXD = 0x00b0
+G$TXD$0$0 == 0x00b1
+_TXD = 0x00b1
+G$INT0$0$0 == 0x00b2
+_INT0 = 0x00b2
+G$INT1$0$0 == 0x00b3
+_INT1 = 0x00b3
+G$T0$0$0 == 0x00b4
+_T0 = 0x00b4
+G$T1$0$0 == 0x00b5
+_T1 = 0x00b5
+G$WR$0$0 == 0x00b6
+_WR = 0x00b6
+G$RD$0$0 == 0x00b7
+_RD = 0x00b7
+G$PX0$0$0 == 0x00b8
+_PX0 = 0x00b8
+G$PT0$0$0 == 0x00b9
+_PT0 = 0x00b9
+G$PX1$0$0 == 0x00ba
+_PX1 = 0x00ba
+G$PT1$0$0 == 0x00bb
+_PT1 = 0x00bb
+G$PS$0$0 == 0x00bc
+_PS = 0x00bc
+G$P$0$0 == 0x00d0
+_P = 0x00d0
+G$FL$0$0 == 0x00d1
+_FL = 0x00d1
+G$OV$0$0 == 0x00d2
+_OV = 0x00d2
+G$RS0$0$0 == 0x00d3
+_RS0 = 0x00d3
+G$RS1$0$0 == 0x00d4
+_RS1 = 0x00d4
+G$F0$0$0 == 0x00d5
+_F0 = 0x00d5
+G$AC$0$0 == 0x00d6
+_AC = 0x00d6
+G$CY$0$0 == 0x00d7
+_CY = 0x00d7
+;--------------------------------------------------------
+; overlayable register banks
+;--------------------------------------------------------
+ .area REG_BANK_0 (REL,OVR,DATA)
+ .ds 8
+;--------------------------------------------------------
+; internal ram data
+;--------------------------------------------------------
+ .area DSEG (DATA)
+G$some_variable$0$0==.
+_some_variable::
+ .ds 4
+G$i$0$0==.
+_i::
+ .ds 2
+;--------------------------------------------------------
+; overlayable items in internal ram
+;--------------------------------------------------------
+ .area OSEG (OVR,DATA)
+;--------------------------------------------------------
+; Stack segment in internal ram
+;--------------------------------------------------------
+ .area SSEG (DATA)
+__start__stack:
+ .ds 1
+
+;--------------------------------------------------------
+; indirectly addressable internal ram data
+;--------------------------------------------------------
+ .area ISEG (DATA)
+;--------------------------------------------------------
+; absolute internal ram data
+;--------------------------------------------------------
+ .area IABS (ABS,DATA)
+ .area IABS (ABS,DATA)
+;--------------------------------------------------------
+; bit data
+;--------------------------------------------------------
+ .area BSEG (BIT)
+;--------------------------------------------------------
+; paged external ram data
+;--------------------------------------------------------
+ .area PSEG (PAG,XDATA)
+;--------------------------------------------------------
+; external ram data
+;--------------------------------------------------------
+ .area XSEG (XDATA)
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area XABS (ABS,XDATA)
+;--------------------------------------------------------
+; external initialized ram data
+;--------------------------------------------------------
+ .area XISEG (XDATA)
+ .area HOME (CODE)
+ .area GSINIT0 (CODE)
+ .area GSINIT1 (CODE)
+ .area GSINIT2 (CODE)
+ .area GSINIT3 (CODE)
+ .area GSINIT4 (CODE)
+ .area GSINIT5 (CODE)
+ .area GSINIT (CODE)
+ .area GSFINAL (CODE)
+ .area CSEG (CODE)
+;--------------------------------------------------------
+; interrupt vector
+;--------------------------------------------------------
+ .area HOME (CODE)
+__interrupt_vect:
+ ljmp __sdcc_gsinit_startup
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME (CODE)
+ .area GSINIT (CODE)
+ .area GSFINAL (CODE)
+ .area GSINIT (CODE)
+ .globl __sdcc_gsinit_startup
+ .globl __sdcc_program_startup
+ .globl __start__stack
+ .globl __mcs51_genXINIT
+ .globl __mcs51_genXRAMCLEAR
+ .globl __mcs51_genRAMCLEAR
+ G$main$0$0 ==.
+ C$demo_c_0.c$10$1$1 ==.
+; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here
+ clr a
+ mov _some_variable,a
+ mov (_some_variable + 1),a
+ mov (_some_variable + 2),a
+ mov (_some_variable + 3),a
+ .area GSFINAL (CODE)
+ ljmp __sdcc_program_startup
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME (CODE)
+ .area HOME (CODE)
+__sdcc_program_startup:
+ lcall _main
+; return from main will lock up
+ sjmp .
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CSEG (CODE)
+;------------------------------------------------------------
+;Allocation info for local variables in function 'someFunction'
+;------------------------------------------------------------
+;somevalue Allocated to registers r2
+;------------------------------------------------------------
+ G$someFunction$0$0 ==.
+ C$demo_c_0.c$20$0$0 ==.
+; demo_c_0.c:20: void someFunction(unsigned char somevalue)
+; -----------------------------------------
+; function someFunction
+; -----------------------------------------
+_someFunction:
+ ar2 = 0x02
+ ar3 = 0x03
+ ar4 = 0x04
+ ar5 = 0x05
+ ar6 = 0x06
+ ar7 = 0x07
+ ar0 = 0x00
+ ar1 = 0x01
+ mov r2,dpl
+ C$demo_c_0.c$23$1$1 ==.
+; demo_c_0.c:23: P1=somevalue;
+ mov _P1,r2
+ C$demo_c_0.c$24$1$1 ==.
+; demo_c_0.c:24: P3=somevalue^0xFF;
+ mov a,#0xFF
+ xrl a,r2
+ mov _P3,a
+ C$demo_c_0.c$25$1$1 ==.
+ XG$someFunction$0$0 ==.
+ ret
+;------------------------------------------------------------
+;Allocation info for local variables in function 'main'
+;------------------------------------------------------------
+;------------------------------------------------------------
+ G$main$0$0 ==.
+ C$demo_c_0.c$28$1$1 ==.
+; demo_c_0.c:28: int main()
+; -----------------------------------------
+; function main
+; -----------------------------------------
+_main:
+ C$demo_c_0.c$31$1$1 ==.
+; demo_c_0.c:31: while(1) {
+00102$:
+ C$demo_c_0.c$32$2$2 ==.
+; demo_c_0.c:32: for(i=0; i<255; i++) {
+ clr a
+ mov _i,a
+ mov (_i + 1),a
+00104$:
+ clr c
+ mov a,_i
+ subb a,#0xFF
+ mov a,(_i + 1)
+ xrl a,#0x80
+ subb a,#0x80
+ jnc 00107$
+ C$demo_c_0.c$33$3$3 ==.
+; demo_c_0.c:33: someFunction(i+2);
+ mov r2,_i
+ mov a,#0x02
+ add a,r2
+ mov dpl,a
+ lcall _someFunction
+ C$demo_c_0.c$34$3$3 ==.
+; demo_c_0.c:34: some_variable++;
+ inc _some_variable
+ clr a
+ cjne a,_some_variable,00114$
+ inc (_some_variable + 1)
+ cjne a,(_some_variable + 1),00114$
+ inc (_some_variable + 2)
+ cjne a,(_some_variable + 2),00114$
+ inc (_some_variable + 3)
+00114$:
+ C$demo_c_0.c$32$2$2 ==.
+; demo_c_0.c:32: for(i=0; i<255; i++) {
+ inc _i
+ clr a
+ cjne a,_i,00104$
+ inc (_i + 1)
+ sjmp 00104$
+00107$:
+ C$demo_c_0.c$36$2$2 ==.
+; demo_c_0.c:36: some_variable-=22;
+ mov a,_some_variable
+ add a,#0xea
+ mov _some_variable,a
+ mov a,(_some_variable + 1)
+ addc a,#0xff
+ mov (_some_variable + 1),a
+ mov a,(_some_variable + 2)
+ addc a,#0xff
+ mov (_some_variable + 2),a
+ mov a,(_some_variable + 3)
+ addc a,#0xff
+ mov (_some_variable + 3),a
+ C$demo_c_0.c$40$1$1 ==.
+; demo_c_0.c:40: return 0;
+ C$demo_c_0.c$41$1$1 ==.
+ XG$main$0$0 ==.
+ sjmp 00102$
+ .area CSEG (CODE)
+ .area CONST (CODE)
+ .area XINIT (CODE)
+ .area CABS (ABS,CODE)
diff --git a/demo/demo_c_0.c b/demo/demo_c_0.c
new file mode 100644
index 0000000..9655334
--- /dev/null
+++ b/demo/demo_c_0.c
@@ -0,0 +1,41 @@
+/**
+ * Very very simple demonstration code written in C language
+ * @file demo_c_0.c
+ */
+
+// This file defines registers avaliable in AT89x51 MCUs
+// See /usr/share/sdcc/include/mcs51/ for alternatives
+#include <at89x51.h>
+
+unsigned long some_variable=0; ///< Documentation for this variable comes here
+int i; ///< General purpose interator
+
+/**
+ * These lines are a doxygen documentation for this function
+ * See doxygen manual for more details (http://www.stack.nl/~dimitri/doxygen/manual.html)
+ * Note: Try to click on the 1st line of the function declaration and then press Ctrl+E
+ * <b style="color: #FF0000">Some bold text</b>
+ * @param somevalue Some agrument
+ */
+void someFunction(unsigned char somevalue)
+{
+ // P1 and P3 are variables defined in "at89x51.h"
+ P1=somevalue;
+ P3=somevalue^0xFF;
+}
+
+/** Main loop */
+int main()
+{
+ // Infinite loop
+ while(1) {
+ for(i=0; i<255; i++) {
+ someFunction(i+2);
+ some_variable++;
+ }
+ some_variable-=22;
+ }
+
+ // Report success
+ return 0;
+}
diff --git a/demo/demo_c_0.cdb b/demo/demo_c_0.cdb
new file mode 100644
index 0000000..8886635
--- /dev/null
+++ b/demo/demo_c_0.cdb
@@ -0,0 +1,278 @@
+M:demo_c_0
+F:G$someFunction$0$0({2}DF,SV:S),C,0,0,0,0,0
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+S:G$some_variable$0$0({4}SL:U),E,0,0
+S:G$i$0$0({2}SI:S),E,0,0
+S:LsomeFunction$somevalue$1$1({1}SC:U),R,0,0,[r2]
+S:G$P0$0$0({1}SC:U),I,0,0
+S:G$SP$0$0({1}SC:U),I,0,0
+S:G$DPL$0$0({1}SC:U),I,0,0
+S:G$DPH$0$0({1}SC:U),I,0,0
+S:G$PCON$0$0({1}SC:U),I,0,0
+S:G$TCON$0$0({1}SC:U),I,0,0
+S:G$TMOD$0$0({1}SC:U),I,0,0
+S:G$TL0$0$0({1}SC:U),I,0,0
+S:G$TL1$0$0({1}SC:U),I,0,0
+S:G$TH0$0$0({1}SC:U),I,0,0
+S:G$TH1$0$0({1}SC:U),I,0,0
+S:G$P1$0$0({1}SC:U),I,0,0
+S:G$SCON$0$0({1}SC:U),I,0,0
+S:G$SBUF$0$0({1}SC:U),I,0,0
+S:G$P2$0$0({1}SC:U),I,0,0
+S:G$IE$0$0({1}SC:U),I,0,0
+S:G$P3$0$0({1}SC:U),I,0,0
+S:G$IP$0$0({1}SC:U),I,0,0
+S:G$PSW$0$0({1}SC:U),I,0,0
+S:G$ACC$0$0({1}SC:U),I,0,0
+S:G$A$0$0({1}SC:U),I,0,0
+S:G$B$0$0({1}SC:U),I,0,0
+S:G$P0_0$0$0({1}SX:U),J,0,0
+S:G$P0_1$0$0({1}SX:U),J,0,0
+S:G$P0_2$0$0({1}SX:U),J,0,0
+S:G$P0_3$0$0({1}SX:U),J,0,0
+S:G$P0_4$0$0({1}SX:U),J,0,0
+S:G$P0_5$0$0({1}SX:U),J,0,0
+S:G$P0_6$0$0({1}SX:U),J,0,0
+S:G$P0_7$0$0({1}SX:U),J,0,0
+S:G$IT0$0$0({1}SX:U),J,0,0
+S:G$IE0$0$0({1}SX:U),J,0,0
+S:G$IT1$0$0({1}SX:U),J,0,0
+S:G$IE1$0$0({1}SX:U),J,0,0
+S:G$TR0$0$0({1}SX:U),J,0,0
+S:G$TF0$0$0({1}SX:U),J,0,0
+S:G$TR1$0$0({1}SX:U),J,0,0
+S:G$TF1$0$0({1}SX:U),J,0,0
+S:G$P1_0$0$0({1}SX:U),J,0,0
+S:G$P1_1$0$0({1}SX:U),J,0,0
+S:G$P1_2$0$0({1}SX:U),J,0,0
+S:G$P1_3$0$0({1}SX:U),J,0,0
+S:G$P1_4$0$0({1}SX:U),J,0,0
+S:G$P1_5$0$0({1}SX:U),J,0,0
+S:G$P1_6$0$0({1}SX:U),J,0,0
+S:G$P1_7$0$0({1}SX:U),J,0,0
+S:G$RI$0$0({1}SX:U),J,0,0
+S:G$TI$0$0({1}SX:U),J,0,0
+S:G$RB8$0$0({1}SX:U),J,0,0
+S:G$TB8$0$0({1}SX:U),J,0,0
+S:G$REN$0$0({1}SX:U),J,0,0
+S:G$SM2$0$0({1}SX:U),J,0,0
+S:G$SM1$0$0({1}SX:U),J,0,0
+S:G$SM0$0$0({1}SX:U),J,0,0
+S:G$P2_0$0$0({1}SX:U),J,0,0
+S:G$P2_1$0$0({1}SX:U),J,0,0
+S:G$P2_2$0$0({1}SX:U),J,0,0
+S:G$P2_3$0$0({1}SX:U),J,0,0
+S:G$P2_4$0$0({1}SX:U),J,0,0
+S:G$P2_5$0$0({1}SX:U),J,0,0
+S:G$P2_6$0$0({1}SX:U),J,0,0
+S:G$P2_7$0$0({1}SX:U),J,0,0
+S:G$EX0$0$0({1}SX:U),J,0,0
+S:G$ET0$0$0({1}SX:U),J,0,0
+S:G$EX1$0$0({1}SX:U),J,0,0
+S:G$ET1$0$0({1}SX:U),J,0,0
+S:G$ES$0$0({1}SX:U),J,0,0
+S:G$EA$0$0({1}SX:U),J,0,0
+S:G$P3_0$0$0({1}SX:U),J,0,0
+S:G$P3_1$0$0({1}SX:U),J,0,0
+S:G$P3_2$0$0({1}SX:U),J,0,0
+S:G$P3_3$0$0({1}SX:U),J,0,0
+S:G$P3_4$0$0({1}SX:U),J,0,0
+S:G$P3_5$0$0({1}SX:U),J,0,0
+S:G$P3_6$0$0({1}SX:U),J,0,0
+S:G$P3_7$0$0({1}SX:U),J,0,0
+S:G$RXD$0$0({1}SX:U),J,0,0
+S:G$TXD$0$0({1}SX:U),J,0,0
+S:G$INT0$0$0({1}SX:U),J,0,0
+S:G$INT1$0$0({1}SX:U),J,0,0
+S:G$T0$0$0({1}SX:U),J,0,0
+S:G$T1$0$0({1}SX:U),J,0,0
+S:G$WR$0$0({1}SX:U),J,0,0
+S:G$RD$0$0({1}SX:U),J,0,0
+S:G$PX0$0$0({1}SX:U),J,0,0
+S:G$PT0$0$0({1}SX:U),J,0,0
+S:G$PX1$0$0({1}SX:U),J,0,0
+S:G$PT1$0$0({1}SX:U),J,0,0
+S:G$PS$0$0({1}SX:U),J,0,0
+S:G$P$0$0({1}SX:U),J,0,0
+S:G$FL$0$0({1}SX:U),J,0,0
+S:G$OV$0$0({1}SX:U),J,0,0
+S:G$RS0$0$0({1}SX:U),J,0,0
+S:G$RS1$0$0({1}SX:U),J,0,0
+S:G$F0$0$0({1}SX:U),J,0,0
+S:G$AC$0$0({1}SX:U),J,0,0
+S:G$CY$0$0({1}SX:U),J,0,0
+S:G$someFunction$0$0({2}DF,SV:S),C,0,0
+S:G$main$0$0({2}DF,SI:S),C,0,0
+L:G$P0$0$0:80
+L:G$P0_0$0$0:80
+L:G$P0_1$0$0:81
+L:G$SP$0$0:81
+L:G$DPL$0$0:82
+L:G$P0_2$0$0:82
+L:G$DPH$0$0:83
+L:G$P0_3$0$0:83
+L:G$P0_4$0$0:84
+L:G$P0_5$0$0:85
+L:G$P0_6$0$0:86
+L:G$P0_7$0$0:87
+L:G$PCON$0$0:87
+L:G$IT0$0$0:88
+L:G$TCON$0$0:88
+L:G$IE0$0$0:89
+L:G$TMOD$0$0:89
+L:G$IT1$0$0:8A
+L:G$TL0$0$0:8A
+L:G$IE1$0$0:8B
+L:G$TL1$0$0:8B
+L:G$TH0$0$0:8C
+L:G$TR0$0$0:8C
+L:G$TF0$0$0:8D
+L:G$TH1$0$0:8D
+L:G$TR1$0$0:8E
+L:G$TF1$0$0:8F
+L:G$P1$0$0:90
+L:G$P1_0$0$0:90
+L:G$P1_1$0$0:91
+L:G$P1_2$0$0:92
+L:G$P1_3$0$0:93
+L:G$P1_4$0$0:94
+L:G$P1_5$0$0:95
+L:G$P1_6$0$0:96
+L:G$P1_7$0$0:97
+L:G$RI$0$0:98
+L:G$SCON$0$0:98
+L:G$SBUF$0$0:99
+L:G$TI$0$0:99
+L:G$RB8$0$0:9A
+L:G$TB8$0$0:9B
+L:G$REN$0$0:9C
+L:G$SM2$0$0:9D
+L:G$SM1$0$0:9E
+L:G$SM0$0$0:9F
+L:G$P2$0$0:A0
+L:G$P2_0$0$0:A0
+L:G$P2_1$0$0:A1
+L:G$P2_2$0$0:A2
+L:G$P2_3$0$0:A3
+L:G$P2_4$0$0:A4
+L:G$P2_5$0$0:A5
+L:G$P2_6$0$0:A6
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+L:G$IE$0$0:A8
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+L:G$EX1$0$0:AA
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+L:G$ES$0$0:AC
+L:G$EA$0$0:AF
+L:G$P3$0$0:B0
+L:G$P3_0$0$0:B0
+L:G$RXD$0$0:B0
+L:G$P3_1$0$0:B1
+L:G$TXD$0$0:B1
+L:G$INT0$0$0:B2
+L:G$P3_2$0$0:B2
+L:G$INT1$0$0:B3
+L:G$P3_3$0$0:B3
+L:G$P3_4$0$0:B4
+L:G$T0$0$0:B4
+L:G$P3_5$0$0:B5
+L:G$T1$0$0:B5
+L:G$P3_6$0$0:B6
+L:G$WR$0$0:B6
+L:G$P3_7$0$0:B7
+L:G$RD$0$0:B7
+L:G$IP$0$0:B8
+L:G$PX0$0$0:B8
+L:G$PT0$0$0:B9
+L:G$PX1$0$0:BA
+L:G$PT1$0$0:BB
+L:G$PS$0$0:BC
+L:G$P$0$0:D0
+L:G$PSW$0$0:D0
+L:G$FL$0$0:D1
+L:G$OV$0$0:D2
+L:G$RS0$0$0:D3
+L:G$RS1$0$0:D4
+L:G$F0$0$0:D5
+L:G$AC$0$0:D6
+L:G$CY$0$0:D7
+L:G$A$0$0:E0
+L:G$ACC$0$0:E0
+L:G$B$0$0:F0
+L:G$some_variable$0$0:8
+L:G$i$0$0:C
+L:A$demo_c_0$385:0
+L:A$demo_c_0$415:3
+L:A$demo_c_0$417:6
+L:A$demo_c_0$402:61
+L:C$demo_c_0.c$10$1$1:61
+L:A$demo_c_0$403:62
+L:A$demo_c_0$404:64
+L:A$demo_c_0$405:66
+L:A$demo_c_0$406:68
+L:A$demo_c_0$408:6A
+L:A$demo_c_0$442:6D
+L:C$demo_c_0.c$20$0$0:6D
+L:G$someFunction$0$0:6D
+L:A$demo_c_0$445:6F
+L:C$demo_c_0.c$23$1$1:6F
+L:A$demo_c_0$448:71
+L:C$demo_c_0.c$24$1$1:71
+L:A$demo_c_0$449:73
+L:A$demo_c_0$450:74
+L:A$demo_c_0$453:76
+L:C$demo_c_0.c$25$1$1:76
+L:XG$someFunction$0$0:76
+L:A$demo_c_0$470:77
+L:C$demo_c_0.c$28$1$1:77
+L:C$demo_c_0.c$31$1$1:77
+L:G$main$0$0:77
+L:A$demo_c_0$471:78
+L:A$demo_c_0$472:7A
+L:A$demo_c_0$474:7C
+L:A$demo_c_0$475:7D
+L:A$demo_c_0$476:7F
+L:A$demo_c_0$477:81
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+L:A$demo_c_0$479:85
+L:A$demo_c_0$480:87
+L:A$demo_c_0$483:89
+L:C$demo_c_0.c$33$3$3:89
+L:A$demo_c_0$484:8B
+L:A$demo_c_0$485:8D
+L:A$demo_c_0$486:8E
+L:A$demo_c_0$487:90
+L:A$demo_c_0$490:93
+L:C$demo_c_0.c$34$3$3:93
+L:A$demo_c_0$491:95
+L:A$demo_c_0$492:96
+L:A$demo_c_0$493:99
+L:A$demo_c_0$494:9B
+L:A$demo_c_0$495:9E
+L:A$demo_c_0$496:A0
+L:A$demo_c_0$497:A3
+L:A$demo_c_0$501:A5
+L:C$demo_c_0.c$32$2$2:A5
+L:A$demo_c_0$502:A7
+L:A$demo_c_0$503:A8
+L:A$demo_c_0$504:AB
+L:A$demo_c_0$505:AD
+L:A$demo_c_0$509:AF
+L:C$demo_c_0.c$36$2$2:AF
+L:A$demo_c_0$510:B1
+L:A$demo_c_0$511:B3
+L:A$demo_c_0$512:B5
+L:A$demo_c_0$513:B7
+L:A$demo_c_0$514:B9
+L:A$demo_c_0$515:BB
+L:A$demo_c_0$516:BD
+L:A$demo_c_0$517:BF
+L:A$demo_c_0$518:C1
+L:A$demo_c_0$519:C3
+L:A$demo_c_0$520:C5
+L:A$demo_c_0$525:C7
+L:C$demo_c_0.c$40$1$1:C7
+L:C$demo_c_0.c$41$1$1:C7
+L:XG$main$0$0:C7
diff --git a/demo/demo_c_0.hashes b/demo/demo_c_0.hashes
new file mode 100644
index 0000000..aa19cb5
--- /dev/null
+++ b/demo/demo_c_0.hashes
@@ -0,0 +1 @@
+79C98C5ADE29831807D59F6BC438063A "demo_c_0.c"
diff --git a/demo/demo_c_0.hex b/demo/demo_c_0.hex
new file mode 100644
index 0000000..6160cd7
--- /dev/null
+++ b/demo/demo_c_0.hex
@@ -0,0 +1,34 @@
+:03000000020008F3
+:06006100E4F508F509F5C5
+:030067000AF50B8C
+:03006A000200038E
+:0500030012007780FEF1
+:0A006D00AA828A9074FF6AF5B0229F
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+:0B008600805026AA0C74022AF582129A
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+:0300080075810DF2
+:0A000B001200C9E582600302000341
+:0400C900758200221A
+:00000001FF
diff --git a/demo/demo_c_0.ihx b/demo/demo_c_0.ihx
new file mode 100644
index 0000000..6160cd7
--- /dev/null
+++ b/demo/demo_c_0.ihx
@@ -0,0 +1,34 @@
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+:0B00560000900000E4F0A3D8FCD9FAF1
+:0300080075810DF2
+:0A000B001200C9E582600302000341
+:0400C900758200221A
+:00000001FF
diff --git a/demo/demo_c_0.lnk b/demo/demo_c_0.lnk
new file mode 100644
index 0000000..4e51a94
--- /dev/null
+++ b/demo/demo_c_0.lnk
@@ -0,0 +1,19 @@
+-myuxi
+-Y
+-a 0x0100
+-v 0x0000
+-w 0x0800
+-z
+-b HOME = 0x0000
+-b ISEG = 0x0000
+-b BSEG = 0x0000
+-k /usr/libexec/sdcc/../share/sdcc/lib/small
+-k /usr/share/sdcc/lib/small
+-l mcs51
+-l libsdcc
+-l libint
+-l liblong
+-l libfloat
+demo_c_0.rel
+
+-e
diff --git a/demo/demo_c_0.lst b/demo/demo_c_0.lst
new file mode 100644
index 0000000..ec4c901
--- /dev/null
+++ b/demo/demo_c_0.lst
@@ -0,0 +1,529 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ANSI-C Compiler
+ 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+ 4 ; This file was generated Tue Oct 27 23:03:10 2009
+ 5 ;--------------------------------------------------------
+ 6 .module demo_c_0
+ 7 .optsdcc -mmcs51 --model-small
+ 8
+ 9 ;--------------------------------------------------------
+ 10 ; Public variables in this module
+ 11 ;--------------------------------------------------------
+ 12 .globl _main
+ 13 .globl _someFunction
+ 14 .globl _CY
+ 15 .globl _AC
+ 16 .globl _F0
+ 17 .globl _RS1
+ 18 .globl _RS0
+ 19 .globl _OV
+ 20 .globl _FL
+ 21 .globl _P
+ 22 .globl _PS
+ 23 .globl _PT1
+ 24 .globl _PX1
+ 25 .globl _PT0
+ 26 .globl _PX0
+ 27 .globl _RD
+ 28 .globl _WR
+ 29 .globl _T1
+ 30 .globl _T0
+ 31 .globl _INT1
+ 32 .globl _INT0
+ 33 .globl _TXD
+ 34 .globl _RXD
+ 35 .globl _P3_7
+ 36 .globl _P3_6
+ 37 .globl _P3_5
+ 38 .globl _P3_4
+ 39 .globl _P3_3
+ 40 .globl _P3_2
+ 41 .globl _P3_1
+ 42 .globl _P3_0
+ 43 .globl _EA
+ 44 .globl _ES
+ 45 .globl _ET1
+ 46 .globl _EX1
+ 47 .globl _ET0
+ 48 .globl _EX0
+ 49 .globl _P2_7
+ 50 .globl _P2_6
+ 51 .globl _P2_5
+ 52 .globl _P2_4
+ 53 .globl _P2_3
+ 54 .globl _P2_2
+ 55 .globl _P2_1
+ 56 .globl _P2_0
+ 57 .globl _SM0
+ 58 .globl _SM1
+ 59 .globl _SM2
+ 60 .globl _REN
+ 61 .globl _TB8
+ 62 .globl _RB8
+ 63 .globl _TI
+ 64 .globl _RI
+ 65 .globl _P1_7
+ 66 .globl _P1_6
+ 67 .globl _P1_5
+ 68 .globl _P1_4
+ 69 .globl _P1_3
+ 70 .globl _P1_2
+ 71 .globl _P1_1
+ 72 .globl _P1_0
+ 73 .globl _TF1
+ 74 .globl _TR1
+ 75 .globl _TF0
+ 76 .globl _TR0
+ 77 .globl _IE1
+ 78 .globl _IT1
+ 79 .globl _IE0
+ 80 .globl _IT0
+ 81 .globl _P0_7
+ 82 .globl _P0_6
+ 83 .globl _P0_5
+ 84 .globl _P0_4
+ 85 .globl _P0_3
+ 86 .globl _P0_2
+ 87 .globl _P0_1
+ 88 .globl _P0_0
+ 89 .globl _B
+ 90 .globl _A
+ 91 .globl _ACC
+ 92 .globl _PSW
+ 93 .globl _IP
+ 94 .globl _P3
+ 95 .globl _IE
+ 96 .globl _P2
+ 97 .globl _SBUF
+ 98 .globl _SCON
+ 99 .globl _P1
+ 100 .globl _TH1
+ 101 .globl _TH0
+ 102 .globl _TL1
+ 103 .globl _TL0
+ 104 .globl _TMOD
+ 105 .globl _TCON
+ 106 .globl _PCON
+ 107 .globl _DPH
+ 108 .globl _DPL
+ 109 .globl _SP
+ 110 .globl _P0
+ 111 .globl _i
+ 112 .globl _some_variable
+ 113 ;--------------------------------------------------------
+ 114 ; special function registers
+ 115 ;--------------------------------------------------------
+ 116 .area RSEG (DATA)
+ 0080 117 G$P0$0$0 == 0x0080
+ 0080 118 _P0 = 0x0080
+ 0081 119 G$SP$0$0 == 0x0081
+ 0081 120 _SP = 0x0081
+ 0082 121 G$DPL$0$0 == 0x0082
+ 0082 122 _DPL = 0x0082
+ 0083 123 G$DPH$0$0 == 0x0083
+ 0083 124 _DPH = 0x0083
+ 0087 125 G$PCON$0$0 == 0x0087
+ 0087 126 _PCON = 0x0087
+ 0088 127 G$TCON$0$0 == 0x0088
+ 0088 128 _TCON = 0x0088
+ 0089 129 G$TMOD$0$0 == 0x0089
+ 0089 130 _TMOD = 0x0089
+ 008A 131 G$TL0$0$0 == 0x008a
+ 008A 132 _TL0 = 0x008a
+ 008B 133 G$TL1$0$0 == 0x008b
+ 008B 134 _TL1 = 0x008b
+ 008C 135 G$TH0$0$0 == 0x008c
+ 008C 136 _TH0 = 0x008c
+ 008D 137 G$TH1$0$0 == 0x008d
+ 008D 138 _TH1 = 0x008d
+ 0090 139 G$P1$0$0 == 0x0090
+ 0090 140 _P1 = 0x0090
+ 0098 141 G$SCON$0$0 == 0x0098
+ 0098 142 _SCON = 0x0098
+ 0099 143 G$SBUF$0$0 == 0x0099
+ 0099 144 _SBUF = 0x0099
+ 00A0 145 G$P2$0$0 == 0x00a0
+ 00A0 146 _P2 = 0x00a0
+ 00A8 147 G$IE$0$0 == 0x00a8
+ 00A8 148 _IE = 0x00a8
+ 00B0 149 G$P3$0$0 == 0x00b0
+ 00B0 150 _P3 = 0x00b0
+ 00B8 151 G$IP$0$0 == 0x00b8
+ 00B8 152 _IP = 0x00b8
+ 00D0 153 G$PSW$0$0 == 0x00d0
+ 00D0 154 _PSW = 0x00d0
+ 00E0 155 G$ACC$0$0 == 0x00e0
+ 00E0 156 _ACC = 0x00e0
+ 00E0 157 G$A$0$0 == 0x00e0
+ 00E0 158 _A = 0x00e0
+ 00F0 159 G$B$0$0 == 0x00f0
+ 00F0 160 _B = 0x00f0
+ 161 ;--------------------------------------------------------
+ 162 ; special function bits
+ 163 ;--------------------------------------------------------
+ 164 .area RSEG (DATA)
+ 0080 165 G$P0_0$0$0 == 0x0080
+ 0080 166 _P0_0 = 0x0080
+ 0081 167 G$P0_1$0$0 == 0x0081
+ 0081 168 _P0_1 = 0x0081
+ 0082 169 G$P0_2$0$0 == 0x0082
+ 0082 170 _P0_2 = 0x0082
+ 0083 171 G$P0_3$0$0 == 0x0083
+ 0083 172 _P0_3 = 0x0083
+ 0084 173 G$P0_4$0$0 == 0x0084
+ 0084 174 _P0_4 = 0x0084
+ 0085 175 G$P0_5$0$0 == 0x0085
+ 0085 176 _P0_5 = 0x0085
+ 0086 177 G$P0_6$0$0 == 0x0086
+ 0086 178 _P0_6 = 0x0086
+ 0087 179 G$P0_7$0$0 == 0x0087
+ 0087 180 _P0_7 = 0x0087
+ 0088 181 G$IT0$0$0 == 0x0088
+ 0088 182 _IT0 = 0x0088
+ 0089 183 G$IE0$0$0 == 0x0089
+ 0089 184 _IE0 = 0x0089
+ 008A 185 G$IT1$0$0 == 0x008a
+ 008A 186 _IT1 = 0x008a
+ 008B 187 G$IE1$0$0 == 0x008b
+ 008B 188 _IE1 = 0x008b
+ 008C 189 G$TR0$0$0 == 0x008c
+ 008C 190 _TR0 = 0x008c
+ 008D 191 G$TF0$0$0 == 0x008d
+ 008D 192 _TF0 = 0x008d
+ 008E 193 G$TR1$0$0 == 0x008e
+ 008E 194 _TR1 = 0x008e
+ 008F 195 G$TF1$0$0 == 0x008f
+ 008F 196 _TF1 = 0x008f
+ 0090 197 G$P1_0$0$0 == 0x0090
+ 0090 198 _P1_0 = 0x0090
+ 0091 199 G$P1_1$0$0 == 0x0091
+ 0091 200 _P1_1 = 0x0091
+ 0092 201 G$P1_2$0$0 == 0x0092
+ 0092 202 _P1_2 = 0x0092
+ 0093 203 G$P1_3$0$0 == 0x0093
+ 0093 204 _P1_3 = 0x0093
+ 0094 205 G$P1_4$0$0 == 0x0094
+ 0094 206 _P1_4 = 0x0094
+ 0095 207 G$P1_5$0$0 == 0x0095
+ 0095 208 _P1_5 = 0x0095
+ 0096 209 G$P1_6$0$0 == 0x0096
+ 0096 210 _P1_6 = 0x0096
+ 0097 211 G$P1_7$0$0 == 0x0097
+ 0097 212 _P1_7 = 0x0097
+ 0098 213 G$RI$0$0 == 0x0098
+ 0098 214 _RI = 0x0098
+ 0099 215 G$TI$0$0 == 0x0099
+ 0099 216 _TI = 0x0099
+ 009A 217 G$RB8$0$0 == 0x009a
+ 009A 218 _RB8 = 0x009a
+ 009B 219 G$TB8$0$0 == 0x009b
+ 009B 220 _TB8 = 0x009b
+ 009C 221 G$REN$0$0 == 0x009c
+ 009C 222 _REN = 0x009c
+ 009D 223 G$SM2$0$0 == 0x009d
+ 009D 224 _SM2 = 0x009d
+ 009E 225 G$SM1$0$0 == 0x009e
+ 009E 226 _SM1 = 0x009e
+ 009F 227 G$SM0$0$0 == 0x009f
+ 009F 228 _SM0 = 0x009f
+ 00A0 229 G$P2_0$0$0 == 0x00a0
+ 00A0 230 _P2_0 = 0x00a0
+ 00A1 231 G$P2_1$0$0 == 0x00a1
+ 00A1 232 _P2_1 = 0x00a1
+ 00A2 233 G$P2_2$0$0 == 0x00a2
+ 00A2 234 _P2_2 = 0x00a2
+ 00A3 235 G$P2_3$0$0 == 0x00a3
+ 00A3 236 _P2_3 = 0x00a3
+ 00A4 237 G$P2_4$0$0 == 0x00a4
+ 00A4 238 _P2_4 = 0x00a4
+ 00A5 239 G$P2_5$0$0 == 0x00a5
+ 00A5 240 _P2_5 = 0x00a5
+ 00A6 241 G$P2_6$0$0 == 0x00a6
+ 00A6 242 _P2_6 = 0x00a6
+ 00A7 243 G$P2_7$0$0 == 0x00a7
+ 00A7 244 _P2_7 = 0x00a7
+ 00A8 245 G$EX0$0$0 == 0x00a8
+ 00A8 246 _EX0 = 0x00a8
+ 00A9 247 G$ET0$0$0 == 0x00a9
+ 00A9 248 _ET0 = 0x00a9
+ 00AA 249 G$EX1$0$0 == 0x00aa
+ 00AA 250 _EX1 = 0x00aa
+ 00AB 251 G$ET1$0$0 == 0x00ab
+ 00AB 252 _ET1 = 0x00ab
+ 00AC 253 G$ES$0$0 == 0x00ac
+ 00AC 254 _ES = 0x00ac
+ 00AF 255 G$EA$0$0 == 0x00af
+ 00AF 256 _EA = 0x00af
+ 00B0 257 G$P3_0$0$0 == 0x00b0
+ 00B0 258 _P3_0 = 0x00b0
+ 00B1 259 G$P3_1$0$0 == 0x00b1
+ 00B1 260 _P3_1 = 0x00b1
+ 00B2 261 G$P3_2$0$0 == 0x00b2
+ 00B2 262 _P3_2 = 0x00b2
+ 00B3 263 G$P3_3$0$0 == 0x00b3
+ 00B3 264 _P3_3 = 0x00b3
+ 00B4 265 G$P3_4$0$0 == 0x00b4
+ 00B4 266 _P3_4 = 0x00b4
+ 00B5 267 G$P3_5$0$0 == 0x00b5
+ 00B5 268 _P3_5 = 0x00b5
+ 00B6 269 G$P3_6$0$0 == 0x00b6
+ 00B6 270 _P3_6 = 0x00b6
+ 00B7 271 G$P3_7$0$0 == 0x00b7
+ 00B7 272 _P3_7 = 0x00b7
+ 00B0 273 G$RXD$0$0 == 0x00b0
+ 00B0 274 _RXD = 0x00b0
+ 00B1 275 G$TXD$0$0 == 0x00b1
+ 00B1 276 _TXD = 0x00b1
+ 00B2 277 G$INT0$0$0 == 0x00b2
+ 00B2 278 _INT0 = 0x00b2
+ 00B3 279 G$INT1$0$0 == 0x00b3
+ 00B3 280 _INT1 = 0x00b3
+ 00B4 281 G$T0$0$0 == 0x00b4
+ 00B4 282 _T0 = 0x00b4
+ 00B5 283 G$T1$0$0 == 0x00b5
+ 00B5 284 _T1 = 0x00b5
+ 00B6 285 G$WR$0$0 == 0x00b6
+ 00B6 286 _WR = 0x00b6
+ 00B7 287 G$RD$0$0 == 0x00b7
+ 00B7 288 _RD = 0x00b7
+ 00B8 289 G$PX0$0$0 == 0x00b8
+ 00B8 290 _PX0 = 0x00b8
+ 00B9 291 G$PT0$0$0 == 0x00b9
+ 00B9 292 _PT0 = 0x00b9
+ 00BA 293 G$PX1$0$0 == 0x00ba
+ 00BA 294 _PX1 = 0x00ba
+ 00BB 295 G$PT1$0$0 == 0x00bb
+ 00BB 296 _PT1 = 0x00bb
+ 00BC 297 G$PS$0$0 == 0x00bc
+ 00BC 298 _PS = 0x00bc
+ 00D0 299 G$P$0$0 == 0x00d0
+ 00D0 300 _P = 0x00d0
+ 00D1 301 G$FL$0$0 == 0x00d1
+ 00D1 302 _FL = 0x00d1
+ 00D2 303 G$OV$0$0 == 0x00d2
+ 00D2 304 _OV = 0x00d2
+ 00D3 305 G$RS0$0$0 == 0x00d3
+ 00D3 306 _RS0 = 0x00d3
+ 00D4 307 G$RS1$0$0 == 0x00d4
+ 00D4 308 _RS1 = 0x00d4
+ 00D5 309 G$F0$0$0 == 0x00d5
+ 00D5 310 _F0 = 0x00d5
+ 00D6 311 G$AC$0$0 == 0x00d6
+ 00D6 312 _AC = 0x00d6
+ 00D7 313 G$CY$0$0 == 0x00d7
+ 00D7 314 _CY = 0x00d7
+ 315 ;--------------------------------------------------------
+ 316 ; overlayable register banks
+ 317 ;--------------------------------------------------------
+ 318 .area REG_BANK_0 (REL,OVR,DATA)
+ 0000 319 .ds 8
+ 320 ;--------------------------------------------------------
+ 321 ; internal ram data
+ 322 ;--------------------------------------------------------
+ 323 .area DSEG (DATA)
+ 0000 324 G$some_variable$0$0==.
+ 0000 325 _some_variable::
+ 0000 326 .ds 4
+ 0004 327 G$i$0$0==.
+ 0004 328 _i::
+ 0004 329 .ds 2
+ 330 ;--------------------------------------------------------
+ 331 ; overlayable items in internal ram
+ 332 ;--------------------------------------------------------
+ 333 .area OSEG (OVR,DATA)
+ 334 ;--------------------------------------------------------
+ 335 ; Stack segment in internal ram
+ 336 ;--------------------------------------------------------
+ 337 .area SSEG (DATA)
+ 0000 338 __start__stack:
+ 0000 339 .ds 1
+ 340
+ 341 ;--------------------------------------------------------
+ 342 ; indirectly addressable internal ram data
+ 343 ;--------------------------------------------------------
+ 344 .area ISEG (DATA)
+ 345 ;--------------------------------------------------------
+ 346 ; absolute internal ram data
+ 347 ;--------------------------------------------------------
+ 348 .area IABS (ABS,DATA)
+ 349 .area IABS (ABS,DATA)
+ 350 ;--------------------------------------------------------
+ 351 ; bit data
+ 352 ;--------------------------------------------------------
+ 353 .area BSEG (BIT)
+ 354 ;--------------------------------------------------------
+ 355 ; paged external ram data
+ 356 ;--------------------------------------------------------
+ 357 .area PSEG (PAG,XDATA)
+ 358 ;--------------------------------------------------------
+ 359 ; external ram data
+ 360 ;--------------------------------------------------------
+ 361 .area XSEG (XDATA)
+ 362 ;--------------------------------------------------------
+ 363 ; absolute external ram data
+ 364 ;--------------------------------------------------------
+ 365 .area XABS (ABS,XDATA)
+ 366 ;--------------------------------------------------------
+ 367 ; external initialized ram data
+ 368 ;--------------------------------------------------------
+ 369 .area XISEG (XDATA)
+ 370 .area HOME (CODE)
+ 371 .area GSINIT0 (CODE)
+ 372 .area GSINIT1 (CODE)
+ 373 .area GSINIT2 (CODE)
+ 374 .area GSINIT3 (CODE)
+ 375 .area GSINIT4 (CODE)
+ 376 .area GSINIT5 (CODE)
+ 377 .area GSINIT (CODE)
+ 378 .area GSFINAL (CODE)
+ 379 .area CSEG (CODE)
+ 380 ;--------------------------------------------------------
+ 381 ; interrupt vector
+ 382 ;--------------------------------------------------------
+ 383 .area HOME (CODE)
+ 0000 384 __interrupt_vect:
+ 0000 02s00r00 385 ljmp __sdcc_gsinit_startup
+ 386 ;--------------------------------------------------------
+ 387 ; global & static initialisations
+ 388 ;--------------------------------------------------------
+ 389 .area HOME (CODE)
+ 390 .area GSINIT (CODE)
+ 391 .area GSFINAL (CODE)
+ 392 .area GSINIT (CODE)
+ 393 .globl __sdcc_gsinit_startup
+ 394 .globl __sdcc_program_startup
+ 395 .globl __start__stack
+ 396 .globl __mcs51_genXINIT
+ 397 .globl __mcs51_genXRAMCLEAR
+ 398 .globl __mcs51_genRAMCLEAR
+ 0000 399 G$main$0$0 ==.
+ 0000 400 C$demo_c_0.c$10$1$1 ==.
+ 401 ; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here
+ 0000 E4 402 clr a
+ 0001 F5*00 403 mov _some_variable,a
+ 0003 F5*01 404 mov (_some_variable + 1),a
+ 0005 F5*02 405 mov (_some_variable + 2),a
+ 0007 F5*03 406 mov (_some_variable + 3),a
+ 407 .area GSFINAL (CODE)
+ 0000 02s00r03 408 ljmp __sdcc_program_startup
+ 409 ;--------------------------------------------------------
+ 410 ; Home
+ 411 ;--------------------------------------------------------
+ 412 .area HOME (CODE)
+ 413 .area HOME (CODE)
+ 0003 414 __sdcc_program_startup:
+ 0003 12s00r0A 415 lcall _main
+ 416 ; return from main will lock up
+ 0006 80 FE 417 sjmp .
+ 418 ;--------------------------------------------------------
+ 419 ; code
+ 420 ;--------------------------------------------------------
+ 421 .area CSEG (CODE)
+ 422 ;------------------------------------------------------------
+ 423 ;Allocation info for local variables in function 'someFunction'
+ 424 ;------------------------------------------------------------
+ 425 ;somevalue Allocated to registers r2
+ 426 ;------------------------------------------------------------
+ 0000 427 G$someFunction$0$0 ==.
+ 0000 428 C$demo_c_0.c$20$0$0 ==.
+ 429 ; demo_c_0.c:20: void someFunction(unsigned char somevalue)
+ 430 ; -----------------------------------------
+ 431 ; function someFunction
+ 432 ; -----------------------------------------
+ 0000 433 _someFunction:
+ 0002 434 ar2 = 0x02
+ 0003 435 ar3 = 0x03
+ 0004 436 ar4 = 0x04
+ 0005 437 ar5 = 0x05
+ 0006 438 ar6 = 0x06
+ 0007 439 ar7 = 0x07
+ 0000 440 ar0 = 0x00
+ 0001 441 ar1 = 0x01
+ 0000 AA 82 442 mov r2,dpl
+ 0002 443 C$demo_c_0.c$23$1$1 ==.
+ 444 ; demo_c_0.c:23: P1=somevalue;
+ 0002 8A 90 445 mov _P1,r2
+ 0004 446 C$demo_c_0.c$24$1$1 ==.
+ 447 ; demo_c_0.c:24: P3=somevalue^0xFF;
+ 0004 74 FF 448 mov a,#0xFF
+ 0006 6A 449 xrl a,r2
+ 0007 F5 B0 450 mov _P3,a
+ 0009 451 C$demo_c_0.c$25$1$1 ==.
+ 0009 452 XG$someFunction$0$0 ==.
+ 0009 22 453 ret
+ 454 ;------------------------------------------------------------
+ 455 ;Allocation info for local variables in function 'main'
+ 456 ;------------------------------------------------------------
+ 457 ;------------------------------------------------------------
+ 000A 458 G$main$0$0 ==.
+ 000A 459 C$demo_c_0.c$28$1$1 ==.
+ 460 ; demo_c_0.c:28: int main()
+ 461 ; -----------------------------------------
+ 462 ; function main
+ 463 ; -----------------------------------------
+ 000A 464 _main:
+ 000A 465 C$demo_c_0.c$31$1$1 ==.
+ 466 ; demo_c_0.c:31: while(1) {
+ 000A 467 00102$:
+ 000A 468 C$demo_c_0.c$32$2$2 ==.
+ 469 ; demo_c_0.c:32: for(i=0; i<255; i++) {
+ 000A E4 470 clr a
+ 000B F5*04 471 mov _i,a
+ 000D F5*05 472 mov (_i + 1),a
+ 000F 473 00104$:
+ 000F C3 474 clr c
+ 0010 E5*04 475 mov a,_i
+ 0012 94 FF 476 subb a,#0xFF
+ 0014 E5*05 477 mov a,(_i + 1)
+ 0016 64 80 478 xrl a,#0x80
+ 0018 94 80 479 subb a,#0x80
+ 001A 50 26 480 jnc 00107$
+ 001C 481 C$demo_c_0.c$33$3$3 ==.
+ 482 ; demo_c_0.c:33: someFunction(i+2);
+ 001C AA*04 483 mov r2,_i
+ 001E 74 02 484 mov a,#0x02
+ 0020 2A 485 add a,r2
+ 0021 F5 82 486 mov dpl,a
+ 0023 12s00r00 487 lcall _someFunction
+ 0026 488 C$demo_c_0.c$34$3$3 ==.
+ 489 ; demo_c_0.c:34: some_variable++;
+ 0026 05*00 490 inc _some_variable
+ 0028 E4 491 clr a
+ 0029 B5*00 0C 492 cjne a,_some_variable,00114$
+ 002C 05*01 493 inc (_some_variable + 1)
+ 002E B5*01 07 494 cjne a,(_some_variable + 1),00114$
+ 0031 05*02 495 inc (_some_variable + 2)
+ 0033 B5*02 02 496 cjne a,(_some_variable + 2),00114$
+ 0036 05*03 497 inc (_some_variable + 3)
+ 0038 498 00114$:
+ 0038 499 C$demo_c_0.c$32$2$2 ==.
+ 500 ; demo_c_0.c:32: for(i=0; i<255; i++) {
+ 0038 05*04 501 inc _i
+ 003A E4 502 clr a
+ 003B B5*04 D1 503 cjne a,_i,00104$
+ 003E 05*05 504 inc (_i + 1)
+ 0040 80 CD 505 sjmp 00104$
+ 0042 506 00107$:
+ 0042 507 C$demo_c_0.c$36$2$2 ==.
+ 508 ; demo_c_0.c:36: some_variable-=22;
+ 0042 E5*00 509 mov a,_some_variable
+ 0044 24 EA 510 add a,#0xea
+ 0046 F5*00 511 mov _some_variable,a
+ 0048 E5*01 512 mov a,(_some_variable + 1)
+ 004A 34 FF 513 addc a,#0xff
+ 004C F5*01 514 mov (_some_variable + 1),a
+ 004E E5*02 515 mov a,(_some_variable + 2)
+ 0050 34 FF 516 addc a,#0xff
+ 0052 F5*02 517 mov (_some_variable + 2),a
+ 0054 E5*03 518 mov a,(_some_variable + 3)
+ 0056 34 FF 519 addc a,#0xff
+ 0058 F5*03 520 mov (_some_variable + 3),a
+ 005A 521 C$demo_c_0.c$40$1$1 ==.
+ 522 ; demo_c_0.c:40: return 0;
+ 005A 523 C$demo_c_0.c$41$1$1 ==.
+ 005A 524 XG$main$0$0 ==.
+ 005A 80 AE 525 sjmp 00102$
+ 526 .area CSEG (CODE)
+ 527 .area CONST (CODE)
+ 528 .area XINIT (CODE)
+ 529 .area CABS (ABS,CODE)
diff --git a/demo/demo_c_0.map b/demo/demo_c_0.map
new file mode 100644
index 0000000..d1247dd
--- /dev/null
+++ b/demo/demo_c_0.map
@@ -0,0 +1,488 @@
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CABS 0000 0000 = 0. bytes (ABS,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:FFFFFF00 s_BSEG
+ 0C:0000 l_BIT_BANK
+ 0C:0000 l_BSEG
+ 0C:0000 l_BSEG_BYTES
+ 0C:0000 l_CABS
+ 0C:0000 l_CONST
+ 0C:0000 l_GSINIT1
+ 0C:0000 l_GSINIT5
+ 0C:0000 l_IABS
+ 0C:0000 l_ISEG
+ 0C:0000 l_OSEG
+ 0C:0000 l_PSEG
+ 0C:0000 l_REG_BANK_1
+ 0C:0000 l_REG_BANK_2
+ 0C:0000 l_REG_BANK_3
+ 0C:0000 l_RSEG
+ 0C:0000 l_XABS
+ 0C:0000 l_XINIT
+ 0C:0000 l_XISEG
+ 0C:0000 l_XSEG
+ 0C:0000 l__CODE
+ 0C:0000 s_BSEG_BYTES
+ 0C:0000 s_CABS
+ 0C:0000 s_DSEG
+ 0C:0000 s_HOME
+ 0C:0000 s_IABS
+ 0C:0000 s_ISEG
+ 0C:0000 s_PSEG
+ 0C:0000 s_REG_BANK_0
+ 0C:0000 s_XABS
+ 0C:0000 s_XISEG
+ 0C:0000 s_XSEG
+ 0C:0003 l_GSFINAL
+ 0C:0003 l_GSINIT0
+ 0C:0008 l_HOME
+ 0C:0008 l_REG_BANK_0
+ 0C:0008 s_GSINIT0
+ 0C:0008 s_REG_BANK_1
+ 0C:0009 l_GSINIT
+ 0C:000A l_GSINIT2
+ 0C:000B s_GSINIT1
+ 0C:000B s_GSINIT2
+ 0C:000E s_RSEG
+ 0C:000E s_SSEG
+ 0C:0010 s_REG_BANK_2
+ 0C:0015 s_GSINIT3
+ 0C:0018 s_BIT_BANK
+ 0C:0018 s_OSEG
+ 0C:0018 s_REG_BANK_3
+ 0C:0020 s__CODE
+ 0C:0022 l_GSINIT3
+ 0C:002A l_GSINIT4
+ 0C:0037 s_GSINIT4
+ 0C:0060 l_CSEG
+ 0C:0061 s_GSINIT
+ 0C:0061 s_GSINIT5
+ 0C:006A s_GSFINAL
+ 0C:006D s_CSEG
+ 0C:0080 l_DSEG
+ 0C:00CD s_CONST
+ 0C:00CD s_XINIT
+ 0C:00F2 l_SSEG
+ 0C:0100 l_IRAM
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+. .ABS. 0000 0000 = 0. bytes (ABS,CON)
+
+ Value Global
+ -------- --------------------------------
+ 0080 G$P0$0$0
+ 0080 G$P0_0$0$0
+ 0080 _P0
+ 0080 _P0_0
+ 0081 G$P0_1$0$0
+ 0081 G$SP$0$0
+ 0081 _P0_1
+ 0081 _SP
+ 0082 G$DPL$0$0
+ 0082 G$P0_2$0$0
+ 0082 _DPL
+ 0082 _P0_2
+ 0083 G$DPH$0$0
+ 0083 G$P0_3$0$0
+ 0083 _DPH
+ 0083 _P0_3
+ 0084 G$P0_4$0$0
+ 0084 _P0_4
+ 0085 G$P0_5$0$0
+ 0085 _P0_5
+ 0086 G$P0_6$0$0
+ 0086 _P0_6
+ 0087 G$P0_7$0$0
+ 0087 G$PCON$0$0
+ 0087 _P0_7
+ 0087 _PCON
+ 0088 G$IT0$0$0
+ 0088 G$TCON$0$0
+ 0088 _IT0
+ 0088 _TCON
+ 0089 G$IE0$0$0
+ 0089 G$TMOD$0$0
+ 0089 _IE0
+ 0089 _TMOD
+ 008A G$IT1$0$0
+ 008A G$TL0$0$0
+ 008A _IT1
+ 008A _TL0
+ 008B G$IE1$0$0
+ 008B G$TL1$0$0
+ 008B _IE1
+ 008B _TL1
+ 008C G$TH0$0$0
+ 008C G$TR0$0$0
+ 008C _TH0
+ 008C _TR0
+ 008D G$TF0$0$0
+ 008D G$TH1$0$0
+ 008D _TF0
+ 008D _TH1
+ 008E G$TR1$0$0
+ 008E _TR1
+ 008F G$TF1$0$0
+ 008F _TF1
+ 0090 G$P1$0$0
+ 0090 G$P1_0$0$0
+ 0090 _P1
+ 0090 _P1_0
+ 0091 G$P1_1$0$0
+ 0091 _P1_1
+ 0092 G$P1_2$0$0
+ 0092 _P1_2
+ 0093 G$P1_3$0$0
+ 0093 _P1_3
+ 0094 G$P1_4$0$0
+ 0094 _P1_4
+ 0095 G$P1_5$0$0
+ 0095 _P1_5
+ 0096 G$P1_6$0$0
+ 0096 _P1_6
+ 0097 G$P1_7$0$0
+ 0097 _P1_7
+ 0098 G$RI$0$0
+ 0098 G$SCON$0$0
+ 0098 _RI
+ 0098 _SCON
+ 0099 G$SBUF$0$0
+ 0099 G$TI$0$0
+ 0099 _SBUF
+ 0099 _TI
+ 009A G$RB8$0$0
+ 009A _RB8
+ 009B G$TB8$0$0
+ 009B _TB8
+ 009C G$REN$0$0
+ 009C _REN
+ 009D G$SM2$0$0
+ 009D _SM2
+ 009E G$SM1$0$0
+ 009E _SM1
+ 009F G$SM0$0$0
+ 009F _SM0
+ 00A0 G$P2$0$0
+ 00A0 G$P2_0$0$0
+ 00A0 _P2
+ 00A0 _P2_0
+ 00A0 __XPAGE
+ 00A1 G$P2_1$0$0
+ 00A1 _P2_1
+ 00A2 G$P2_2$0$0
+ 00A2 _P2_2
+ 00A3 G$P2_3$0$0
+ 00A3 _P2_3
+ 00A4 G$P2_4$0$0
+ 00A4 _P2_4
+ 00A5 G$P2_5$0$0
+ 00A5 _P2_5
+ 00A6 G$P2_6$0$0
+ 00A6 _P2_6
+ 00A7 G$P2_7$0$0
+ 00A7 _P2_7
+ 00A8 G$EX0$0$0
+ 00A8 G$IE$0$0
+ 00A8 _EX0
+ 00A8 _IE
+ 00A9 G$ET0$0$0
+ 00A9 _ET0
+ 00AA G$EX1$0$0
+ 00AA _EX1
+ 00AB G$ET1$0$0
+ 00AB _ET1
+ 00AC G$ES$0$0
+ 00AC _ES
+ 00AF G$EA$0$0
+ 00AF _EA
+ 00B0 G$P3$0$0
+ 00B0 G$P3_0$0$0
+ 00B0 G$RXD$0$0
+ 00B0 _P3
+ 00B0 _P3_0
+ 00B0 _RXD
+ 00B1 G$P3_1$0$0
+ 00B1 G$TXD$0$0
+ 00B1 _P3_1
+ 00B1 _TXD
+ 00B2 G$INT0$0$0
+ 00B2 G$P3_2$0$0
+ 00B2 _INT0
+ 00B2 _P3_2
+ 00B3 G$INT1$0$0
+ 00B3 G$P3_3$0$0
+ 00B3 _INT1
+ 00B3 _P3_3
+ 00B4 G$P3_4$0$0
+ 00B4 G$T0$0$0
+ 00B4 _P3_4
+ 00B4 _T0
+ 00B5 G$P3_5$0$0
+ 00B5 G$T1$0$0
+ 00B5 _P3_5
+ 00B5 _T1
+ 00B6 G$P3_6$0$0
+ 00B6 G$WR$0$0
+ 00B6 _P3_6
+ 00B6 _WR
+ 00B7 G$P3_7$0$0
+ 00B7 G$RD$0$0
+ 00B7 _P3_7
+ 00B7 _RD
+ 00B8 G$IP$0$0
+ 00B8 G$PX0$0$0
+ 00B8 _IP
+ 00B8 _PX0
+ 00B9 G$PT0$0$0
+ 00B9 _PT0
+ 00BA G$PX1$0$0
+ 00BA _PX1
+ 00BB G$PT1$0$0
+ 00BB _PT1
+ 00BC G$PS$0$0
+ 00BC _PS
+ 00D0 G$P$0$0
+ 00D0 G$PSW$0$0
+ 00D0 _P
+ 00D0 _PSW
+ 00D1 G$FL$0$0
+ 00D1 _FL
+ 00D2 G$OV$0$0
+ 00D2 _OV
+ 00D3 G$RS0$0$0
+ 00D3 _RS0
+ 00D4 G$RS1$0$0
+ 00D4 _RS1
+ 00D5 G$F0$0$0
+ 00D5 _F0
+ 00D6 G$AC$0$0
+ 00D6 _AC
+ 00D7 G$CY$0$0
+ 00D7 _CY
+ 00E0 G$A$0$0
+ 00E0 G$ACC$0$0
+ 00E0 _A
+ 00E0 _ACC
+ 00F0 G$B$0$0
+ 00F0 _B
+
+
+
+
+
+
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+DSEG 0000 0080 = 128. bytes (REL,CON)
+
+ Value Global
+ -------- --------------------------------
+ 0008 G$some_variable$0$0
+ 0008 _some_variable
+ 000C G$i$0$0
+ 000C _i
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+SSEG 000E 00F2 = 242. bytes (REL,OVR)
+
+ Value Global
+ -------- --------------------------------
+ 000E __start__stack
+
+
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+HOME 0000 0008 = 8. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0000 A$demo_c_0$385
+ 0C:0003 A$demo_c_0$415
+ 0C:0003 __sdcc_program_startup
+ 0C:0006 A$demo_c_0$417
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT0 0008 0003 = 3. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0008 __sdcc_gsinit_startup
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT3 0015 0022 = 34. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0015 __mcs51_genXINIT
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT4 0037 002A = 42. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0037 __mcs51_genRAMCLEAR
+ 0C:003D __mcs51_genXRAMCLEAR
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT 0061 0009 = 9. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0061 A$demo_c_0$402
+ 0C:0061 C$demo_c_0.c$10$1$1
+ 0C:0062 A$demo_c_0$403
+ 0C:0064 A$demo_c_0$404
+ 0C:0066 A$demo_c_0$405
+ 0C:0068 A$demo_c_0$406
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSFINAL 006A 0003 = 3. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:006A A$demo_c_0$408
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CSEG 006D 0060 = 96. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:006D A$demo_c_0$442
+ 0C:006D C$demo_c_0.c$20$0$0
+ 0C:006D G$someFunction$0$0
+ 0C:006D _someFunction
+ 0C:006F A$demo_c_0$445
+ 0C:006F C$demo_c_0.c$23$1$1
+ 0C:0071 A$demo_c_0$448
+ 0C:0071 C$demo_c_0.c$24$1$1
+ 0C:0073 A$demo_c_0$449
+ 0C:0074 A$demo_c_0$450
+ 0C:0076 A$demo_c_0$453
+ 0C:0076 C$demo_c_0.c$25$1$1
+ 0C:0076 XG$someFunction$0$0
+ 0C:0077 A$demo_c_0$470
+ 0C:0077 C$demo_c_0.c$28$1$1
+ 0C:0077 C$demo_c_0.c$31$1$1
+ 0C:0077 G$main$0$0
+ 0C:0077 _main
+ 0C:0078 A$demo_c_0$471
+ 0C:007A A$demo_c_0$472
+ 0C:007C A$demo_c_0$474
+ 0C:007D A$demo_c_0$475
+ 0C:007F A$demo_c_0$476
+ 0C:0081 A$demo_c_0$477
+ 0C:0083 A$demo_c_0$478
+ 0C:0085 A$demo_c_0$479
+ 0C:0087 A$demo_c_0$480
+ 0C:0089 A$demo_c_0$483
+ 0C:0089 C$demo_c_0.c$33$3$3
+ 0C:008B A$demo_c_0$484
+ 0C:008D A$demo_c_0$485
+ 0C:008E A$demo_c_0$486
+ 0C:0090 A$demo_c_0$487
+ 0C:0093 A$demo_c_0$490
+ 0C:0093 C$demo_c_0.c$34$3$3
+ 0C:0095 A$demo_c_0$491
+ 0C:0096 A$demo_c_0$492
+ 0C:0099 A$demo_c_0$493
+ 0C:009B A$demo_c_0$494
+ 0C:009E A$demo_c_0$495
+ 0C:00A0 A$demo_c_0$496
+ 0C:00A3 A$demo_c_0$497
+ 0C:00A5 A$demo_c_0$501
+ 0C:00A5 C$demo_c_0.c$32$2$2
+ 0C:00A7 A$demo_c_0$502
+ 0C:00A8 A$demo_c_0$503
+ 0C:00AB A$demo_c_0$504
+ 0C:00AD A$demo_c_0$505
+ 0C:00AF A$demo_c_0$509
+ 0C:00AF C$demo_c_0.c$36$2$2
+ 0C:00B1 A$demo_c_0$510
+ 0C:00B3 A$demo_c_0$511
+ 0C:00B5 A$demo_c_0$512
+ 0C:00B7 A$demo_c_0$513
+ 0C:00B9 A$demo_c_0$514
+ 0C:00BB A$demo_c_0$515
+ 0C:00BD A$demo_c_0$516
+ 0C:00BF A$demo_c_0$517
+ 0C:00C1 A$demo_c_0$518
+ 0C:00C3 A$demo_c_0$519
+ 0C:00C5 A$demo_c_0$520
+ 0C:00C7 A$demo_c_0$525
+ 0C:00C7 C$demo_c_0.c$40$1$1
+ 0C:00C7 C$demo_c_0.c$41$1$1
+ 0C:00C7 XG$main$0$0
+ 0C:00C9 __sdcc_external_startup
+
+
+ ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 1.
+
+Files Linked [ module(s) ]
+
+demo_c_0.rel
+
+Libraries Linked [ object file ]
+
+/usr/share/sdcc/lib/small/mcs51.lib [ crtclear.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtxinit.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtxclear.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtpagesfr.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtstart.rel ]
+/usr/share/sdcc/lib/small/libsdcc.lib [ _startup.rel ]
+
+ ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 2.
+
+User Base Address Definitions
+
+HOME = 0x0000
+ISEG = 0x0000
+BSEG = 0x0000
+
+ \ No newline at end of file
diff --git a/demo/demo_c_0.mem b/demo/demo_c_0.mem
new file mode 100644
index 0000000..01837e4
--- /dev/null
+++ b/demo/demo_c_0.mem
@@ -0,0 +1,28 @@
+Internal RAM layout:
+ 0 1 2 3 4 5 6 7 8 9 A B C D E F
+0x00:|0|0|0|0|0|0|0|0|a|a|a|a|a|a|S|S|
+0x10:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x20:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x30:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x40:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x50:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x60:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x70:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x80:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x90:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xa0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xb0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xc0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xd0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xe0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xf0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute
+
+Stack starts at: 0x0e (sp set to 0x0d) with 242 bytes available.
+
+Other memory:
+ Name Start End Size Max
+ ---------------- -------- -------- -------- --------
+ PAGED EXT. RAM 0 0
+ EXTERNAL RAM 0 0
+ ROM/EPROM/FLASH 0x0000 0x00cc 205 2048
diff --git a/demo/demo_c_0.rel b/demo/demo_c_0.rel
new file mode 100644
index 0000000..172db17
--- /dev/null
+++ b/demo/demo_c_0.rel
@@ -0,0 +1,378 @@
+;!FILE demo_c_0.asm
+XH
+H 1A areas 117 global symbols
+M demo_c_0
+O -mmcs51 --model-small
+S G$EX0$0$0 Def00A8
+S G$IT0$0$0 Def0088
+S G$TH1$0$0 Def008D
+S _P1 Def0090
+S _A Def00E0
+S G$RXD$0$0 Def00B0
+S G$EX1$0$0 Def00AA
+S G$TB8$0$0 Def009B
+S G$IT1$0$0 Def008A
+S G$IE$0$0 Def00A8
+S _P2 Def00A0
+S _B Def00F0
+S _SP Def0081
+S _P3 Def00B0
+S _PS Def00BC
+S G$TXD$0$0 Def00B1
+S G$SM0$0$0 Def009F
+S G$TL0$0$0 Def008A
+S _T0 Def00B4
+S G$SM1$0$0 Def009E
+S G$TL1$0$0 Def008B
+S _T1 Def00B5
+S _OV Def00D2
+S G$FL$0$0 Def00D1
+S G$SM2$0$0 Def009D
+S _ACC Def00E0
+S __mcs51_genRAMCLEAR Ref0000
+S G$PT0$0$0 Def00B9
+S G$RS0$0$0 Def00D3
+S G$PT1$0$0 Def00BB
+S _WR Def00B6
+S G$F0$0$0 Def00D5
+S G$RS1$0$0 Def00D4
+S G$RD$0$0 Def00B7
+S G$TR0$0$0 Def008C
+S G$TR1$0$0 Def008E
+S G$PX0$0$0 Def00B8
+S G$ES$0$0 Def00AC
+S G$PX1$0$0 Def00BA
+S G$IP$0$0 Def00B8
+S G$PSW$0$0 Def00D0
+S G$RI$0$0 Def0098
+S _P0_0 Def0080
+S G$CY$0$0 Def00D7
+S _PCON Def0087
+S _SBUF Def0099
+S _P0_1 Def0081
+S _P1_0 Def0090
+S _P Def00D0
+S G$TI$0$0 Def0099
+S _P0_2 Def0082
+S _P1_1 Def0091
+S _P2_0 Def00A0
+S _P0_3 Def0083
+S _P1_2 Def0092
+S _P2_1 Def00A1
+S _P3_0 Def00B0
+S _SCON Def0098
+S _P0_4 Def0084
+S _P1_3 Def0093
+S _P2_2 Def00A2
+S _P3_1 Def00B1
+S G$P0$0$0 Def0080
+S _TCON Def0088
+S _TMOD Def0089
+S _P0_5 Def0085
+S _P1_4 Def0094
+S _P2_3 Def00A3
+S _P3_2 Def00B2
+S G$A$0$0 Def00E0
+S G$P1$0$0 Def0090
+S _P0_6 Def0086
+S _P1_5 Def0095
+S _P2_4 Def00A4
+S _P3_3 Def00B3
+S G$B$0$0 Def00F0
+S G$P2$0$0 Def00A0
+S _P0_7 Def0087
+S _P1_6 Def0096
+S _P2_5 Def00A5
+S _P3_4 Def00B4
+S G$PS$0$0 Def00BC
+S G$P3$0$0 Def00B0
+S G$SP$0$0 Def0081
+S _P1_7 Def0097
+S _P2_6 Def00A6
+S _P3_5 Def00B5
+S G$T0$0$0 Def00B4
+S _P2_7 Def00A7
+S _P3_6 Def00B6
+S G$OV$0$0 Def00D2
+S G$T1$0$0 Def00B5
+S _P3_7 Def00B7
+S G$ACC$0$0 Def00E0
+S _INT0 Def00B2
+S _DPH Def0083
+S _INT1 Def00B3
+S G$WR$0$0 Def00B6
+S _IE0 Def0089
+S _IE1 Def008B
+S _DPL Def0082
+S G$P0_0$0$0 Def0080
+S G$P$0$0 Def00D0
+S G$P1_0$0$0 Def0090
+S G$P0_1$0$0 Def0081
+S G$SBUF$0$0 Def0099
+S G$PCON$0$0 Def0087
+S _AC Def00D6
+S G$P2_0$0$0 Def00A0
+S G$P1_1$0$0 Def0091
+S G$P0_2$0$0 Def0082
+S _REN Def009C
+S G$P3_0$0$0 Def00B0
+S G$P2_1$0$0 Def00A1
+S G$P1_2$0$0 Def0092
+S G$P0_3$0$0 Def0083
+S _EA Def00AF
+S G$P3_1$0$0 Def00B1
+S G$P2_2$0$0 Def00A2
+S G$P1_3$0$0 Def0093
+S G$P0_4$0$0 Def0084
+S G$SCON$0$0 Def0098
+S G$P3_2$0$0 Def00B2
+S G$P2_3$0$0 Def00A3
+S G$P1_4$0$0 Def0094
+S G$P0_5$0$0 Def0085
+S G$TMOD$0$0 Def0089
+S G$TCON$0$0 Def0088
+S G$P3_3$0$0 Def00B3
+S G$P2_4$0$0 Def00A4
+S G$P1_5$0$0 Def0095
+S G$P0_6$0$0 Def0086
+S _ET0 Def00A9
+S G$P3_4$0$0 Def00B4
+S G$P2_5$0$0 Def00A5
+S G$P1_6$0$0 Def0096
+S G$P0_7$0$0 Def0087
+S _TF0 Def008D
+S _ET1 Def00AB
+S G$P3_5$0$0 Def00B5
+S G$P2_6$0$0 Def00A6
+S G$P1_7$0$0 Def0097
+S _TF1 Def008F
+S G$P3_6$0$0 Def00B6
+S G$P2_7$0$0 Def00A7
+S _TH0 Def008C
+S _RB8 Def009A
+S __mcs51_genXINIT Ref0000
+S G$P3_7$0$0 Def00B7
+S _TH1 Def008D
+S _IT0 Def0088
+S _EX0 Def00A8
+S _IE Def00A8
+S _IT1 Def008A
+S _TB8 Def009B
+S _EX1 Def00AA
+S _RXD Def00B0
+S G$INT0$0$0 Def00B2
+S G$INT1$0$0 Def00B3
+S G$DPH$0$0 Def0083
+S _TL0 Def008A
+S _SM0 Def009F
+S _TXD Def00B1
+S _TL1 Def008B
+S _SM1 Def009E
+S G$IE0$0$0 Def0089
+S _SM2 Def009D
+S _FL Def00D1
+S G$IE1$0$0 Def008B
+S G$DPL$0$0 Def0082
+S _PT0 Def00B9
+S _PT1 Def00BB
+S _RS0 Def00D3
+S _TR0 Def008C
+S _RD Def00B7
+S _RS1 Def00D4
+S _F0 Def00D5
+S _TR1 Def008E
+S G$AC$0$0 Def00D6
+S _ES Def00AC
+S _PX0 Def00B8
+S G$REN$0$0 Def009C
+S _IP Def00B8
+S _PX1 Def00BA
+S G$EA$0$0 Def00AF
+S _PSW Def00D0
+S __sdcc_gsinit_startup Ref0000
+S _RI Def0098
+S _CY Def00D7
+S G$ET0$0$0 Def00A9
+S _TI Def0099
+S G$ET1$0$0 Def00AB
+S G$TF0$0$0 Def008D
+S G$TF1$0$0 Def008F
+S __mcs51_genXRAMCLEAR Ref0000
+S G$RB8$0$0 Def009A
+S G$TH0$0$0 Def008C
+S _P0 Def0080
+A _CODE size 0 flags 0 addr 0
+A RSEG size 0 flags 0 addr 0
+A REG_BANK_0 size 8 flags 4 addr 0
+A DSEG size 6 flags 0 addr 0
+S _i Def0004
+S G$some_variable$0$0 Def0000
+S G$i$0$0 Def0004
+S _some_variable Def0000
+A OSEG size 0 flags 4 addr 0
+A SSEG size 1 flags 0 addr 0
+S __start__stack Def0000
+A ISEG size 0 flags 0 addr 0
+A IABS size 0 flags 8 addr 0
+A BSEG size 0 flags 80 addr 0
+A PSEG size 0 flags 50 addr 0
+A XSEG size 0 flags 40 addr 0
+A XABS size 0 flags 48 addr 0
+A XISEG size 0 flags 40 addr 0
+A HOME size 8 flags 20 addr 0
+S __sdcc_program_startup Def0003
+S A$demo_c_0$415 Def0003
+S A$demo_c_0$417 Def0006
+S A$demo_c_0$385 Def0000
+A GSINIT0 size 0 flags 20 addr 0
+A GSINIT1 size 0 flags 20 addr 0
+A GSINIT2 size 0 flags 20 addr 0
+A GSINIT3 size 0 flags 20 addr 0
+A GSINIT4 size 0 flags 20 addr 0
+A GSINIT5 size 0 flags 20 addr 0
+A GSINIT size 9 flags 20 addr 0
+S A$demo_c_0$402 Def0000
+S A$demo_c_0$403 Def0001
+S A$demo_c_0$404 Def0003
+S A$demo_c_0$405 Def0005
+S A$demo_c_0$406 Def0007
+S C$demo_c_0.c$10$1$1 Def0000
+A GSFINAL size 3 flags 20 addr 0
+S A$demo_c_0$408 Def0000
+A CSEG size 5C flags 20 addr 0
+S A$demo_c_0$494 Def002E
+S A$demo_c_0$485 Def0020
+S A$demo_c_0$476 Def0012
+S A$demo_c_0$449 Def0006
+S C$demo_c_0.c$40$1$1 Def005A
+S C$demo_c_0.c$31$1$1 Def000A
+S A$demo_c_0$495 Def0031
+S A$demo_c_0$486 Def0021
+S A$demo_c_0$477 Def0014
+S C$demo_c_0.c$41$1$1 Def005A
+S C$demo_c_0.c$23$1$1 Def0002
+S A$demo_c_0$496 Def0033
+S A$demo_c_0$487 Def0023
+S A$demo_c_0$478 Def0016
+S C$demo_c_0.c$24$1$1 Def0004
+S A$demo_c_0$497 Def0036
+S A$demo_c_0$479 Def0018
+S C$demo_c_0.c$32$2$2 Def0038
+S C$demo_c_0.c$25$1$1 Def0009
+S _main Def000A
+S XG$someFunction$0$0 Def0009
+S C$demo_c_0.c$33$3$3 Def001C
+S C$demo_c_0.c$28$1$1 Def000A
+S C$demo_c_0.c$36$2$2 Def0042
+S C$demo_c_0.c$34$3$3 Def0026
+S G$someFunction$0$0 Def0000
+S XG$main$0$0 Def005A
+S G$main$0$0 Def000A
+S A$demo_c_0$510 Def0044
+S A$demo_c_0$501 Def0038
+S A$demo_c_0$520 Def0058
+S A$demo_c_0$511 Def0046
+S A$demo_c_0$502 Def003A
+S A$demo_c_0$512 Def0048
+S A$demo_c_0$503 Def003B
+S A$demo_c_0$513 Def004A
+S A$demo_c_0$504 Def003E
+S A$demo_c_0$450 Def0007
+S A$demo_c_0$514 Def004C
+S A$demo_c_0$505 Def0040
+S A$demo_c_0$442 Def0000
+S _someFunction Def0000
+S A$demo_c_0$515 Def004E
+S A$demo_c_0$470 Def000A
+S A$demo_c_0$525 Def005A
+S A$demo_c_0$516 Def0050
+S A$demo_c_0$480 Def001A
+S A$demo_c_0$471 Def000B
+S A$demo_c_0$453 Def0009
+S A$demo_c_0$517 Def0052
+S A$demo_c_0$490 Def0026
+S A$demo_c_0$472 Def000D
+S A$demo_c_0$445 Def0002
+S C$demo_c_0.c$20$0$0 Def0000
+S A$demo_c_0$518 Def0054
+S A$demo_c_0$509 Def0042
+S A$demo_c_0$491 Def0028
+S A$demo_c_0$519 Def0056
+S A$demo_c_0$492 Def0029
+S A$demo_c_0$483 Def001C
+S A$demo_c_0$474 Def000F
+S A$demo_c_0$493 Def002C
+S A$demo_c_0$484 Def001E
+S A$demo_c_0$475 Def0010
+S A$demo_c_0$448 Def0004
+A CONST size 0 flags 20 addr 0
+A XINIT size 0 flags 20 addr 0
+A CABS size 0 flags 28 addr 0
+T 00 00
+R 00 00 00 02
+T 00 00
+R 00 00 00 03
+T 00 00
+R 00 00 00 03
+T 00 04
+R 00 00 00 03
+T 00 04
+R 00 00 00 03
+T 00 00
+R 00 00 00 05
+T 00 00
+R 00 00 00 05
+T 00 00
+R 00 00 00 0D
+T 00 00 02 00 00
+R 00 00 00 0D 02 03 00 BA
+T 00 00 E4 F5 00 00 00 F5 00 00 01 F5
+R 00 00 00 14 F1 21 04 00 03 F1 21 08 00 03
+T 00 06 00 00 02 F5 00 00 03
+R 00 00 00 14 F1 21 02 00 03 F1 21 06 00 03
+T 00 00 02 00 03
+R 00 00 00 15 00 03 00 0D
+T 00 03
+R 00 00 00 0D
+T 00 03 12 00 0A 80 FE
+R 00 00 00 0D 00 03 00 16
+T 00 00
+R 00 00 00 16
+T 00 00 AA 82 8A 90 74 FF 6A F5 B0 22
+R 00 00 00 16
+T 00 0A
+R 00 00 00 16
+T 00 0A
+R 00 00 00 16
+T 00 0A E4 F5 00 00 04 F5 00 00 05
+R 00 00 00 16 F1 21 04 00 03 F1 21 08 00 03
+T 00 0F
+R 00 00 00 16
+T 00 0F C3 E5 00 00 04 94 FF E5 00 00 05 64 80 94
+R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03
+T 00 19 80 50 26 AA 00 00 04 74 02 2A F5 82 12
+R 00 00 00 16 F1 21 06 00 03
+T 00 24 00 00 05 00 00 00 E4 B5
+R 00 00 00 16 00 02 00 16 F1 21 05 00 03
+T 00 2A 00 00 00 0C 05 00 00 01 B5
+R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03
+T 00 2F 00 00 01 07 05 00 00 02 B5
+R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03
+T 00 34 00 00 02 02 05 00 00 03
+R 00 00 00 16 F1 21 02 00 03 F1 21 07 00 03
+T 00 38
+R 00 00 00 16
+T 00 38 05 00 00 04 E4 B5 00 00 04 D1 05
+R 00 00 00 16 F1 21 03 00 03 F1 21 08 00 03
+T 00 3F 00 00 05 80 CD
+R 00 00 00 16 F1 21 02 00 03
+T 00 42
+R 00 00 00 16
+T 00 42 E5 00 00 00 24 EA F5 00 00 00 E5
+R 00 00 00 16 F1 21 03 00 03 F1 21 09 00 03
+T 00 49 00 00 01 34 FF F5 00 00 01 E5
+R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03
+T 00 4F 00 00 02 34 FF F5 00 00 02 E5
+R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03
+T 00 55 00 00 03 34 FF F5 00 00 03 80 AE
+R 00 00 00 16 F1 21 02 00 03 F1 21 08 00 03
diff --git a/demo/demo_c_0.rst b/demo/demo_c_0.rst
new file mode 100644
index 0000000..cc9b36a
--- /dev/null
+++ b/demo/demo_c_0.rst
@@ -0,0 +1,529 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ANSI-C Compiler
+ 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+ 4 ; This file was generated Tue Oct 27 23:03:10 2009
+ 5 ;--------------------------------------------------------
+ 6 .module demo_c_0
+ 7 .optsdcc -mmcs51 --model-small
+ 8
+ 9 ;--------------------------------------------------------
+ 10 ; Public variables in this module
+ 11 ;--------------------------------------------------------
+ 12 .globl _main
+ 13 .globl _someFunction
+ 14 .globl _CY
+ 15 .globl _AC
+ 16 .globl _F0
+ 17 .globl _RS1
+ 18 .globl _RS0
+ 19 .globl _OV
+ 20 .globl _FL
+ 21 .globl _P
+ 22 .globl _PS
+ 23 .globl _PT1
+ 24 .globl _PX1
+ 25 .globl _PT0
+ 26 .globl _PX0
+ 27 .globl _RD
+ 28 .globl _WR
+ 29 .globl _T1
+ 30 .globl _T0
+ 31 .globl _INT1
+ 32 .globl _INT0
+ 33 .globl _TXD
+ 34 .globl _RXD
+ 35 .globl _P3_7
+ 36 .globl _P3_6
+ 37 .globl _P3_5
+ 38 .globl _P3_4
+ 39 .globl _P3_3
+ 40 .globl _P3_2
+ 41 .globl _P3_1
+ 42 .globl _P3_0
+ 43 .globl _EA
+ 44 .globl _ES
+ 45 .globl _ET1
+ 46 .globl _EX1
+ 47 .globl _ET0
+ 48 .globl _EX0
+ 49 .globl _P2_7
+ 50 .globl _P2_6
+ 51 .globl _P2_5
+ 52 .globl _P2_4
+ 53 .globl _P2_3
+ 54 .globl _P2_2
+ 55 .globl _P2_1
+ 56 .globl _P2_0
+ 57 .globl _SM0
+ 58 .globl _SM1
+ 59 .globl _SM2
+ 60 .globl _REN
+ 61 .globl _TB8
+ 62 .globl _RB8
+ 63 .globl _TI
+ 64 .globl _RI
+ 65 .globl _P1_7
+ 66 .globl _P1_6
+ 67 .globl _P1_5
+ 68 .globl _P1_4
+ 69 .globl _P1_3
+ 70 .globl _P1_2
+ 71 .globl _P1_1
+ 72 .globl _P1_0
+ 73 .globl _TF1
+ 74 .globl _TR1
+ 75 .globl _TF0
+ 76 .globl _TR0
+ 77 .globl _IE1
+ 78 .globl _IT1
+ 79 .globl _IE0
+ 80 .globl _IT0
+ 81 .globl _P0_7
+ 82 .globl _P0_6
+ 83 .globl _P0_5
+ 84 .globl _P0_4
+ 85 .globl _P0_3
+ 86 .globl _P0_2
+ 87 .globl _P0_1
+ 88 .globl _P0_0
+ 89 .globl _B
+ 90 .globl _A
+ 91 .globl _ACC
+ 92 .globl _PSW
+ 93 .globl _IP
+ 94 .globl _P3
+ 95 .globl _IE
+ 96 .globl _P2
+ 97 .globl _SBUF
+ 98 .globl _SCON
+ 99 .globl _P1
+ 100 .globl _TH1
+ 101 .globl _TH0
+ 102 .globl _TL1
+ 103 .globl _TL0
+ 104 .globl _TMOD
+ 105 .globl _TCON
+ 106 .globl _PCON
+ 107 .globl _DPH
+ 108 .globl _DPL
+ 109 .globl _SP
+ 110 .globl _P0
+ 111 .globl _i
+ 112 .globl _some_variable
+ 113 ;--------------------------------------------------------
+ 114 ; special function registers
+ 115 ;--------------------------------------------------------
+ 116 .area RSEG (DATA)
+ 0080 117 G$P0$0$0 == 0x0080
+ 0080 118 _P0 = 0x0080
+ 0081 119 G$SP$0$0 == 0x0081
+ 0081 120 _SP = 0x0081
+ 0082 121 G$DPL$0$0 == 0x0082
+ 0082 122 _DPL = 0x0082
+ 0083 123 G$DPH$0$0 == 0x0083
+ 0083 124 _DPH = 0x0083
+ 0087 125 G$PCON$0$0 == 0x0087
+ 0087 126 _PCON = 0x0087
+ 0088 127 G$TCON$0$0 == 0x0088
+ 0088 128 _TCON = 0x0088
+ 0089 129 G$TMOD$0$0 == 0x0089
+ 0089 130 _TMOD = 0x0089
+ 008A 131 G$TL0$0$0 == 0x008a
+ 008A 132 _TL0 = 0x008a
+ 008B 133 G$TL1$0$0 == 0x008b
+ 008B 134 _TL1 = 0x008b
+ 008C 135 G$TH0$0$0 == 0x008c
+ 008C 136 _TH0 = 0x008c
+ 008D 137 G$TH1$0$0 == 0x008d
+ 008D 138 _TH1 = 0x008d
+ 0090 139 G$P1$0$0 == 0x0090
+ 0090 140 _P1 = 0x0090
+ 0098 141 G$SCON$0$0 == 0x0098
+ 0098 142 _SCON = 0x0098
+ 0099 143 G$SBUF$0$0 == 0x0099
+ 0099 144 _SBUF = 0x0099
+ 00A0 145 G$P2$0$0 == 0x00a0
+ 00A0 146 _P2 = 0x00a0
+ 00A8 147 G$IE$0$0 == 0x00a8
+ 00A8 148 _IE = 0x00a8
+ 00B0 149 G$P3$0$0 == 0x00b0
+ 00B0 150 _P3 = 0x00b0
+ 00B8 151 G$IP$0$0 == 0x00b8
+ 00B8 152 _IP = 0x00b8
+ 00D0 153 G$PSW$0$0 == 0x00d0
+ 00D0 154 _PSW = 0x00d0
+ 00E0 155 G$ACC$0$0 == 0x00e0
+ 00E0 156 _ACC = 0x00e0
+ 00E0 157 G$A$0$0 == 0x00e0
+ 00E0 158 _A = 0x00e0
+ 00F0 159 G$B$0$0 == 0x00f0
+ 00F0 160 _B = 0x00f0
+ 161 ;--------------------------------------------------------
+ 162 ; special function bits
+ 163 ;--------------------------------------------------------
+ 164 .area RSEG (DATA)
+ 0080 165 G$P0_0$0$0 == 0x0080
+ 0080 166 _P0_0 = 0x0080
+ 0081 167 G$P0_1$0$0 == 0x0081
+ 0081 168 _P0_1 = 0x0081
+ 0082 169 G$P0_2$0$0 == 0x0082
+ 0082 170 _P0_2 = 0x0082
+ 0083 171 G$P0_3$0$0 == 0x0083
+ 0083 172 _P0_3 = 0x0083
+ 0084 173 G$P0_4$0$0 == 0x0084
+ 0084 174 _P0_4 = 0x0084
+ 0085 175 G$P0_5$0$0 == 0x0085
+ 0085 176 _P0_5 = 0x0085
+ 0086 177 G$P0_6$0$0 == 0x0086
+ 0086 178 _P0_6 = 0x0086
+ 0087 179 G$P0_7$0$0 == 0x0087
+ 0087 180 _P0_7 = 0x0087
+ 0088 181 G$IT0$0$0 == 0x0088
+ 0088 182 _IT0 = 0x0088
+ 0089 183 G$IE0$0$0 == 0x0089
+ 0089 184 _IE0 = 0x0089
+ 008A 185 G$IT1$0$0 == 0x008a
+ 008A 186 _IT1 = 0x008a
+ 008B 187 G$IE1$0$0 == 0x008b
+ 008B 188 _IE1 = 0x008b
+ 008C 189 G$TR0$0$0 == 0x008c
+ 008C 190 _TR0 = 0x008c
+ 008D 191 G$TF0$0$0 == 0x008d
+ 008D 192 _TF0 = 0x008d
+ 008E 193 G$TR1$0$0 == 0x008e
+ 008E 194 _TR1 = 0x008e
+ 008F 195 G$TF1$0$0 == 0x008f
+ 008F 196 _TF1 = 0x008f
+ 0090 197 G$P1_0$0$0 == 0x0090
+ 0090 198 _P1_0 = 0x0090
+ 0091 199 G$P1_1$0$0 == 0x0091
+ 0091 200 _P1_1 = 0x0091
+ 0092 201 G$P1_2$0$0 == 0x0092
+ 0092 202 _P1_2 = 0x0092
+ 0093 203 G$P1_3$0$0 == 0x0093
+ 0093 204 _P1_3 = 0x0093
+ 0094 205 G$P1_4$0$0 == 0x0094
+ 0094 206 _P1_4 = 0x0094
+ 0095 207 G$P1_5$0$0 == 0x0095
+ 0095 208 _P1_5 = 0x0095
+ 0096 209 G$P1_6$0$0 == 0x0096
+ 0096 210 _P1_6 = 0x0096
+ 0097 211 G$P1_7$0$0 == 0x0097
+ 0097 212 _P1_7 = 0x0097
+ 0098 213 G$RI$0$0 == 0x0098
+ 0098 214 _RI = 0x0098
+ 0099 215 G$TI$0$0 == 0x0099
+ 0099 216 _TI = 0x0099
+ 009A 217 G$RB8$0$0 == 0x009a
+ 009A 218 _RB8 = 0x009a
+ 009B 219 G$TB8$0$0 == 0x009b
+ 009B 220 _TB8 = 0x009b
+ 009C 221 G$REN$0$0 == 0x009c
+ 009C 222 _REN = 0x009c
+ 009D 223 G$SM2$0$0 == 0x009d
+ 009D 224 _SM2 = 0x009d
+ 009E 225 G$SM1$0$0 == 0x009e
+ 009E 226 _SM1 = 0x009e
+ 009F 227 G$SM0$0$0 == 0x009f
+ 009F 228 _SM0 = 0x009f
+ 00A0 229 G$P2_0$0$0 == 0x00a0
+ 00A0 230 _P2_0 = 0x00a0
+ 00A1 231 G$P2_1$0$0 == 0x00a1
+ 00A1 232 _P2_1 = 0x00a1
+ 00A2 233 G$P2_2$0$0 == 0x00a2
+ 00A2 234 _P2_2 = 0x00a2
+ 00A3 235 G$P2_3$0$0 == 0x00a3
+ 00A3 236 _P2_3 = 0x00a3
+ 00A4 237 G$P2_4$0$0 == 0x00a4
+ 00A4 238 _P2_4 = 0x00a4
+ 00A5 239 G$P2_5$0$0 == 0x00a5
+ 00A5 240 _P2_5 = 0x00a5
+ 00A6 241 G$P2_6$0$0 == 0x00a6
+ 00A6 242 _P2_6 = 0x00a6
+ 00A7 243 G$P2_7$0$0 == 0x00a7
+ 00A7 244 _P2_7 = 0x00a7
+ 00A8 245 G$EX0$0$0 == 0x00a8
+ 00A8 246 _EX0 = 0x00a8
+ 00A9 247 G$ET0$0$0 == 0x00a9
+ 00A9 248 _ET0 = 0x00a9
+ 00AA 249 G$EX1$0$0 == 0x00aa
+ 00AA 250 _EX1 = 0x00aa
+ 00AB 251 G$ET1$0$0 == 0x00ab
+ 00AB 252 _ET1 = 0x00ab
+ 00AC 253 G$ES$0$0 == 0x00ac
+ 00AC 254 _ES = 0x00ac
+ 00AF 255 G$EA$0$0 == 0x00af
+ 00AF 256 _EA = 0x00af
+ 00B0 257 G$P3_0$0$0 == 0x00b0
+ 00B0 258 _P3_0 = 0x00b0
+ 00B1 259 G$P3_1$0$0 == 0x00b1
+ 00B1 260 _P3_1 = 0x00b1
+ 00B2 261 G$P3_2$0$0 == 0x00b2
+ 00B2 262 _P3_2 = 0x00b2
+ 00B3 263 G$P3_3$0$0 == 0x00b3
+ 00B3 264 _P3_3 = 0x00b3
+ 00B4 265 G$P3_4$0$0 == 0x00b4
+ 00B4 266 _P3_4 = 0x00b4
+ 00B5 267 G$P3_5$0$0 == 0x00b5
+ 00B5 268 _P3_5 = 0x00b5
+ 00B6 269 G$P3_6$0$0 == 0x00b6
+ 00B6 270 _P3_6 = 0x00b6
+ 00B7 271 G$P3_7$0$0 == 0x00b7
+ 00B7 272 _P3_7 = 0x00b7
+ 00B0 273 G$RXD$0$0 == 0x00b0
+ 00B0 274 _RXD = 0x00b0
+ 00B1 275 G$TXD$0$0 == 0x00b1
+ 00B1 276 _TXD = 0x00b1
+ 00B2 277 G$INT0$0$0 == 0x00b2
+ 00B2 278 _INT0 = 0x00b2
+ 00B3 279 G$INT1$0$0 == 0x00b3
+ 00B3 280 _INT1 = 0x00b3
+ 00B4 281 G$T0$0$0 == 0x00b4
+ 00B4 282 _T0 = 0x00b4
+ 00B5 283 G$T1$0$0 == 0x00b5
+ 00B5 284 _T1 = 0x00b5
+ 00B6 285 G$WR$0$0 == 0x00b6
+ 00B6 286 _WR = 0x00b6
+ 00B7 287 G$RD$0$0 == 0x00b7
+ 00B7 288 _RD = 0x00b7
+ 00B8 289 G$PX0$0$0 == 0x00b8
+ 00B8 290 _PX0 = 0x00b8
+ 00B9 291 G$PT0$0$0 == 0x00b9
+ 00B9 292 _PT0 = 0x00b9
+ 00BA 293 G$PX1$0$0 == 0x00ba
+ 00BA 294 _PX1 = 0x00ba
+ 00BB 295 G$PT1$0$0 == 0x00bb
+ 00BB 296 _PT1 = 0x00bb
+ 00BC 297 G$PS$0$0 == 0x00bc
+ 00BC 298 _PS = 0x00bc
+ 00D0 299 G$P$0$0 == 0x00d0
+ 00D0 300 _P = 0x00d0
+ 00D1 301 G$FL$0$0 == 0x00d1
+ 00D1 302 _FL = 0x00d1
+ 00D2 303 G$OV$0$0 == 0x00d2
+ 00D2 304 _OV = 0x00d2
+ 00D3 305 G$RS0$0$0 == 0x00d3
+ 00D3 306 _RS0 = 0x00d3
+ 00D4 307 G$RS1$0$0 == 0x00d4
+ 00D4 308 _RS1 = 0x00d4
+ 00D5 309 G$F0$0$0 == 0x00d5
+ 00D5 310 _F0 = 0x00d5
+ 00D6 311 G$AC$0$0 == 0x00d6
+ 00D6 312 _AC = 0x00d6
+ 00D7 313 G$CY$0$0 == 0x00d7
+ 00D7 314 _CY = 0x00d7
+ 315 ;--------------------------------------------------------
+ 316 ; overlayable register banks
+ 317 ;--------------------------------------------------------
+ 318 .area REG_BANK_0 (REL,OVR,DATA)
+ 0000 319 .ds 8
+ 320 ;--------------------------------------------------------
+ 321 ; internal ram data
+ 322 ;--------------------------------------------------------
+ 323 .area DSEG (DATA)
+ 0000 324 G$some_variable$0$0==.
+ 0008 325 _some_variable::
+ 0008 326 .ds 4
+ 0004 327 G$i$0$0==.
+ 000C 328 _i::
+ 000C 329 .ds 2
+ 330 ;--------------------------------------------------------
+ 331 ; overlayable items in internal ram
+ 332 ;--------------------------------------------------------
+ 333 .area OSEG (OVR,DATA)
+ 334 ;--------------------------------------------------------
+ 335 ; Stack segment in internal ram
+ 336 ;--------------------------------------------------------
+ 337 .area SSEG (DATA)
+ 000E 338 __start__stack:
+ 000E 339 .ds 1
+ 340
+ 341 ;--------------------------------------------------------
+ 342 ; indirectly addressable internal ram data
+ 343 ;--------------------------------------------------------
+ 344 .area ISEG (DATA)
+ 345 ;--------------------------------------------------------
+ 346 ; absolute internal ram data
+ 347 ;--------------------------------------------------------
+ 348 .area IABS (ABS,DATA)
+ 349 .area IABS (ABS,DATA)
+ 350 ;--------------------------------------------------------
+ 351 ; bit data
+ 352 ;--------------------------------------------------------
+ 353 .area BSEG (BIT)
+ 354 ;--------------------------------------------------------
+ 355 ; paged external ram data
+ 356 ;--------------------------------------------------------
+ 357 .area PSEG (PAG,XDATA)
+ 358 ;--------------------------------------------------------
+ 359 ; external ram data
+ 360 ;--------------------------------------------------------
+ 361 .area XSEG (XDATA)
+ 362 ;--------------------------------------------------------
+ 363 ; absolute external ram data
+ 364 ;--------------------------------------------------------
+ 365 .area XABS (ABS,XDATA)
+ 366 ;--------------------------------------------------------
+ 367 ; external initialized ram data
+ 368 ;--------------------------------------------------------
+ 369 .area XISEG (XDATA)
+ 370 .area HOME (CODE)
+ 371 .area GSINIT0 (CODE)
+ 372 .area GSINIT1 (CODE)
+ 373 .area GSINIT2 (CODE)
+ 374 .area GSINIT3 (CODE)
+ 375 .area GSINIT4 (CODE)
+ 376 .area GSINIT5 (CODE)
+ 377 .area GSINIT (CODE)
+ 378 .area GSFINAL (CODE)
+ 379 .area CSEG (CODE)
+ 380 ;--------------------------------------------------------
+ 381 ; interrupt vector
+ 382 ;--------------------------------------------------------
+ 383 .area HOME (CODE)
+ 0000 384 __interrupt_vect:
+ 0000 02 00 08 385 ljmp __sdcc_gsinit_startup
+ 386 ;--------------------------------------------------------
+ 387 ; global & static initialisations
+ 388 ;--------------------------------------------------------
+ 389 .area HOME (CODE)
+ 390 .area GSINIT (CODE)
+ 391 .area GSFINAL (CODE)
+ 392 .area GSINIT (CODE)
+ 393 .globl __sdcc_gsinit_startup
+ 394 .globl __sdcc_program_startup
+ 395 .globl __start__stack
+ 396 .globl __mcs51_genXINIT
+ 397 .globl __mcs51_genXRAMCLEAR
+ 398 .globl __mcs51_genRAMCLEAR
+ 0000 399 G$main$0$0 ==.
+ 0000 400 C$demo_c_0.c$10$1$1 ==.
+ 401 ; demo_c_0.c:10: unsigned long some_variable=0; ///< Documentation for this variable comes here
+ 0061 E4 402 clr a
+ 0062 F5 08 403 mov _some_variable,a
+ 0064 F5 09 404 mov (_some_variable + 1),a
+ 0066 F5 0A 405 mov (_some_variable + 2),a
+ 0068 F5 0B 406 mov (_some_variable + 3),a
+ 407 .area GSFINAL (CODE)
+ 006A 02 00 03 408 ljmp __sdcc_program_startup
+ 409 ;--------------------------------------------------------
+ 410 ; Home
+ 411 ;--------------------------------------------------------
+ 412 .area HOME (CODE)
+ 413 .area HOME (CODE)
+ 0003 414 __sdcc_program_startup:
+ 0003 12 00 77 415 lcall _main
+ 416 ; return from main will lock up
+ 0006 80 FE 417 sjmp .
+ 418 ;--------------------------------------------------------
+ 419 ; code
+ 420 ;--------------------------------------------------------
+ 421 .area CSEG (CODE)
+ 422 ;------------------------------------------------------------
+ 423 ;Allocation info for local variables in function 'someFunction'
+ 424 ;------------------------------------------------------------
+ 425 ;somevalue Allocated to registers r2
+ 426 ;------------------------------------------------------------
+ 0000 427 G$someFunction$0$0 ==.
+ 0000 428 C$demo_c_0.c$20$0$0 ==.
+ 429 ; demo_c_0.c:20: void someFunction(unsigned char somevalue)
+ 430 ; -----------------------------------------
+ 431 ; function someFunction
+ 432 ; -----------------------------------------
+ 006D 433 _someFunction:
+ 0002 434 ar2 = 0x02
+ 0003 435 ar3 = 0x03
+ 0004 436 ar4 = 0x04
+ 0005 437 ar5 = 0x05
+ 0006 438 ar6 = 0x06
+ 0007 439 ar7 = 0x07
+ 0000 440 ar0 = 0x00
+ 0001 441 ar1 = 0x01
+ 006D AA 82 442 mov r2,dpl
+ 0002 443 C$demo_c_0.c$23$1$1 ==.
+ 444 ; demo_c_0.c:23: P1=somevalue;
+ 006F 8A 90 445 mov _P1,r2
+ 0004 446 C$demo_c_0.c$24$1$1 ==.
+ 447 ; demo_c_0.c:24: P3=somevalue^0xFF;
+ 0071 74 FF 448 mov a,#0xFF
+ 0073 6A 449 xrl a,r2
+ 0074 F5 B0 450 mov _P3,a
+ 0009 451 C$demo_c_0.c$25$1$1 ==.
+ 0009 452 XG$someFunction$0$0 ==.
+ 0076 22 453 ret
+ 454 ;------------------------------------------------------------
+ 455 ;Allocation info for local variables in function 'main'
+ 456 ;------------------------------------------------------------
+ 457 ;------------------------------------------------------------
+ 000A 458 G$main$0$0 ==.
+ 000A 459 C$demo_c_0.c$28$1$1 ==.
+ 460 ; demo_c_0.c:28: int main()
+ 461 ; -----------------------------------------
+ 462 ; function main
+ 463 ; -----------------------------------------
+ 0077 464 _main:
+ 000A 465 C$demo_c_0.c$31$1$1 ==.
+ 466 ; demo_c_0.c:31: while(1) {
+ 0077 467 00102$:
+ 000A 468 C$demo_c_0.c$32$2$2 ==.
+ 469 ; demo_c_0.c:32: for(i=0; i<255; i++) {
+ 0077 E4 470 clr a
+ 0078 F5 0C 471 mov _i,a
+ 007A F5 0D 472 mov (_i + 1),a
+ 007C 473 00104$:
+ 007C C3 474 clr c
+ 007D E5 0C 475 mov a,_i
+ 007F 94 FF 476 subb a,#0xFF
+ 0081 E5 0D 477 mov a,(_i + 1)
+ 0083 64 80 478 xrl a,#0x80
+ 0085 94 80 479 subb a,#0x80
+ 0087 50 26 480 jnc 00107$
+ 001C 481 C$demo_c_0.c$33$3$3 ==.
+ 482 ; demo_c_0.c:33: someFunction(i+2);
+ 0089 AA 0C 483 mov r2,_i
+ 008B 74 02 484 mov a,#0x02
+ 008D 2A 485 add a,r2
+ 008E F5 82 486 mov dpl,a
+ 0090 12 00 6D 487 lcall _someFunction
+ 0026 488 C$demo_c_0.c$34$3$3 ==.
+ 489 ; demo_c_0.c:34: some_variable++;
+ 0093 05 08 490 inc _some_variable
+ 0095 E4 491 clr a
+ 0096 B5 08 0C 492 cjne a,_some_variable,00114$
+ 0099 05 09 493 inc (_some_variable + 1)
+ 009B B5 09 07 494 cjne a,(_some_variable + 1),00114$
+ 009E 05 0A 495 inc (_some_variable + 2)
+ 00A0 B5 0A 02 496 cjne a,(_some_variable + 2),00114$
+ 00A3 05 0B 497 inc (_some_variable + 3)
+ 00A5 498 00114$:
+ 0038 499 C$demo_c_0.c$32$2$2 ==.
+ 500 ; demo_c_0.c:32: for(i=0; i<255; i++) {
+ 00A5 05 0C 501 inc _i
+ 00A7 E4 502 clr a
+ 00A8 B5 0C D1 503 cjne a,_i,00104$
+ 00AB 05 0D 504 inc (_i + 1)
+ 00AD 80 CD 505 sjmp 00104$
+ 00AF 506 00107$:
+ 0042 507 C$demo_c_0.c$36$2$2 ==.
+ 508 ; demo_c_0.c:36: some_variable-=22;
+ 00AF E5 08 509 mov a,_some_variable
+ 00B1 24 EA 510 add a,#0xea
+ 00B3 F5 08 511 mov _some_variable,a
+ 00B5 E5 09 512 mov a,(_some_variable + 1)
+ 00B7 34 FF 513 addc a,#0xff
+ 00B9 F5 09 514 mov (_some_variable + 1),a
+ 00BB E5 0A 515 mov a,(_some_variable + 2)
+ 00BD 34 FF 516 addc a,#0xff
+ 00BF F5 0A 517 mov (_some_variable + 2),a
+ 00C1 E5 0B 518 mov a,(_some_variable + 3)
+ 00C3 34 FF 519 addc a,#0xff
+ 00C5 F5 0B 520 mov (_some_variable + 3),a
+ 005A 521 C$demo_c_0.c$40$1$1 ==.
+ 522 ; demo_c_0.c:40: return 0;
+ 005A 523 C$demo_c_0.c$41$1$1 ==.
+ 005A 524 XG$main$0$0 ==.
+ 00C7 80 AE 525 sjmp 00102$
+ 526 .area CSEG (CODE)
+ 527 .area CONST (CODE)
+ 528 .area XINIT (CODE)
+ 529 .area CABS (ABS,CODE)
diff --git a/demo/demo_c_0.sym b/demo/demo_c_0.sym
new file mode 100644
index 0000000..9d943ba
--- /dev/null
+++ b/demo/demo_c_0.sym
@@ -0,0 +1,659 @@
+ ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 1.
+
+Symbol Table
+
+ A 00D6
+ D A$demo_c_0$385 0000 GR
+ 14 A$demo_c_0$402 0000 GR
+ 14 A$demo_c_0$403 0001 GR
+ 14 A$demo_c_0$404 0003 GR
+ 14 A$demo_c_0$405 0005 GR
+ 14 A$demo_c_0$406 0007 GR
+ 15 A$demo_c_0$408 0000 GR
+ D A$demo_c_0$415 0003 GR
+ D A$demo_c_0$417 0006 GR
+ 16 A$demo_c_0$442 0000 GR
+ 16 A$demo_c_0$445 0002 GR
+ 16 A$demo_c_0$448 0004 GR
+ 16 A$demo_c_0$449 0006 GR
+ 16 A$demo_c_0$450 0007 GR
+ 16 A$demo_c_0$453 0009 GR
+ 16 A$demo_c_0$470 000A GR
+ 16 A$demo_c_0$471 000B GR
+ 16 A$demo_c_0$472 000D GR
+ 16 A$demo_c_0$474 000F GR
+ 16 A$demo_c_0$475 0010 GR
+ 16 A$demo_c_0$476 0012 GR
+ 16 A$demo_c_0$477 0014 GR
+ 16 A$demo_c_0$478 0016 GR
+ 16 A$demo_c_0$479 0018 GR
+ 16 A$demo_c_0$480 001A GR
+ 16 A$demo_c_0$483 001C GR
+ 16 A$demo_c_0$484 001E GR
+ 16 A$demo_c_0$485 0020 GR
+ 16 A$demo_c_0$486 0021 GR
+ 16 A$demo_c_0$487 0023 GR
+ 16 A$demo_c_0$490 0026 GR
+ 16 A$demo_c_0$491 0028 GR
+ 16 A$demo_c_0$492 0029 GR
+ 16 A$demo_c_0$493 002C GR
+ 16 A$demo_c_0$494 002E GR
+ 16 A$demo_c_0$495 0031 GR
+ 16 A$demo_c_0$496 0033 GR
+ 16 A$demo_c_0$497 0036 GR
+ 16 A$demo_c_0$501 0038 GR
+ 16 A$demo_c_0$502 003A GR
+ 16 A$demo_c_0$503 003B GR
+ 16 A$demo_c_0$504 003E GR
+ 16 A$demo_c_0$505 0040 GR
+ 16 A$demo_c_0$509 0042 GR
+ 16 A$demo_c_0$510 0044 GR
+ 16 A$demo_c_0$511 0046 GR
+ 16 A$demo_c_0$512 0048 GR
+ 16 A$demo_c_0$513 004A GR
+ 16 A$demo_c_0$514 004C GR
+ 16 A$demo_c_0$515 004E GR
+ 16 A$demo_c_0$516 0050 GR
+ 16 A$demo_c_0$517 0052 GR
+ 16 A$demo_c_0$518 0054 GR
+ 16 A$demo_c_0$519 0056 GR
+ 16 A$demo_c_0$520 0058 GR
+ 16 A$demo_c_0$525 005A GR
+ AC 00D6
+ ACC 00E0
+ ACC.0 00E0
+ ACC.1 00E1
+ ACC.2 00E2
+ ACC.3 00E3
+ ACC.4 00E4
+ ACC.5 00E5
+ ACC.6 00E6
+ ACC.7 00E7
+ B 00F0
+ B.0 00F0
+ B.1 00F1
+ B.2 00F2
+ B.3 00F3
+ B.4 00F4
+ B.5 00F5
+ B.6 00F6
+ B.7 00F7
+ 14 C$demo_c_0.c$10$1$1 = 0000 GR
+ 16 C$demo_c_0.c$20$0$0 = 0000 GR
+ 16 C$demo_c_0.c$23$1$1 = 0002 GR
+ 16 C$demo_c_0.c$24$1$1 = 0004 GR
+ 16 C$demo_c_0.c$25$1$1 = 0009 GR
+ 16 C$demo_c_0.c$28$1$1 = 000A GR
+ 16 C$demo_c_0.c$31$1$1 = 000A GR
+ 16 C$demo_c_0.c$32$2$2 = 0038 GR
+ 16 C$demo_c_0.c$33$3$3 = 001C GR
+ 16 C$demo_c_0.c$34$3$3 = 0026 GR
+ 16 C$demo_c_0.c$36$2$2 = 0042 GR
+ 16 C$demo_c_0.c$40$1$1 = 005A GR
+ 16 C$demo_c_0.c$41$1$1 = 005A GR
+ CPRL2 00C8
+ CT2 00C9
+ CY 00D7
+ DPH 0083
+ DPL 0082
+ EA 00AF
+ ES 00AC
+ ET0 00A9
+ ET1 00AB
+ ET2 00AD
+ EX0 00A8
+ EX1 00AA
+ EXEN2 00CB
+ EXF2 00CE
+ F0 00D5
+ G$A$0$0 = 00E0 G
+ G$AC$0$0 = 00D6 G
+ G$ACC$0$0 = 00E0 G
+ G$B$0$0 = 00F0 G
+ G$CY$0$0 = 00D7 G
+ G$DPH$0$0 = 0083 G
+ G$DPL$0$0 = 0082 G
+ G$EA$0$0 = 00AF G
+ G$ES$0$0 = 00AC G
+ G$ET0$0$0 = 00A9 G
+ G$ET1$0$0 = 00AB G
+ G$EX0$0$0 = 00A8 G
+ G$EX1$0$0 = 00AA G
+ G$F0$0$0 = 00D5 G
+ G$FL$0$0 = 00D1 G
+ G$IE$0$0 = 00A8 G
+ G$IE0$0$0 = 0089 G
+ G$IE1$0$0 = 008B G
+ G$INT0$0$0 = 00B2 G
+ G$INT1$0$0 = 00B3 G
+ G$IP$0$0 = 00B8 G
+ G$IT0$0$0 = 0088 G
+ G$IT1$0$0 = 008A G
+ G$OV$0$0 = 00D2 G
+ G$P$0$0 = 00D0 G
+ G$P0$0$0 = 0080 G
+ G$P0_0$0$0 = 0080 G
+ G$P0_1$0$0 = 0081 G
+ G$P0_2$0$0 = 0082 G
+ G$P0_3$0$0 = 0083 G
+ G$P0_4$0$0 = 0084 G
+ G$P0_5$0$0 = 0085 G
+ G$P0_6$0$0 = 0086 G
+ G$P0_7$0$0 = 0087 G
+ G$P1$0$0 = 0090 G
+ G$P1_0$0$0 = 0090 G
+ G$P1_1$0$0 = 0091 G
+ G$P1_2$0$0 = 0092 G
+ G$P1_3$0$0 = 0093 G
+ G$P1_4$0$0 = 0094 G
+ G$P1_5$0$0 = 0095 G
+ G$P1_6$0$0 = 0096 G
+ G$P1_7$0$0 = 0097 G
+ G$P2$0$0 = 00A0 G
+ G$P2_0$0$0 = 00A0 G
+ G$P2_1$0$0 = 00A1 G
+ G$P2_2$0$0 = 00A2 G
+ G$P2_3$0$0 = 00A3 G
+ G$P2_4$0$0 = 00A4 G
+ G$P2_5$0$0 = 00A5 G
+ G$P2_6$0$0 = 00A6 G
+ G$P2_7$0$0 = 00A7 G
+ G$P3$0$0 = 00B0 G
+ G$P3_0$0$0 = 00B0 G
+ G$P3_1$0$0 = 00B1 G
+ G$P3_2$0$0 = 00B2 G
+ G$P3_3$0$0 = 00B3 G
+ G$P3_4$0$0 = 00B4 G
+ G$P3_5$0$0 = 00B5 G
+ G$P3_6$0$0 = 00B6 G
+ G$P3_7$0$0 = 00B7 G
+ G$PCON$0$0 = 0087 G
+ G$PS$0$0 = 00BC G
+ G$PSW$0$0 = 00D0 G
+ G$PT0$0$0 = 00B9 G
+ G$PT1$0$0 = 00BB G
+ G$PX0$0$0 = 00B8 G
+ G$PX1$0$0 = 00BA G
+ G$RB8$0$0 = 009A G
+ G$RD$0$0 = 00B7 G
+ G$REN$0$0 = 009C G
+ G$RI$0$0 = 0098 G
+ G$RS0$0$0 = 00D3 G
+ G$RS1$0$0 = 00D4 G
+ G$RXD$0$0 = 00B0 G
+ G$SBUF$0$0 = 0099 G
+ G$SCON$0$0 = 0098 G
+ G$SM0$0$0 = 009F G
+ G$SM1$0$0 = 009E G
+ G$SM2$0$0 = 009D G
+ G$SP$0$0 = 0081 G
+ G$T0$0$0 = 00B4 G
+ G$T1$0$0 = 00B5 G
+ G$TB8$0$0 = 009B G
+ G$TCON$0$0 = 0088 G
+ G$TF0$0$0 = 008D G
+ G$TF1$0$0 = 008F G
+ G$TH0$0$0 = 008C G
+ G$TH1$0$0 = 008D G
+ G$TI$0$0 = 0099 G
+ G$TL0$0$0 = 008A G
+ G$TL1$0$0 = 008B G
+ G$TMOD$0$0 = 0089 G
+ G$TR0$0$0 = 008C G
+ G$TR1$0$0 = 008E G
+ G$TXD$0$0 = 00B1 G
+ G$WR$0$0 = 00B6 G
+ 3 G$i$0$0 = 0004 GR
+ 16 G$main$0$0 = 000A GR
+ 16 G$someFunction$0$0 = 0000 GR
+ 3 G$some_variable$0$0 = 0000 GR
+ IE 00A8
+ IE.0 00A8
+ IE.1 00A9
+ IE.2 00AA
+ IE.3 00AB
+ IE.4 00AC
+ IE.5 00AD
+ IE.7 00AF
+ IE0 0089
+ IE1 008B
+ INT0 00B2
+ INT1 00B3
+ IP 00B8
+ IP.0 00B8
+ IP.1 00B9
+ IP.2 00BA
+ IP.3 00BB
+ IP.4 00BC
+ IP.5 00BD
+ IT0 0088
+ IT1 008A
+ OV 00D2
+ P 00D0
+ P0 0080
+ P0.0 0080
+ P0.1 0081
+ P0.2 0082
+ P0.3 0083
+ P0.4 0084
+ P0.5 0085
+ P0.6 0086
+ P0.7 0087
+ P1 0090
+ P1.0 0090
+ P1.1 0091
+ P1.2 0092
+ P1.3 0093
+ P1.4 0094
+ P1.5 0095
+ P1.6 0096
+ P1.7 0097
+ P2 00A0
+ P2.0 00A0
+ P2.1 00A1
+ P2.2 00A2
+ P2.3 00A3
+ P2.4 00A4
+ P2.5 00A5
+ P2.6 00A6
+ P2.7 00A7
+ P3 00B0
+ P3.0 00B0
+ P3.1 00B1
+ P3.2 00B2
+ P3.3 00B3
+ P3.4 00B4
+ P3.5 00B5
+ P3.6 00B6
+ P3.7 00B7
+ PCON 0087
+ PS 00BC
+ PSW 00D0
+ PSW.0 00D0
+ PSW.1 00D1
+ PSW.2 00D2
+ PSW.3 00D3
+ PSW.4 00D4
+ PSW.5 00D5
+ PSW.6 00D6
+ PSW.7 00D7
+ PT0 00B9
+ PT1 00BB
+ PT2 00BD
+ PX0 00B8
+ PX1 00BA
+ RB8 009A
+ RCAP2H 00CB
+ RCAP2L 00CA
+ RCLK 00CD
+ REN 009C
+ RI 0098
+ RS0 00D3
+ RS1 00D4
+ RXD 00B0
+ SBUF 0099
+ SCON 0098
+ SCON.0 0098
+ SCON.1 0099
+ SCON.2 009A
+ SCON.3 009B
+ SCON.4 009C
+ SCON.5 009D
+ SCON.6 009E
+ SCON.7 009F
+ SM0 009F
+ SM1 009E
+ SM2 009D
+ SP 0081
+ T2CON 00C8
+ T2CON.0 00C8
+ T2CON.1 00C9
+ T2CON.2 00CA
+ T2CON.3 00CB
+ T2CON.4 00CC
+ T2CON.5 00CD
+ T2CON.6 00CE
+ T2CON.7 00CF
+ TB8 009B
+ TCLK 00CC
+ TCON 0088
+ TCON.0 0088
+ TCON.1 0089
+ TCON.2 008A
+ TCON.3 008B
+ TCON.4 008C
+ TCON.5 008D
+ TCON.6 008E
+ TCON.7 008F
+ TF0 008D
+ TF1 008F
+ TF2 00CF
+ TH0 008C
+ TH1 008D
+ TH2 00CD
+ TI 0099
+ TL0 008A
+ TL1 008B
+ TL2 00CC
+ TMOD 0089
+ TR0 008C
+ TR1 008E
+ TR2 00CA
+ TXD 00B1
+ 16 XG$main$0$0 = 005A GR
+ 16 XG$someFunction$0$0 = 0009 GR
+ _A = 00E0 G
+ _AC = 00D6 G
+ _ACC = 00E0 G
+ _B = 00F0 G
+ _CY = 00D7 G
+ _DPH = 0083 G
+ _DPL = 0082 G
+ _EA = 00AF G
+ _ES = 00AC G
+ _ET0 = 00A9 G
+ _ET1 = 00AB G
+ _EX0 = 00A8 G
+ _EX1 = 00AA G
+ _F0 = 00D5 G
+ _FL = 00D1 G
+ _IE = 00A8 G
+ _IE0 = 0089 G
+ _IE1 = 008B G
+ _INT0 = 00B2 G
+ _INT1 = 00B3 G
+ _IP = 00B8 G
+ _IT0 = 0088 G
+ _IT1 = 008A G
+ _OV = 00D2 G
+ _P = 00D0 G
+ _P0 = 0080 G
+ _P0_0 = 0080 G
+ _P0_1 = 0081 G
+ _P0_2 = 0082 G
+ _P0_3 = 0083 G
+ _P0_4 = 0084 G
+ _P0_5 = 0085 G
+ _P0_6 = 0086 G
+ _P0_7 = 0087 G
+ _P1 = 0090 G
+ _P1_0 = 0090 G
+ _P1_1 = 0091 G
+ _P1_2 = 0092 G
+ _P1_3 = 0093 G
+ _P1_4 = 0094 G
+ _P1_5 = 0095 G
+ _P1_6 = 0096 G
+ _P1_7 = 0097 G
+ _P2 = 00A0 G
+ _P2_0 = 00A0 G
+ _P2_1 = 00A1 G
+ _P2_2 = 00A2 G
+ _P2_3 = 00A3 G
+ _P2_4 = 00A4 G
+ _P2_5 = 00A5 G
+ _P2_6 = 00A6 G
+ _P2_7 = 00A7 G
+ _P3 = 00B0 G
+ _P3_0 = 00B0 G
+ _P3_1 = 00B1 G
+ _P3_2 = 00B2 G
+ _P3_3 = 00B3 G
+ _P3_4 = 00B4 G
+ _P3_5 = 00B5 G
+ _P3_6 = 00B6 G
+ _P3_7 = 00B7 G
+ _PCON = 0087 G
+ _PS = 00BC G
+ _PSW = 00D0 G
+ _PT0 = 00B9 G
+ _PT1 = 00BB G
+ _PX0 = 00B8 G
+ _PX1 = 00BA G
+ _RB8 = 009A G
+ _RD = 00B7 G
+ _REN = 009C G
+ _RI = 0098 G
+ _RS0 = 00D3 G
+ _RS1 = 00D4 G
+ _RXD = 00B0 G
+ _SBUF = 0099 G
+ _SCON = 0098 G
+ _SM0 = 009F G
+ _SM1 = 009E G
+ _SM2 = 009D G
+ _SP = 0081 G
+ _T0 = 00B4 G
+ _T1 = 00B5 G
+ _TB8 = 009B G
+ _TCON = 0088 G
+ _TF0 = 008D G
+ _TF1 = 008F G
+ _TH0 = 008C G
+ _TH1 = 008D G
+ _TI = 0099 G
+ _TL0 = 008A G
+ _TL1 = 008B G
+ _TMOD = 0089 G
+ _TR0 = 008C G
+ _TR1 = 008E G
+ _TXD = 00B1 G
+ _WR = 00B6 G
+ D __interrupt_vect 0000 R
+ __mcs51_genRAMCLEAR **** GX
+ __mcs51_genXINIT **** GX
+ __mcs51_genXRAMCLEAR **** GX
+ __sdcc_gsinit_startup **** GX
+ D __sdcc_program_startup 0003 GR
+ 5 __start__stack 0000 GR
+ 3 _i 0004 GR
+ 16 _main 000A GR
+ 16 _someFunction 0000 GR
+ 3 _some_variable 0000 GR
+ a 00D6
+ ac 00D6
+ acc 00E0
+ acc.0 00E0
+ acc.1 00E1
+ acc.2 00E2
+ acc.3 00E3
+ acc.4 00E4
+ acc.5 00E5
+ acc.6 00E6
+ acc.7 00E7
+ ar0 = 0000
+ ar1 = 0001
+ ar2 = 0002
+ ar3 = 0003
+ ar4 = 0004
+ ar5 = 0005
+ ar6 = 0006
+ ar7 = 0007
+ b 00F0
+ b.0 00F0
+ b.1 00F1
+ b.2 00F2
+ b.3 00F3
+ b.4 00F4
+ b.5 00F5
+ b.6 00F6
+ b.7 00F7
+ cprl2 00C8
+ ct2 00C9
+ cy 00D7
+ dph 0083
+ dpl 0082
+ ea 00AF
+ es 00AC
+ et0 00A9
+ et1 00AB
+ et2 00AD
+ ex0 00A8
+ ex1 00AA
+ exen2 00CB
+ exf2 00CE
+ f0 00D5
+ ie 00A8
+ ie.0 00A8
+ ie.1 00A9
+ ie.2 00AA
+ ie.3 00AB
+ ie.4 00AC
+ ie.5 00AD
+ ie.7 00AF
+ ie0 0089
+ ie1 008B
+ int0 00B2
+ int1 00B3
+ ip 00B8
+ ip.0 00B8
+ ip.1 00B9
+ ip.2 00BA
+ ip.3 00BB
+ ip.4 00BC
+ ip.5 00BD
+ it0 0088
+ it1 008A
+ ov 00D2
+ p 00D0
+ p0 0080
+ p0.0 0080
+ p0.1 0081
+ p0.2 0082
+ p0.3 0083
+ p0.4 0084
+ p0.5 0085
+ p0.6 0086
+ p0.7 0087
+ p1 0090
+ p1.0 0090
+ p1.1 0091
+ p1.2 0092
+ p1.3 0093
+ p1.4 0094
+ p1.5 0095
+ p1.6 0096
+ p1.7 0097
+ p2 00A0
+ p2.0 00A0
+ p2.1 00A1
+ p2.2 00A2
+ p2.3 00A3
+ p2.4 00A4
+ p2.5 00A5
+ p2.6 00A6
+ p2.7 00A7
+ p3 00B0
+ p3.0 00B0
+ p3.1 00B1
+ p3.2 00B2
+ p3.3 00B3
+ p3.4 00B4
+ p3.5 00B5
+ p3.6 00B6
+ p3.7 00B7
+ pcon 0087
+ ps 00BC
+ psw 00D0
+ psw.0 00D0
+ psw.1 00D1
+ psw.2 00D2
+ psw.3 00D3
+ psw.4 00D4
+ psw.5 00D5
+ psw.6 00D6
+ psw.7 00D7
+ pt0 00B9
+ pt1 00BB
+ pt2 00BD
+ px0 00B8
+ px1 00BA
+ rb8 009A
+ rcap2h 00CB
+ rcap2l 00CA
+ rclk 00CD
+ ren 009C
+ ri 0098
+ rs0 00D3
+ rs1 00D4
+ rxd 00B0
+ sbuf 0099
+ scon 0098
+ scon.0 0098
+ scon.1 0099
+ scon.2 009A
+ scon.3 009B
+ scon.4 009C
+ scon.5 009D
+ scon.6 009E
+ scon.7 009F
+ sm0 009F
+ sm1 009E
+ sm2 009D
+ sp 0081
+ t2con 00C8
+ t2con.0 00C8
+ t2con.1 00C9
+ t2con.2 00CA
+ t2con.3 00CB
+ t2con.4 00CC
+ t2con.5 00CD
+ t2con.6 00CE
+ t2con.7 00CF
+ tb8 009B
+ tclk 00CC
+ tcon 0088
+ tcon.0 0088
+ tcon.1 0089
+ tcon.2 008A
+ tcon.3 008B
+ tcon.4 008C
+ tcon.5 008D
+ tcon.6 008E
+ tcon.7 008F
+ tf0 008D
+ tf1 008F
+ tf2 00CF
+ th0 008C
+ th1 008D
+ th2 00CD
+ ti 0099
+ tl0 008A
+ tl1 008B
+ tl2 00CC
+ tmod 0089
+ tr0 008C
+ tr1 008E
+ tr2 00CA
+ txd 00B1
+
+ ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 2.
+
+Area Table
+
+ 0 _CODE size 0 flags 0
+ 1 RSEG size 0 flags 0
+ 2 REG_BANK_0 size 8 flags 4
+ 3 DSEG size 6 flags 0
+ 4 OSEG size 0 flags 4
+ 5 SSEG size 1 flags 0
+ 6 ISEG size 0 flags 0
+ 7 IABS size 0 flags 8
+ 8 BSEG size 0 flags 80
+ 9 PSEG size 0 flags 50
+ A XSEG size 0 flags 40
+ B XABS size 0 flags 48
+ C XISEG size 0 flags 40
+ D HOME size 8 flags 20
+ E GSINIT0 size 0 flags 20
+ F GSINIT1 size 0 flags 20
+ 10 GSINIT2 size 0 flags 20
+ 11 GSINIT3 size 0 flags 20
+ 12 GSINIT4 size 0 flags 20
+ 13 GSINIT5 size 0 flags 20
+ 14 GSINIT size 9 flags 20
+ 15 GSFINAL size 3 flags 20
+ 16 CSEG size 5C flags 20
+ 17 CONST size 0 flags 20
+ 18 XINIT size 0 flags 20
+ 19 CABS size 0 flags 28
diff --git a/demo/file.hex b/demo/file.hex
new file mode 100644
index 0000000..b6d53b5
--- /dev/null
+++ b/demo/file.hex
@@ -0,0 +1,2 @@
+:0600000080FE33343334AE
+:00000001FF \ No newline at end of file
diff --git a/demo/file.lst b/demo/file.lst
new file mode 100644
index 0000000..5ca698c
--- /dev/null
+++ b/demo/file.lst
@@ -0,0 +1,292 @@
+demo3 demo - 3 32/13/1907 PAGE 6
+ 1 ; MCU 8051 IDE - Demostration code
+ 2 ; Compiler directives
+ 3
+ 4
+ 5 $DATE(32/13/1907)   ; Places date
+ 6 ; $EJECT ; Places a fo
+ 7 ; $INCLUDE(file.asm) ; Inserts fil
+ 8 ; $LIST ; Allows list
+ 9 ; $NOLIST ; Stops outpu
+ 10 ; $NOMOD ; No predefin
+ demo3 demo - 3 32/13/1907 PAGE 7
+ 11 $OBJECT(file.hex) ; Places obje
+ 12 ; $NOOBJECT ; No object f
+ 13 $PAGING ; Break outpu
+ 14 ; $NOPAGING ; Print listi
+ 15 $PAGELENGTH(10) ; No. of line
+ 16 $PAGEWIDTH(20)    ; No. of colu
+ 17 $PRINT(file.lst) ; Places list
+ 18 ; $NOPRINT ; Listing wil
+ 19 ; $SYMBOLS ; Append symb
+ 20 ; $NOSYMBOLS ; Symbol tabl
+ demo3 demo - 3 32/13/1907 PAGE 8
+ 21 $TITLE('demo - 3') ; Places stri
+ 22
+ 23
+ 24 ;; Summary of Cross Assembler Directi
+ 25 ;; ----------------------------------
+ 26
+ 0036 27 a EQU 54d ; Define symb
+ 001B 28 b0 DATA a / 2 ; Define inte
+ 0031 29 c IDATA (b0*2-5) ; Def
+ 0038 30 d BIT 070Q ; Define inte
+ demo3 demo - 3 32/13/1907 PAGE 9
+ FFA5 31 e CODE 0FFA5h ; Define prog
+****WARNING: Exceeding code memory capacity: e = 65445
+ FFF2 33 var SET (A * 44) MOD 9 - 14 ;
+ 34
+ 35 CSEG at 20h ; Select prog
+ 36 x: DB '34' ; Store byte
+ 37 y: DW 3334h ; Store word
+ 38
+ 39 DSEG at 5d ; Select inte
+ 40 m: DS 1 ; Reserve byt
+ demo3 demo - 3 32/13/1907 PAGE 10
+ 41
+ 42 xseg ; Select exte
+ 43 n: DS 1 ; Reserve byt
+ 44
+ 45 ISEG ; Select indi
+ 46 o: DS 1 ; Reserve byt
+ 47
+ 48 NOLIST ; Disable code listin
+ 51 LIST ; Enable code listing
+ 52
+ demo3 demo - 3 32/13/1907 PAGE 11
+ 53
+ 54 +1 mc macro label ; Define macr
+ 55 +1 sjmp main
+ 56 IF 2 <> 2 OR 1 = 4
+ 57 EXITM ; Exit macro
+ 58 ENDIF
+ 59 sjmp label
+ 60 endm ; End of defi
+ 61
+ 62 main: ORG 0 ; Set segment
+ demo3 demo - 3 32/13/1907 PAGE 12
+ 63 IF 0 ; Begin conditional a
+ 64 USING 2 ; Sel
+ 65 ELSE ; Alternative conditi
+ 66 USING 2 ; Sel
+ 67 ENDIF ; End conditional ass
+ 68
+ 69 mc main ; Macro instu
+ 70
+ 71 END ; End of assembly lan
+ASSEMBLY COMPLETE, NO ERRORS FOUND, 1 WARNING
+
+
+
+ demo3 demo - 3 32/13/1907 PAGE 2
+
+ERROR SUMMARY:
+Line 31, WARNING: Exceeding code memory capacity: e = 65445
+ demo3 demo - 3 32/13/1907 PAGE 3
+
+
+
+
+ demo3 demo - 3 32/13/1907 PAGE 4
+SYMBOL TABLE:
+A. . . . . . . . . . . . . . . . . . N NUMB 0036H NOT USED
+AC . . . . . . . . . . . . . . . . . B ADDR 00D6H NOT USED
+ACC. . . . . . . . . . . . . . . . . D ADDR 00E0H NOT USED
+ACSR . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+ADCF . . . . . . . . . . . . . . . . D ADDR 00F6H NOT USED
+ADCLK. . . . . . . . . . . . . . . . D ADDR 00F2H NOT USED
+ADCON. . . . . . . . . . . . . . . . D ADDR 00F3H NOT USED
+ADDH . . . . . . . . . . . . . . . . D ADDR 00F5H NOT USED
+ADDL . . . . . . . . . . . . . . . . D ADDR 00F4H NOT USED
+AR0. . . . . . . . . . . . . . . . . NUMB 0010H NOT USED REDEFINABLE
+AR1. . . . . . . . . . . . . . . . . NUMB 0011H NOT USED REDEFINABLE
+AR2. . . . . . . . . . . . . . . . . NUMB 0012H NOT USED REDEFINABLE
+AR3. . . . . . . . . . . . . . . . . NUMB 0013H NOT USED REDEFINABLE
+AR4. . . . . . . . . . . . . . . . . NUMB 0014H NOT USED REDEFINABLE
+AR5. . . . . . . . . . . . . . . . . NUMB 0015H NOT USED REDEFINABLE
+AR6. . . . . . . . . . . . . . . . . NUMB 0016H NOT USED REDEFINABLE
+AR7. . . . . . . . . . . . . . . . . NUMB 0017H NOT USED REDEFINABLE
+AUXR . . . . . . . . . . . . . . . . D ADDR 008EH NOT USED
+AUXR1. . . . . . . . . . . . . . . . D ADDR 00A2H NOT USED
+B. . . . . . . . . . . . . . . . . . D ADDR 00F0H NOT USED
+B0 . . . . . . . . . . . . . . . . . D ADDR 001BH NOT USED
+BDRCON . . . . . . . . . . . . . . . D ADDR 009BH NOT USED
+BDRCON_1 . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+BRL. . . . . . . . . . . . . . . . . D ADDR 009AH NOT USED
+C. . . . . . . . . . . . . . . . . . I ADDR 0031H NOT USED
+CCAP0H . . . . . . . . . . . . . . . D ADDR 00FAH NOT USED
+CCAP0L . . . . . . . . . . . . . . . D ADDR 00EAH NOT USED
+CCAP1H . . . . . . . . . . . . . . . D ADDR 00FBH NOT USED
+CCAP1L . . . . . . . . . . . . . . . D ADDR 00EBH NOT USED
+CCAP2H . . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAP3H . . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAP4H . . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL2H. . . . . . . . . . . . . . . D ADDR 00FCH NOT USED
+CCAPL2L. . . . . . . . . . . . . . . D ADDR 00ECH NOT USED
+CCAPL3H. . . . . . . . . . . . . . . D ADDR 00FDH NOT USED
+CCAPL3L. . . . . . . . . . . . . . . D ADDR 00EDH NOT USED
+CCAPL4H. . . . . . . . . . . . . . . D ADDR 00FEH NOT USED
+CCAPL4L. . . . . . . . . . . . . . . D ADDR 00EEH NOT USED
+CCAPM0 . . . . . . . . . . . . . . . D ADDR 00DAH NOT USED
+CCAPM1 . . . . . . . . . . . . . . . D ADDR 00DBH NOT USED
+CCAPM2 . . . . . . . . . . . . . . . D ADDR 00DCH NOT USED
+CCAPM3 . . . . . . . . . . . . . . . D ADDR 00DDH NOT USED
+CCAPM4 . . . . . . . . . . . . . . . D ADDR 00DEH NOT USED
+CCF0 . . . . . . . . . . . . . . . . B ADDR 00D8H NOT USED
+CCF1 . . . . . . . . . . . . . . . . B ADDR 00D9H NOT USED
+CCF2 . . . . . . . . . . . . . . . . B ADDR 00DAH NOT USED
+CCF3 . . . . . . . . . . . . . . . . B ADDR 00DBH NOT USED
+CCF4 . . . . . . . . . . . . . . . . B ADDR 00DCH NOT USED
+CCON . . . . . . . . . . . . . . . . D ADDR 00D8H NOT USED
+CFINT. . . . . . . . . . . . . . . . C ADDR 0033H NOT USED
+CH . . . . . . . . . . . . . . . . . D ADDR 00F9H NOT USED
+CKCON. . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKCON0 . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CKRL . . . . . . . . . . . . . . . . D ADDR 0097H NOT USED
+CKSEL. . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+CL . . . . . . . . . . . . . . . . . D ADDR 00E9H NOT USED
+CLKREG . . . . . . . . . . . . . . . D ADDR 008FH NOT USED
+CMOD . . . . . . . . . . . . . . . . D ADDR 00D9H NOT USED
+CPRL2. . . . . . . . . . . . . . . . B ADDR 00C8H NOT USED
+CR . . . . . . . . . . . . . . . . . B ADDR 00DEH NOT USED
+CT2. . . . . . . . . . . . . . . . . B ADDR 00C9H NOT USED
+CY . . . . . . . . . . . . . . . . . B ADDR 00D7H NOT USED
+D. . . . . . . . . . . . . . . . . . B ADDR 0038H NOT USED
+DP0H . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+DP0L . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+DP1H . . . . . . . . . . . . . . . . D ADDR 0085H NOT USED
+DP1L . . . . . . . . . . . . . . . . D ADDR 0084H NOT USED
+DPH. . . . . . . . . . . . . . . . . D ADDR 0083H NOT USED
+ demo3 demo - 3 32/13/1907 PAGE 5
+DPL. . . . . . . . . . . . . . . . . D ADDR 0082H NOT USED
+E. . . . . . . . . . . . . . . . . . C ADDR FFA5H NOT USED
+EA . . . . . . . . . . . . . . . . . B ADDR 00AFH NOT USED
+EC . . . . . . . . . . . . . . . . . B ADDR 00AEH NOT USED
+EECON. . . . . . . . . . . . . . . . D ADDR 0096H NOT USED
+ES . . . . . . . . . . . . . . . . . B ADDR 00ACH NOT USED
+ET0. . . . . . . . . . . . . . . . . B ADDR 00A9H NOT USED
+ET1. . . . . . . . . . . . . . . . . B ADDR 00ABH NOT USED
+ET2. . . . . . . . . . . . . . . . . B ADDR 00ADH NOT USED
+EX0. . . . . . . . . . . . . . . . . B ADDR 00A8H NOT USED
+EX1. . . . . . . . . . . . . . . . . B ADDR 00AAH NOT USED
+EXEN2. . . . . . . . . . . . . . . . B ADDR 00CBH NOT USED
+EXF2 . . . . . . . . . . . . . . . . B ADDR 00CEH NOT USED
+EXTI0. . . . . . . . . . . . . . . . C ADDR 0003H NOT USED
+EXTI1. . . . . . . . . . . . . . . . C ADDR 0013H NOT USED
+F0 . . . . . . . . . . . . . . . . . B ADDR 00D5H NOT USED
+FE . . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+IE . . . . . . . . . . . . . . . . . D ADDR 00A8H NOT USED
+IE0. . . . . . . . . . . . . . . . . B ADDR 0089H NOT USED
+IE1. . . . . . . . . . . . . . . . . B ADDR 008BH NOT USED
+INT0 . . . . . . . . . . . . . . . . B ADDR 00B2H NOT USED
+INT1 . . . . . . . . . . . . . . . . B ADDR 00B3H NOT USED
+IP . . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPH. . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH0 . . . . . . . . . . . . . . . . D ADDR 00B7H NOT USED
+IPH1 . . . . . . . . . . . . . . . . D ADDR 00B3H NOT USED
+IPL0 . . . . . . . . . . . . . . . . D ADDR 00B8H NOT USED
+IPL1 . . . . . . . . . . . . . . . . D ADDR 00B2H NOT USED
+IT0. . . . . . . . . . . . . . . . . B ADDR 0088H NOT USED
+IT1. . . . . . . . . . . . . . . . . B ADDR 008AH NOT USED
+KBE. . . . . . . . . . . . . . . . . D ADDR 009DH NOT USED
+KBF. . . . . . . . . . . . . . . . . D ADDR 009EH NOT USED
+KBLS . . . . . . . . . . . . . . . . D ADDR 009CH NOT USED
+M. . . . . . . . . . . . . . . . . . D ADDR 0005H NOT USED
+MAIN . . . . . . . . . . . . . . . . C ADDR 0000H
+N. . . . . . . . . . . . . . . . . . X ADDR 0000H NOT USED
+O. . . . . . . . . . . . . . . . . . I ADDR 0000H NOT USED
+OSCCON . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+OV . . . . . . . . . . . . . . . . . B ADDR 00D2H NOT USED
+P. . . . . . . . . . . . . . . . . . B ADDR 00D0H NOT USED
+P0 . . . . . . . . . . . . . . . . . D ADDR 0080H NOT USED
+P1 . . . . . . . . . . . . . . . . . D ADDR 0090H NOT USED
+P1M1 . . . . . . . . . . . . . . . . D ADDR 00D4H NOT USED
+P1M2 . . . . . . . . . . . . . . . . D ADDR 00E2H NOT USED
+P2 . . . . . . . . . . . . . . . . . D ADDR 00A0H NOT USED
+P3 . . . . . . . . . . . . . . . . . D ADDR 00B0H NOT USED
+P3M1 . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+P3M2 . . . . . . . . . . . . . . . . D ADDR 00E3H NOT USED
+P4 . . . . . . . . . . . . . . . . . D ADDR 00C0H NOT USED
+P4M1 . . . . . . . . . . . . . . . . D ADDR 00D6H NOT USED
+P4M2 . . . . . . . . . . . . . . . . D ADDR 00E4H NOT USED
+P5 . . . . . . . . . . . . . . . . . D ADDR 00E8H NOT USED
+PC . . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PCON . . . . . . . . . . . . . . . . D ADDR 0087H NOT USED
+PPCL . . . . . . . . . . . . . . . . B ADDR 00BEH NOT USED
+PS . . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSL. . . . . . . . . . . . . . . . . B ADDR 00BCH NOT USED
+PSW. . . . . . . . . . . . . . . . . D ADDR 00D0H NOT USED
+PT0. . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT0L . . . . . . . . . . . . . . . . B ADDR 00B9H NOT USED
+PT1. . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT1L . . . . . . . . . . . . . . . . B ADDR 00BBH NOT USED
+PT2. . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PT2L . . . . . . . . . . . . . . . . B ADDR 00BDH NOT USED
+PX0. . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX0L . . . . . . . . . . . . . . . . B ADDR 00B8H NOT USED
+PX1. . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+PX1L . . . . . . . . . . . . . . . . B ADDR 00BAH NOT USED
+ demo3 demo - 3 32/13/1907 PAGE 6
+R. . . . . . . . . . . . . . . . . . B ADDR 0000H NOT USED
+RB8. . . . . . . . . . . . . . . . . B ADDR 009AH NOT USED
+RCAP2H . . . . . . . . . . . . . . . D ADDR 00CBH NOT USED
+RCAP2L . . . . . . . . . . . . . . . D ADDR 00CAH NOT USED
+RCLK . . . . . . . . . . . . . . . . B ADDR 00CDH NOT USED
+RD . . . . . . . . . . . . . . . . . B ADDR 00B7H NOT USED
+REN. . . . . . . . . . . . . . . . . B ADDR 009CH NOT USED
+RESET. . . . . . . . . . . . . . . . C ADDR 0000H NOT USED
+RI . . . . . . . . . . . . . . . . . B ADDR 0098H NOT USED
+RS0. . . . . . . . . . . . . . . . . B ADDR 00D3H NOT USED
+RS1. . . . . . . . . . . . . . . . . B ADDR 00D4H NOT USED
+RXD. . . . . . . . . . . . . . . . . B ADDR 00B0H NOT USED
+SADDR. . . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_0. . . . . . . . . . . . . . . D ADDR 00A9H NOT USED
+SADDR_1. . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SADEN. . . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_0. . . . . . . . . . . . . . . D ADDR 00B9H NOT USED
+SADEN_1. . . . . . . . . . . . . . . D ADDR 00BAH NOT USED
+SBUF . . . . . . . . . . . . . . . . D ADDR 0099H NOT USED
+SCON . . . . . . . . . . . . . . . . D ADDR 0098H NOT USED
+SINT . . . . . . . . . . . . . . . . C ADDR 0023H NOT USED
+SM0. . . . . . . . . . . . . . . . . B ADDR 009FH NOT USED
+SM1. . . . . . . . . . . . . . . . . B ADDR 009EH NOT USED
+SM2. . . . . . . . . . . . . . . . . B ADDR 009DH NOT USED
+SP . . . . . . . . . . . . . . . . . D ADDR 0081H NOT USED
+SPCON. . . . . . . . . . . . . . . . D ADDR 00C3H NOT USED
+SPCR . . . . . . . . . . . . . . . . D ADDR 00D5H NOT USED
+SPDAT. . . . . . . . . . . . . . . . D ADDR 00C5H NOT USED
+SPDR . . . . . . . . . . . . . . . . D ADDR 0086H NOT USED
+SPSR . . . . . . . . . . . . . . . . D ADDR 00AAH NOT USED
+SPSTA. . . . . . . . . . . . . . . . D ADDR 00C4H NOT USED
+T0 . . . . . . . . . . . . . . . . . B ADDR 00B4H NOT USED
+T1 . . . . . . . . . . . . . . . . . B ADDR 00B5H NOT USED
+T2CON. . . . . . . . . . . . . . . . D ADDR 00C8H NOT USED
+T2MOD. . . . . . . . . . . . . . . . D ADDR 00C9H NOT USED
+TB8. . . . . . . . . . . . . . . . . B ADDR 009BH NOT USED
+TCLK . . . . . . . . . . . . . . . . B ADDR 00CCH NOT USED
+TCON . . . . . . . . . . . . . . . . D ADDR 0088H NOT USED
+TF0. . . . . . . . . . . . . . . . . B ADDR 008DH NOT USED
+TF1. . . . . . . . . . . . . . . . . B ADDR 008FH NOT USED
+TF2. . . . . . . . . . . . . . . . . B ADDR 00CFH NOT USED
+TH0. . . . . . . . . . . . . . . . . D ADDR 008CH NOT USED
+TH1. . . . . . . . . . . . . . . . . D ADDR 008DH NOT USED
+TH2. . . . . . . . . . . . . . . . . D ADDR 00CDH NOT USED
+TI . . . . . . . . . . . . . . . . . B ADDR 0099H NOT USED
+TIMER0 . . . . . . . . . . . . . . . C ADDR 000BH NOT USED
+TIMER1 . . . . . . . . . . . . . . . C ADDR 001BH NOT USED
+TIMER2 . . . . . . . . . . . . . . . C ADDR 002BH NOT USED
+TL0. . . . . . . . . . . . . . . . . D ADDR 008AH NOT USED
+TL1. . . . . . . . . . . . . . . . . D ADDR 008BH NOT USED
+TL2. . . . . . . . . . . . . . . . . D ADDR 00CCH NOT USED
+TMOD . . . . . . . . . . . . . . . . D ADDR 0089H NOT USED
+TR0. . . . . . . . . . . . . . . . . B ADDR 008CH NOT USED
+TR1. . . . . . . . . . . . . . . . . B ADDR 008EH NOT USED
+TR2. . . . . . . . . . . . . . . . . B ADDR 00CAH NOT USED
+TXD. . . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
+VAR. . . . . . . . . . . . . . . . . NUMB FFF2H NOT USED REDEFINABLE
+WDTCON . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTPRG . . . . . . . . . . . . . . . D ADDR 00A7H NOT USED
+WDTRST . . . . . . . . . . . . . . . D ADDR 00A6H NOT USED
+WR . . . . . . . . . . . . . . . . . B ADDR 00B6H NOT USED
+X. . . . . . . . . . . . . . . . . . C ADDR 0002H NOT USED
+Y. . . . . . . . . . . . . . . . . . C ADDR 0004H NOT USED \ No newline at end of file
diff --git a/demo/keypad_display b/demo/keypad_display
new file mode 100644
index 0000000..4bea3f5
--- /dev/null
+++ b/demo/keypad_display
Binary files differ
diff --git a/demo/keypad_display.adb b/demo/keypad_display.adb
new file mode 100644
index 0000000..ff7f769
--- /dev/null
+++ b/demo/keypad_display.adb
@@ -0,0 +1,106 @@
+M:keypad_display
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+S:G$state$0$0({1}SC:S),E,0,0
+S:G$row$0$0({2}SI:S),E,0,0
+S:G$P0$0$0({1}SC:U),I,0,0
+S:G$SP$0$0({1}SC:U),I,0,0
+S:G$DPL$0$0({1}SC:U),I,0,0
+S:G$DPH$0$0({1}SC:U),I,0,0
+S:G$PCON$0$0({1}SC:U),I,0,0
+S:G$TCON$0$0({1}SC:U),I,0,0
+S:G$TMOD$0$0({1}SC:U),I,0,0
+S:G$TL0$0$0({1}SC:U),I,0,0
+S:G$TL1$0$0({1}SC:U),I,0,0
+S:G$TH0$0$0({1}SC:U),I,0,0
+S:G$TH1$0$0({1}SC:U),I,0,0
+S:G$P1$0$0({1}SC:U),I,0,0
+S:G$SCON$0$0({1}SC:U),I,0,0
+S:G$SBUF$0$0({1}SC:U),I,0,0
+S:G$P2$0$0({1}SC:U),I,0,0
+S:G$IE$0$0({1}SC:U),I,0,0
+S:G$P3$0$0({1}SC:U),I,0,0
+S:G$IP$0$0({1}SC:U),I,0,0
+S:G$PSW$0$0({1}SC:U),I,0,0
+S:G$ACC$0$0({1}SC:U),I,0,0
+S:G$B$0$0({1}SC:U),I,0,0
+S:G$P0_0$0$0({1}SX:U),J,0,0
+S:G$P0_1$0$0({1}SX:U),J,0,0
+S:G$P0_2$0$0({1}SX:U),J,0,0
+S:G$P0_3$0$0({1}SX:U),J,0,0
+S:G$P0_4$0$0({1}SX:U),J,0,0
+S:G$P0_5$0$0({1}SX:U),J,0,0
+S:G$P0_6$0$0({1}SX:U),J,0,0
+S:G$P0_7$0$0({1}SX:U),J,0,0
+S:G$IT0$0$0({1}SX:U),J,0,0
+S:G$IE0$0$0({1}SX:U),J,0,0
+S:G$IT1$0$0({1}SX:U),J,0,0
+S:G$IE1$0$0({1}SX:U),J,0,0
+S:G$TR0$0$0({1}SX:U),J,0,0
+S:G$TF0$0$0({1}SX:U),J,0,0
+S:G$TR1$0$0({1}SX:U),J,0,0
+S:G$TF1$0$0({1}SX:U),J,0,0
+S:G$P1_0$0$0({1}SX:U),J,0,0
+S:G$P1_1$0$0({1}SX:U),J,0,0
+S:G$P1_2$0$0({1}SX:U),J,0,0
+S:G$P1_3$0$0({1}SX:U),J,0,0
+S:G$P1_4$0$0({1}SX:U),J,0,0
+S:G$P1_5$0$0({1}SX:U),J,0,0
+S:G$P1_6$0$0({1}SX:U),J,0,0
+S:G$P1_7$0$0({1}SX:U),J,0,0
+S:G$RI$0$0({1}SX:U),J,0,0
+S:G$TI$0$0({1}SX:U),J,0,0
+S:G$RB8$0$0({1}SX:U),J,0,0
+S:G$TB8$0$0({1}SX:U),J,0,0
+S:G$REN$0$0({1}SX:U),J,0,0
+S:G$SM2$0$0({1}SX:U),J,0,0
+S:G$SM1$0$0({1}SX:U),J,0,0
+S:G$SM0$0$0({1}SX:U),J,0,0
+S:G$P2_0$0$0({1}SX:U),J,0,0
+S:G$P2_1$0$0({1}SX:U),J,0,0
+S:G$P2_2$0$0({1}SX:U),J,0,0
+S:G$P2_3$0$0({1}SX:U),J,0,0
+S:G$P2_4$0$0({1}SX:U),J,0,0
+S:G$P2_5$0$0({1}SX:U),J,0,0
+S:G$P2_6$0$0({1}SX:U),J,0,0
+S:G$P2_7$0$0({1}SX:U),J,0,0
+S:G$EX0$0$0({1}SX:U),J,0,0
+S:G$ET0$0$0({1}SX:U),J,0,0
+S:G$EX1$0$0({1}SX:U),J,0,0
+S:G$ET1$0$0({1}SX:U),J,0,0
+S:G$ES$0$0({1}SX:U),J,0,0
+S:G$EA$0$0({1}SX:U),J,0,0
+S:G$P3_0$0$0({1}SX:U),J,0,0
+S:G$P3_1$0$0({1}SX:U),J,0,0
+S:G$P3_2$0$0({1}SX:U),J,0,0
+S:G$P3_3$0$0({1}SX:U),J,0,0
+S:G$P3_4$0$0({1}SX:U),J,0,0
+S:G$P3_5$0$0({1}SX:U),J,0,0
+S:G$P3_6$0$0({1}SX:U),J,0,0
+S:G$P3_7$0$0({1}SX:U),J,0,0
+S:G$RXD$0$0({1}SX:U),J,0,0
+S:G$TXD$0$0({1}SX:U),J,0,0
+S:G$INT0$0$0({1}SX:U),J,0,0
+S:G$INT1$0$0({1}SX:U),J,0,0
+S:G$T0$0$0({1}SX:U),J,0,0
+S:G$T1$0$0({1}SX:U),J,0,0
+S:G$WR$0$0({1}SX:U),J,0,0
+S:G$RD$0$0({1}SX:U),J,0,0
+S:G$PX0$0$0({1}SX:U),J,0,0
+S:G$PT0$0$0({1}SX:U),J,0,0
+S:G$PX1$0$0({1}SX:U),J,0,0
+S:G$PT1$0$0({1}SX:U),J,0,0
+S:G$PS$0$0({1}SX:U),J,0,0
+S:G$P$0$0({1}SX:U),J,0,0
+S:G$F1$0$0({1}SX:U),J,0,0
+S:G$OV$0$0({1}SX:U),J,0,0
+S:G$RS0$0$0({1}SX:U),J,0,0
+S:G$RS1$0$0({1}SX:U),J,0,0
+S:G$F0$0$0({1}SX:U),J,0,0
+S:G$AC$0$0({1}SX:U),J,0,0
+S:G$CY$0$0({1}SX:U),J,0,0
+S:G$main$0$0({2}DF,SI:S),C,0,0
+S:Fkeypad_display$keypad$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_0$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_1$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_2$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_3$0$0({4}DA4,SC:S),D,0,0
diff --git a/demo/keypad_display.asm b/demo/keypad_display.asm
new file mode 100644
index 0000000..a216cbe
--- /dev/null
+++ b/demo/keypad_display.asm
@@ -0,0 +1,624 @@
+;--------------------------------------------------------
+; File Created by SDCC : free open source ANSI-C Compiler
+; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+; This file was generated Tue Oct 27 23:03:55 2009
+;--------------------------------------------------------
+ .module keypad_display
+ .optsdcc -mmcs51 --model-small
+
+;--------------------------------------------------------
+; Public variables in this module
+;--------------------------------------------------------
+ .globl _main
+ .globl _CY
+ .globl _AC
+ .globl _F0
+ .globl _RS1
+ .globl _RS0
+ .globl _OV
+ .globl _F1
+ .globl _P
+ .globl _PS
+ .globl _PT1
+ .globl _PX1
+ .globl _PT0
+ .globl _PX0
+ .globl _RD
+ .globl _WR
+ .globl _T1
+ .globl _T0
+ .globl _INT1
+ .globl _INT0
+ .globl _TXD
+ .globl _RXD
+ .globl _P3_7
+ .globl _P3_6
+ .globl _P3_5
+ .globl _P3_4
+ .globl _P3_3
+ .globl _P3_2
+ .globl _P3_1
+ .globl _P3_0
+ .globl _EA
+ .globl _ES
+ .globl _ET1
+ .globl _EX1
+ .globl _ET0
+ .globl _EX0
+ .globl _P2_7
+ .globl _P2_6
+ .globl _P2_5
+ .globl _P2_4
+ .globl _P2_3
+ .globl _P2_2
+ .globl _P2_1
+ .globl _P2_0
+ .globl _SM0
+ .globl _SM1
+ .globl _SM2
+ .globl _REN
+ .globl _TB8
+ .globl _RB8
+ .globl _TI
+ .globl _RI
+ .globl _P1_7
+ .globl _P1_6
+ .globl _P1_5
+ .globl _P1_4
+ .globl _P1_3
+ .globl _P1_2
+ .globl _P1_1
+ .globl _P1_0
+ .globl _TF1
+ .globl _TR1
+ .globl _TF0
+ .globl _TR0
+ .globl _IE1
+ .globl _IT1
+ .globl _IE0
+ .globl _IT0
+ .globl _P0_7
+ .globl _P0_6
+ .globl _P0_5
+ .globl _P0_4
+ .globl _P0_3
+ .globl _P0_2
+ .globl _P0_1
+ .globl _P0_0
+ .globl _B
+ .globl _ACC
+ .globl _PSW
+ .globl _IP
+ .globl _P3
+ .globl _IE
+ .globl _P2
+ .globl _SBUF
+ .globl _SCON
+ .globl _P1
+ .globl _TH1
+ .globl _TH0
+ .globl _TL1
+ .globl _TL0
+ .globl _TMOD
+ .globl _TCON
+ .globl _PCON
+ .globl _DPH
+ .globl _DPL
+ .globl _SP
+ .globl _P0
+ .globl _row
+ .globl _state
+;--------------------------------------------------------
+; special function registers
+;--------------------------------------------------------
+ .area RSEG (DATA)
+G$P0$0$0 == 0x0080
+_P0 = 0x0080
+G$SP$0$0 == 0x0081
+_SP = 0x0081
+G$DPL$0$0 == 0x0082
+_DPL = 0x0082
+G$DPH$0$0 == 0x0083
+_DPH = 0x0083
+G$PCON$0$0 == 0x0087
+_PCON = 0x0087
+G$TCON$0$0 == 0x0088
+_TCON = 0x0088
+G$TMOD$0$0 == 0x0089
+_TMOD = 0x0089
+G$TL0$0$0 == 0x008a
+_TL0 = 0x008a
+G$TL1$0$0 == 0x008b
+_TL1 = 0x008b
+G$TH0$0$0 == 0x008c
+_TH0 = 0x008c
+G$TH1$0$0 == 0x008d
+_TH1 = 0x008d
+G$P1$0$0 == 0x0090
+_P1 = 0x0090
+G$SCON$0$0 == 0x0098
+_SCON = 0x0098
+G$SBUF$0$0 == 0x0099
+_SBUF = 0x0099
+G$P2$0$0 == 0x00a0
+_P2 = 0x00a0
+G$IE$0$0 == 0x00a8
+_IE = 0x00a8
+G$P3$0$0 == 0x00b0
+_P3 = 0x00b0
+G$IP$0$0 == 0x00b8
+_IP = 0x00b8
+G$PSW$0$0 == 0x00d0
+_PSW = 0x00d0
+G$ACC$0$0 == 0x00e0
+_ACC = 0x00e0
+G$B$0$0 == 0x00f0
+_B = 0x00f0
+;--------------------------------------------------------
+; special function bits
+;--------------------------------------------------------
+ .area RSEG (DATA)
+G$P0_0$0$0 == 0x0080
+_P0_0 = 0x0080
+G$P0_1$0$0 == 0x0081
+_P0_1 = 0x0081
+G$P0_2$0$0 == 0x0082
+_P0_2 = 0x0082
+G$P0_3$0$0 == 0x0083
+_P0_3 = 0x0083
+G$P0_4$0$0 == 0x0084
+_P0_4 = 0x0084
+G$P0_5$0$0 == 0x0085
+_P0_5 = 0x0085
+G$P0_6$0$0 == 0x0086
+_P0_6 = 0x0086
+G$P0_7$0$0 == 0x0087
+_P0_7 = 0x0087
+G$IT0$0$0 == 0x0088
+_IT0 = 0x0088
+G$IE0$0$0 == 0x0089
+_IE0 = 0x0089
+G$IT1$0$0 == 0x008a
+_IT1 = 0x008a
+G$IE1$0$0 == 0x008b
+_IE1 = 0x008b
+G$TR0$0$0 == 0x008c
+_TR0 = 0x008c
+G$TF0$0$0 == 0x008d
+_TF0 = 0x008d
+G$TR1$0$0 == 0x008e
+_TR1 = 0x008e
+G$TF1$0$0 == 0x008f
+_TF1 = 0x008f
+G$P1_0$0$0 == 0x0090
+_P1_0 = 0x0090
+G$P1_1$0$0 == 0x0091
+_P1_1 = 0x0091
+G$P1_2$0$0 == 0x0092
+_P1_2 = 0x0092
+G$P1_3$0$0 == 0x0093
+_P1_3 = 0x0093
+G$P1_4$0$0 == 0x0094
+_P1_4 = 0x0094
+G$P1_5$0$0 == 0x0095
+_P1_5 = 0x0095
+G$P1_6$0$0 == 0x0096
+_P1_6 = 0x0096
+G$P1_7$0$0 == 0x0097
+_P1_7 = 0x0097
+G$RI$0$0 == 0x0098
+_RI = 0x0098
+G$TI$0$0 == 0x0099
+_TI = 0x0099
+G$RB8$0$0 == 0x009a
+_RB8 = 0x009a
+G$TB8$0$0 == 0x009b
+_TB8 = 0x009b
+G$REN$0$0 == 0x009c
+_REN = 0x009c
+G$SM2$0$0 == 0x009d
+_SM2 = 0x009d
+G$SM1$0$0 == 0x009e
+_SM1 = 0x009e
+G$SM0$0$0 == 0x009f
+_SM0 = 0x009f
+G$P2_0$0$0 == 0x00a0
+_P2_0 = 0x00a0
+G$P2_1$0$0 == 0x00a1
+_P2_1 = 0x00a1
+G$P2_2$0$0 == 0x00a2
+_P2_2 = 0x00a2
+G$P2_3$0$0 == 0x00a3
+_P2_3 = 0x00a3
+G$P2_4$0$0 == 0x00a4
+_P2_4 = 0x00a4
+G$P2_5$0$0 == 0x00a5
+_P2_5 = 0x00a5
+G$P2_6$0$0 == 0x00a6
+_P2_6 = 0x00a6
+G$P2_7$0$0 == 0x00a7
+_P2_7 = 0x00a7
+G$EX0$0$0 == 0x00a8
+_EX0 = 0x00a8
+G$ET0$0$0 == 0x00a9
+_ET0 = 0x00a9
+G$EX1$0$0 == 0x00aa
+_EX1 = 0x00aa
+G$ET1$0$0 == 0x00ab
+_ET1 = 0x00ab
+G$ES$0$0 == 0x00ac
+_ES = 0x00ac
+G$EA$0$0 == 0x00af
+_EA = 0x00af
+G$P3_0$0$0 == 0x00b0
+_P3_0 = 0x00b0
+G$P3_1$0$0 == 0x00b1
+_P3_1 = 0x00b1
+G$P3_2$0$0 == 0x00b2
+_P3_2 = 0x00b2
+G$P3_3$0$0 == 0x00b3
+_P3_3 = 0x00b3
+G$P3_4$0$0 == 0x00b4
+_P3_4 = 0x00b4
+G$P3_5$0$0 == 0x00b5
+_P3_5 = 0x00b5
+G$P3_6$0$0 == 0x00b6
+_P3_6 = 0x00b6
+G$P3_7$0$0 == 0x00b7
+_P3_7 = 0x00b7
+G$RXD$0$0 == 0x00b0
+_RXD = 0x00b0
+G$TXD$0$0 == 0x00b1
+_TXD = 0x00b1
+G$INT0$0$0 == 0x00b2
+_INT0 = 0x00b2
+G$INT1$0$0 == 0x00b3
+_INT1 = 0x00b3
+G$T0$0$0 == 0x00b4
+_T0 = 0x00b4
+G$T1$0$0 == 0x00b5
+_T1 = 0x00b5
+G$WR$0$0 == 0x00b6
+_WR = 0x00b6
+G$RD$0$0 == 0x00b7
+_RD = 0x00b7
+G$PX0$0$0 == 0x00b8
+_PX0 = 0x00b8
+G$PT0$0$0 == 0x00b9
+_PT0 = 0x00b9
+G$PX1$0$0 == 0x00ba
+_PX1 = 0x00ba
+G$PT1$0$0 == 0x00bb
+_PT1 = 0x00bb
+G$PS$0$0 == 0x00bc
+_PS = 0x00bc
+G$P$0$0 == 0x00d0
+_P = 0x00d0
+G$F1$0$0 == 0x00d1
+_F1 = 0x00d1
+G$OV$0$0 == 0x00d2
+_OV = 0x00d2
+G$RS0$0$0 == 0x00d3
+_RS0 = 0x00d3
+G$RS1$0$0 == 0x00d4
+_RS1 = 0x00d4
+G$F0$0$0 == 0x00d5
+_F0 = 0x00d5
+G$AC$0$0 == 0x00d6
+_AC = 0x00d6
+G$CY$0$0 == 0x00d7
+_CY = 0x00d7
+;--------------------------------------------------------
+; overlayable register banks
+;--------------------------------------------------------
+ .area REG_BANK_0 (REL,OVR,DATA)
+ .ds 8
+;--------------------------------------------------------
+; internal ram data
+;--------------------------------------------------------
+ .area DSEG (DATA)
+G$state$0$0==.
+_state::
+ .ds 1
+G$row$0$0==.
+_row::
+ .ds 2
+;--------------------------------------------------------
+; overlayable items in internal ram
+;--------------------------------------------------------
+ .area OSEG (OVR,DATA)
+;--------------------------------------------------------
+; Stack segment in internal ram
+;--------------------------------------------------------
+ .area SSEG (DATA)
+__start__stack:
+ .ds 1
+
+;--------------------------------------------------------
+; indirectly addressable internal ram data
+;--------------------------------------------------------
+ .area ISEG (DATA)
+;--------------------------------------------------------
+; absolute internal ram data
+;--------------------------------------------------------
+ .area IABS (ABS,DATA)
+ .area IABS (ABS,DATA)
+;--------------------------------------------------------
+; bit data
+;--------------------------------------------------------
+ .area BSEG (BIT)
+;--------------------------------------------------------
+; paged external ram data
+;--------------------------------------------------------
+ .area PSEG (PAG,XDATA)
+;--------------------------------------------------------
+; external ram data
+;--------------------------------------------------------
+ .area XSEG (XDATA)
+;--------------------------------------------------------
+; absolute external ram data
+;--------------------------------------------------------
+ .area XABS (ABS,XDATA)
+;--------------------------------------------------------
+; external initialized ram data
+;--------------------------------------------------------
+ .area XISEG (XDATA)
+ .area HOME (CODE)
+ .area GSINIT0 (CODE)
+ .area GSINIT1 (CODE)
+ .area GSINIT2 (CODE)
+ .area GSINIT3 (CODE)
+ .area GSINIT4 (CODE)
+ .area GSINIT5 (CODE)
+ .area GSINIT (CODE)
+ .area GSFINAL (CODE)
+ .area CSEG (CODE)
+;--------------------------------------------------------
+; interrupt vector
+;--------------------------------------------------------
+ .area HOME (CODE)
+__interrupt_vect:
+ ljmp __sdcc_gsinit_startup
+;--------------------------------------------------------
+; global & static initialisations
+;--------------------------------------------------------
+ .area HOME (CODE)
+ .area GSINIT (CODE)
+ .area GSFINAL (CODE)
+ .area GSINIT (CODE)
+ .globl __sdcc_gsinit_startup
+ .globl __sdcc_program_startup
+ .globl __start__stack
+ .globl __mcs51_genXINIT
+ .globl __mcs51_genXRAMCLEAR
+ .globl __mcs51_genRAMCLEAR
+ .area GSFINAL (CODE)
+ ljmp __sdcc_program_startup
+;--------------------------------------------------------
+; Home
+;--------------------------------------------------------
+ .area HOME (CODE)
+ .area HOME (CODE)
+__sdcc_program_startup:
+ lcall _main
+; return from main will lock up
+ sjmp .
+;--------------------------------------------------------
+; code
+;--------------------------------------------------------
+ .area CSEG (CODE)
+;------------------------------------------------------------
+;Allocation info for local variables in function 'main'
+;------------------------------------------------------------
+;------------------------------------------------------------
+ G$main$0$0 ==.
+ C$keypad_display.c$38$0$0 ==.
+; keypad_display.c:38: int main()
+; -----------------------------------------
+; function main
+; -----------------------------------------
+_main:
+ ar2 = 0x02
+ ar3 = 0x03
+ ar4 = 0x04
+ ar5 = 0x05
+ ar6 = 0x06
+ ar7 = 0x07
+ ar0 = 0x00
+ ar1 = 0x01
+ C$keypad_display.c$40$1$1 ==.
+; keypad_display.c:40: while(1) {
+00123$:
+ C$keypad_display.c$41$2$2 ==.
+; keypad_display.c:41: for(row=0; row<4; row++) {
+ clr a
+ mov _row,a
+ mov (_row + 1),a
+00118$:
+ clr c
+ mov a,_row
+ subb a,#0x04
+ mov a,(_row + 1)
+ xrl a,#0x80
+ subb a,#0x80
+ jnc 00123$
+ C$keypad_display.c$42$3$3 ==.
+; keypad_display.c:42: P1=keypad[row];
+ mov a,_row
+ add a,#_keypad
+ mov dpl,a
+ mov a,(_row + 1)
+ addc a,#(_keypad >> 8)
+ mov dph,a
+ clr a
+ movc a,@a+dptr
+ mov _P1,a
+ C$keypad_display.c$48$3$3 ==.
+; keypad_display.c:48: _endasm;
+
+ mov _state, P1
+
+ C$keypad_display.c$53$3$3 ==.
+; keypad_display.c:53: state&=0x0f;
+ anl _state,#0x0F
+ C$keypad_display.c$54$3$3 ==.
+; keypad_display.c:54: state^=0x0f;
+ xrl _state,#0x0F
+ C$keypad_display.c$56$3$3 ==.
+; keypad_display.c:56: if(state & 1) {
+ mov a,_state
+ jnb acc.0,00111$
+ C$keypad_display.c$57$4$4 ==.
+; keypad_display.c:57: state=0;
+ mov _state,#0x00
+ sjmp 00112$
+00111$:
+ C$keypad_display.c$58$3$3 ==.
+; keypad_display.c:58: } else if(state & 2) {
+ mov a,_state
+ jnb acc.1,00108$
+ C$keypad_display.c$59$4$5 ==.
+; keypad_display.c:59: state=1;
+ mov _state,#0x01
+ sjmp 00112$
+00108$:
+ C$keypad_display.c$60$3$3 ==.
+; keypad_display.c:60: } else if(state & 4) {
+ mov a,_state
+ jnb acc.2,00105$
+ C$keypad_display.c$61$4$6 ==.
+; keypad_display.c:61: state=2;
+ mov _state,#0x02
+ sjmp 00112$
+00105$:
+ C$keypad_display.c$62$3$3 ==.
+; keypad_display.c:62: } else if(state & 8) {
+ mov a,_state
+ jb acc.3,00142$
+ ljmp 00120$
+00142$:
+ C$keypad_display.c$63$4$7 ==.
+; keypad_display.c:63: state=3;
+ mov _state,#0x03
+ C$keypad_display.c$65$3$3 ==.
+; keypad_display.c:65: continue;
+00112$:
+ C$keypad_display.c$68$3$3 ==.
+; keypad_display.c:68: switch(row) {
+ clr a
+ cjne a,_row,00143$
+ clr a
+ cjne a,(_row + 1),00143$
+ sjmp 00113$
+00143$:
+ mov a,#0x01
+ cjne a,_row,00144$
+ clr a
+ cjne a,(_row + 1),00144$
+ sjmp 00114$
+00144$:
+ mov a,#0x02
+ cjne a,_row,00145$
+ clr a
+ cjne a,(_row + 1),00145$
+ sjmp 00115$
+00145$:
+ mov a,#0x03
+ cjne a,_row,00146$
+ clr a
+ cjne a,(_row + 1),00146$
+ sjmp 00116$
+00146$:
+ C$keypad_display.c$69$4$9 ==.
+; keypad_display.c:69: case 0:
+ sjmp 00120$
+00113$:
+ C$keypad_display.c$70$4$9 ==.
+; keypad_display.c:70: P3=display_0[state];
+ mov a,_state
+ mov dptr,#_display_0
+ movc a,@a+dptr
+ mov _P3,a
+ C$keypad_display.c$71$4$9 ==.
+; keypad_display.c:71: break;
+ C$keypad_display.c$72$4$9 ==.
+; keypad_display.c:72: case 1:
+ sjmp 00120$
+00114$:
+ C$keypad_display.c$73$4$9 ==.
+; keypad_display.c:73: P3=display_1[state];
+ mov a,_state
+ mov dptr,#_display_1
+ movc a,@a+dptr
+ mov _P3,a
+ C$keypad_display.c$74$4$9 ==.
+; keypad_display.c:74: break;
+ C$keypad_display.c$75$4$9 ==.
+; keypad_display.c:75: case 2:
+ sjmp 00120$
+00115$:
+ C$keypad_display.c$76$4$9 ==.
+; keypad_display.c:76: P3=display_2[state];
+ mov a,_state
+ mov dptr,#_display_2
+ movc a,@a+dptr
+ mov _P3,a
+ C$keypad_display.c$77$4$9 ==.
+; keypad_display.c:77: break;
+ C$keypad_display.c$78$4$9 ==.
+; keypad_display.c:78: case 3:
+ sjmp 00120$
+00116$:
+ C$keypad_display.c$79$4$9 ==.
+; keypad_display.c:79: P3=display_3[state];
+ mov a,_state
+ mov dptr,#_display_3
+ movc a,@a+dptr
+ mov _P3,a
+ C$keypad_display.c$81$2$2 ==.
+; keypad_display.c:81: }
+00120$:
+ C$keypad_display.c$41$2$2 ==.
+; keypad_display.c:41: for(row=0; row<4; row++) {
+ inc _row
+ clr a
+ cjne a,_row,00147$
+ inc (_row + 1)
+00147$:
+ C$keypad_display.c$84$1$1 ==.
+ XG$main$0$0 ==.
+ ljmp 00118$
+ .area CSEG (CODE)
+ .area CONST (CODE)
+Fkeypad_display$keypad$0$0 == .
+_keypad:
+ .db #0xEF
+ .db #0xDF
+ .db #0xBF
+ .db #0x7F
+Fkeypad_display$display_0$0$0 == .
+_display_0:
+ .db #0xF9
+ .db #0x64
+ .db #0x70
+ .db #0x48
+Fkeypad_display$display_1$0$0 == .
+_display_1:
+ .db #0x59
+ .db #0x52
+ .db #0x42
+ .db #0x40
+Fkeypad_display$display_2$0$0 == .
+_display_2:
+ .db #0xF8
+ .db #0x40
+ .db #0x50
+ .db #0xC6
+Fkeypad_display$display_3$0$0 == .
+_display_3:
+ .db #0x79
+ .db #0xC0
+ .db #0x49
+ .db #0xC0
+ .area XINIT (CODE)
+ .area CABS (ABS,CODE)
diff --git a/demo/keypad_display.c b/demo/keypad_display.c
new file mode 100644
index 0000000..e6cadf6
--- /dev/null
+++ b/demo/keypad_display.c
@@ -0,0 +1,84 @@
+/**
+ * Demonstration code for MCU 8051 IDE
+ *
+ * Create virtual multiplexed LED display
+ * [Main menu] -> [Virtual HW] -> [Open]
+ * and open file keypad_display.vhw .
+ * Then press F2 and F9 to start simulation.
+ *
+ * Notes:
+ * F9 - stop simulation
+ * F2 - shutdown simulator
+ *
+ * @file keypad_display.c
+ */
+
+#include <8051.h>
+#define USE_INLINE_ASM 1
+
+static const char keypad[] = {
+ 0xEF, 0xDF, 0xBF, 0x7F
+};
+static const char display_0[] = {
+ 0xf9, 0x64, 0x70, 0x48
+};
+static const char display_1[] = {
+ 0x59, 0x52, 0x42, 0x40
+};
+static const char display_2[] = {
+ 0xf8, 0x40, 0x50, 0xc6
+};
+static const char display_3[] = {
+ 0x79, 0xc0, 0x49, 0xc0
+};
+
+char state;
+int row;
+
+int main()
+{
+ while(1) {
+ for(row=0; row<4; row++) {
+ P1=keypad[row];
+
+ #if USE_INLINE_ASM
+ // Inline assembler
+ _asm
+ mov _state, P1
+ _endasm;
+ #else
+ state=P1;
+ #endif
+
+ state&=0x0f;
+ state^=0x0f;
+
+ if(state & 1) {
+ state=0;
+ } else if(state & 2) {
+ state=1;
+ } else if(state & 4) {
+ state=2;
+ } else if(state & 8) {
+ state=3;
+ } else {
+ continue;
+ }
+
+ switch(row) {
+ case 0:
+ P3=display_0[state];
+ break;
+ case 1:
+ P3=display_1[state];
+ break;
+ case 2:
+ P3=display_2[state];
+ break;
+ case 3:
+ P3=display_3[state];
+ break;
+ }
+ }
+ }
+}
diff --git a/demo/keypad_display.cdb b/demo/keypad_display.cdb
new file mode 100644
index 0000000..a0420fc
--- /dev/null
+++ b/demo/keypad_display.cdb
@@ -0,0 +1,328 @@
+M:keypad_display
+F:G$main$0$0({2}DF,SI:S),C,0,0,0,0,0
+S:G$state$0$0({1}SC:S),E,0,0
+S:G$row$0$0({2}SI:S),E,0,0
+S:G$P0$0$0({1}SC:U),I,0,0
+S:G$SP$0$0({1}SC:U),I,0,0
+S:G$DPL$0$0({1}SC:U),I,0,0
+S:G$DPH$0$0({1}SC:U),I,0,0
+S:G$PCON$0$0({1}SC:U),I,0,0
+S:G$TCON$0$0({1}SC:U),I,0,0
+S:G$TMOD$0$0({1}SC:U),I,0,0
+S:G$TL0$0$0({1}SC:U),I,0,0
+S:G$TL1$0$0({1}SC:U),I,0,0
+S:G$TH0$0$0({1}SC:U),I,0,0
+S:G$TH1$0$0({1}SC:U),I,0,0
+S:G$P1$0$0({1}SC:U),I,0,0
+S:G$SCON$0$0({1}SC:U),I,0,0
+S:G$SBUF$0$0({1}SC:U),I,0,0
+S:G$P2$0$0({1}SC:U),I,0,0
+S:G$IE$0$0({1}SC:U),I,0,0
+S:G$P3$0$0({1}SC:U),I,0,0
+S:G$IP$0$0({1}SC:U),I,0,0
+S:G$PSW$0$0({1}SC:U),I,0,0
+S:G$ACC$0$0({1}SC:U),I,0,0
+S:G$B$0$0({1}SC:U),I,0,0
+S:G$P0_0$0$0({1}SX:U),J,0,0
+S:G$P0_1$0$0({1}SX:U),J,0,0
+S:G$P0_2$0$0({1}SX:U),J,0,0
+S:G$P0_3$0$0({1}SX:U),J,0,0
+S:G$P0_4$0$0({1}SX:U),J,0,0
+S:G$P0_5$0$0({1}SX:U),J,0,0
+S:G$P0_6$0$0({1}SX:U),J,0,0
+S:G$P0_7$0$0({1}SX:U),J,0,0
+S:G$IT0$0$0({1}SX:U),J,0,0
+S:G$IE0$0$0({1}SX:U),J,0,0
+S:G$IT1$0$0({1}SX:U),J,0,0
+S:G$IE1$0$0({1}SX:U),J,0,0
+S:G$TR0$0$0({1}SX:U),J,0,0
+S:G$TF0$0$0({1}SX:U),J,0,0
+S:G$TR1$0$0({1}SX:U),J,0,0
+S:G$TF1$0$0({1}SX:U),J,0,0
+S:G$P1_0$0$0({1}SX:U),J,0,0
+S:G$P1_1$0$0({1}SX:U),J,0,0
+S:G$P1_2$0$0({1}SX:U),J,0,0
+S:G$P1_3$0$0({1}SX:U),J,0,0
+S:G$P1_4$0$0({1}SX:U),J,0,0
+S:G$P1_5$0$0({1}SX:U),J,0,0
+S:G$P1_6$0$0({1}SX:U),J,0,0
+S:G$P1_7$0$0({1}SX:U),J,0,0
+S:G$RI$0$0({1}SX:U),J,0,0
+S:G$TI$0$0({1}SX:U),J,0,0
+S:G$RB8$0$0({1}SX:U),J,0,0
+S:G$TB8$0$0({1}SX:U),J,0,0
+S:G$REN$0$0({1}SX:U),J,0,0
+S:G$SM2$0$0({1}SX:U),J,0,0
+S:G$SM1$0$0({1}SX:U),J,0,0
+S:G$SM0$0$0({1}SX:U),J,0,0
+S:G$P2_0$0$0({1}SX:U),J,0,0
+S:G$P2_1$0$0({1}SX:U),J,0,0
+S:G$P2_2$0$0({1}SX:U),J,0,0
+S:G$P2_3$0$0({1}SX:U),J,0,0
+S:G$P2_4$0$0({1}SX:U),J,0,0
+S:G$P2_5$0$0({1}SX:U),J,0,0
+S:G$P2_6$0$0({1}SX:U),J,0,0
+S:G$P2_7$0$0({1}SX:U),J,0,0
+S:G$EX0$0$0({1}SX:U),J,0,0
+S:G$ET0$0$0({1}SX:U),J,0,0
+S:G$EX1$0$0({1}SX:U),J,0,0
+S:G$ET1$0$0({1}SX:U),J,0,0
+S:G$ES$0$0({1}SX:U),J,0,0
+S:G$EA$0$0({1}SX:U),J,0,0
+S:G$P3_0$0$0({1}SX:U),J,0,0
+S:G$P3_1$0$0({1}SX:U),J,0,0
+S:G$P3_2$0$0({1}SX:U),J,0,0
+S:G$P3_3$0$0({1}SX:U),J,0,0
+S:G$P3_4$0$0({1}SX:U),J,0,0
+S:G$P3_5$0$0({1}SX:U),J,0,0
+S:G$P3_6$0$0({1}SX:U),J,0,0
+S:G$P3_7$0$0({1}SX:U),J,0,0
+S:G$RXD$0$0({1}SX:U),J,0,0
+S:G$TXD$0$0({1}SX:U),J,0,0
+S:G$INT0$0$0({1}SX:U),J,0,0
+S:G$INT1$0$0({1}SX:U),J,0,0
+S:G$T0$0$0({1}SX:U),J,0,0
+S:G$T1$0$0({1}SX:U),J,0,0
+S:G$WR$0$0({1}SX:U),J,0,0
+S:G$RD$0$0({1}SX:U),J,0,0
+S:G$PX0$0$0({1}SX:U),J,0,0
+S:G$PT0$0$0({1}SX:U),J,0,0
+S:G$PX1$0$0({1}SX:U),J,0,0
+S:G$PT1$0$0({1}SX:U),J,0,0
+S:G$PS$0$0({1}SX:U),J,0,0
+S:G$P$0$0({1}SX:U),J,0,0
+S:G$F1$0$0({1}SX:U),J,0,0
+S:G$OV$0$0({1}SX:U),J,0,0
+S:G$RS0$0$0({1}SX:U),J,0,0
+S:G$RS1$0$0({1}SX:U),J,0,0
+S:G$F0$0$0({1}SX:U),J,0,0
+S:G$AC$0$0({1}SX:U),J,0,0
+S:G$CY$0$0({1}SX:U),J,0,0
+S:G$main$0$0({2}DF,SI:S),C,0,0
+S:Fkeypad_display$keypad$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_0$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_1$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_2$0$0({4}DA4,SC:S),D,0,0
+S:Fkeypad_display$display_3$0$0({4}DA4,SC:S),D,0,0
+L:G$P0$0$0:80
+L:G$P0_0$0$0:80
+L:G$P0_1$0$0:81
+L:G$SP$0$0:81
+L:G$DPL$0$0:82
+L:G$P0_2$0$0:82
+L:G$DPH$0$0:83
+L:G$P0_3$0$0:83
+L:G$P0_4$0$0:84
+L:G$P0_5$0$0:85
+L:G$P0_6$0$0:86
+L:G$P0_7$0$0:87
+L:G$PCON$0$0:87
+L:G$IT0$0$0:88
+L:G$TCON$0$0:88
+L:G$IE0$0$0:89
+L:G$TMOD$0$0:89
+L:G$IT1$0$0:8A
+L:G$TL0$0$0:8A
+L:G$IE1$0$0:8B
+L:G$TL1$0$0:8B
+L:G$TH0$0$0:8C
+L:G$TR0$0$0:8C
+L:G$TF0$0$0:8D
+L:G$TH1$0$0:8D
+L:G$TR1$0$0:8E
+L:G$TF1$0$0:8F
+L:G$P1$0$0:90
+L:G$P1_0$0$0:90
+L:G$P1_1$0$0:91
+L:G$P1_2$0$0:92
+L:G$P1_3$0$0:93
+L:G$P1_4$0$0:94
+L:G$P1_5$0$0:95
+L:G$P1_6$0$0:96
+L:G$P1_7$0$0:97
+L:G$RI$0$0:98
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+L:C$keypad_display.c$84$1$1:113
+L:XG$main$0$0:113
+L:Fkeypad_display$keypad$0$0:11A
+L:Fkeypad_display$display_0$0$0:11E
+L:Fkeypad_display$display_1$0$0:122
+L:Fkeypad_display$display_2$0$0:126
+L:Fkeypad_display$display_3$0$0:12A
diff --git a/demo/keypad_display.hashes b/demo/keypad_display.hashes
new file mode 100644
index 0000000..55868bd
--- /dev/null
+++ b/demo/keypad_display.hashes
@@ -0,0 +1 @@
+E44E4DC2094E8EB729FE653002B40A33 "keypad_display.c"
diff --git a/demo/keypad_display.hex b/demo/keypad_display.hex
new file mode 100644
index 0000000..b62bfae
--- /dev/null
+++ b/demo/keypad_display.hex
@@ -0,0 +1,49 @@
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diff --git a/demo/keypad_display.ihx b/demo/keypad_display.ihx
new file mode 100644
index 0000000..b62bfae
--- /dev/null
+++ b/demo/keypad_display.ihx
@@ -0,0 +1,49 @@
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diff --git a/demo/keypad_display.lnk b/demo/keypad_display.lnk
new file mode 100644
index 0000000..9287b22
--- /dev/null
+++ b/demo/keypad_display.lnk
@@ -0,0 +1,19 @@
+-myuxi
+-Y
+-a 0x0100
+-v 0x0000
+-w 0x0800
+-z
+-b HOME = 0x0000
+-b ISEG = 0x0000
+-b BSEG = 0x0000
+-k /usr/libexec/sdcc/../share/sdcc/lib/small
+-k /usr/share/sdcc/lib/small
+-l mcs51
+-l libsdcc
+-l libint
+-l liblong
+-l libfloat
+keypad_display.rel
+
+-e
diff --git a/demo/keypad_display.lst b/demo/keypad_display.lst
new file mode 100644
index 0000000..439d5d9
--- /dev/null
+++ b/demo/keypad_display.lst
@@ -0,0 +1,624 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ANSI-C Compiler
+ 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+ 4 ; This file was generated Tue Oct 27 23:03:55 2009
+ 5 ;--------------------------------------------------------
+ 6 .module keypad_display
+ 7 .optsdcc -mmcs51 --model-small
+ 8
+ 9 ;--------------------------------------------------------
+ 10 ; Public variables in this module
+ 11 ;--------------------------------------------------------
+ 12 .globl _main
+ 13 .globl _CY
+ 14 .globl _AC
+ 15 .globl _F0
+ 16 .globl _RS1
+ 17 .globl _RS0
+ 18 .globl _OV
+ 19 .globl _F1
+ 20 .globl _P
+ 21 .globl _PS
+ 22 .globl _PT1
+ 23 .globl _PX1
+ 24 .globl _PT0
+ 25 .globl _PX0
+ 26 .globl _RD
+ 27 .globl _WR
+ 28 .globl _T1
+ 29 .globl _T0
+ 30 .globl _INT1
+ 31 .globl _INT0
+ 32 .globl _TXD
+ 33 .globl _RXD
+ 34 .globl _P3_7
+ 35 .globl _P3_6
+ 36 .globl _P3_5
+ 37 .globl _P3_4
+ 38 .globl _P3_3
+ 39 .globl _P3_2
+ 40 .globl _P3_1
+ 41 .globl _P3_0
+ 42 .globl _EA
+ 43 .globl _ES
+ 44 .globl _ET1
+ 45 .globl _EX1
+ 46 .globl _ET0
+ 47 .globl _EX0
+ 48 .globl _P2_7
+ 49 .globl _P2_6
+ 50 .globl _P2_5
+ 51 .globl _P2_4
+ 52 .globl _P2_3
+ 53 .globl _P2_2
+ 54 .globl _P2_1
+ 55 .globl _P2_0
+ 56 .globl _SM0
+ 57 .globl _SM1
+ 58 .globl _SM2
+ 59 .globl _REN
+ 60 .globl _TB8
+ 61 .globl _RB8
+ 62 .globl _TI
+ 63 .globl _RI
+ 64 .globl _P1_7
+ 65 .globl _P1_6
+ 66 .globl _P1_5
+ 67 .globl _P1_4
+ 68 .globl _P1_3
+ 69 .globl _P1_2
+ 70 .globl _P1_1
+ 71 .globl _P1_0
+ 72 .globl _TF1
+ 73 .globl _TR1
+ 74 .globl _TF0
+ 75 .globl _TR0
+ 76 .globl _IE1
+ 77 .globl _IT1
+ 78 .globl _IE0
+ 79 .globl _IT0
+ 80 .globl _P0_7
+ 81 .globl _P0_6
+ 82 .globl _P0_5
+ 83 .globl _P0_4
+ 84 .globl _P0_3
+ 85 .globl _P0_2
+ 86 .globl _P0_1
+ 87 .globl _P0_0
+ 88 .globl _B
+ 89 .globl _ACC
+ 90 .globl _PSW
+ 91 .globl _IP
+ 92 .globl _P3
+ 93 .globl _IE
+ 94 .globl _P2
+ 95 .globl _SBUF
+ 96 .globl _SCON
+ 97 .globl _P1
+ 98 .globl _TH1
+ 99 .globl _TH0
+ 100 .globl _TL1
+ 101 .globl _TL0
+ 102 .globl _TMOD
+ 103 .globl _TCON
+ 104 .globl _PCON
+ 105 .globl _DPH
+ 106 .globl _DPL
+ 107 .globl _SP
+ 108 .globl _P0
+ 109 .globl _row
+ 110 .globl _state
+ 111 ;--------------------------------------------------------
+ 112 ; special function registers
+ 113 ;--------------------------------------------------------
+ 114 .area RSEG (DATA)
+ 0080 115 G$P0$0$0 == 0x0080
+ 0080 116 _P0 = 0x0080
+ 0081 117 G$SP$0$0 == 0x0081
+ 0081 118 _SP = 0x0081
+ 0082 119 G$DPL$0$0 == 0x0082
+ 0082 120 _DPL = 0x0082
+ 0083 121 G$DPH$0$0 == 0x0083
+ 0083 122 _DPH = 0x0083
+ 0087 123 G$PCON$0$0 == 0x0087
+ 0087 124 _PCON = 0x0087
+ 0088 125 G$TCON$0$0 == 0x0088
+ 0088 126 _TCON = 0x0088
+ 0089 127 G$TMOD$0$0 == 0x0089
+ 0089 128 _TMOD = 0x0089
+ 008A 129 G$TL0$0$0 == 0x008a
+ 008A 130 _TL0 = 0x008a
+ 008B 131 G$TL1$0$0 == 0x008b
+ 008B 132 _TL1 = 0x008b
+ 008C 133 G$TH0$0$0 == 0x008c
+ 008C 134 _TH0 = 0x008c
+ 008D 135 G$TH1$0$0 == 0x008d
+ 008D 136 _TH1 = 0x008d
+ 0090 137 G$P1$0$0 == 0x0090
+ 0090 138 _P1 = 0x0090
+ 0098 139 G$SCON$0$0 == 0x0098
+ 0098 140 _SCON = 0x0098
+ 0099 141 G$SBUF$0$0 == 0x0099
+ 0099 142 _SBUF = 0x0099
+ 00A0 143 G$P2$0$0 == 0x00a0
+ 00A0 144 _P2 = 0x00a0
+ 00A8 145 G$IE$0$0 == 0x00a8
+ 00A8 146 _IE = 0x00a8
+ 00B0 147 G$P3$0$0 == 0x00b0
+ 00B0 148 _P3 = 0x00b0
+ 00B8 149 G$IP$0$0 == 0x00b8
+ 00B8 150 _IP = 0x00b8
+ 00D0 151 G$PSW$0$0 == 0x00d0
+ 00D0 152 _PSW = 0x00d0
+ 00E0 153 G$ACC$0$0 == 0x00e0
+ 00E0 154 _ACC = 0x00e0
+ 00F0 155 G$B$0$0 == 0x00f0
+ 00F0 156 _B = 0x00f0
+ 157 ;--------------------------------------------------------
+ 158 ; special function bits
+ 159 ;--------------------------------------------------------
+ 160 .area RSEG (DATA)
+ 0080 161 G$P0_0$0$0 == 0x0080
+ 0080 162 _P0_0 = 0x0080
+ 0081 163 G$P0_1$0$0 == 0x0081
+ 0081 164 _P0_1 = 0x0081
+ 0082 165 G$P0_2$0$0 == 0x0082
+ 0082 166 _P0_2 = 0x0082
+ 0083 167 G$P0_3$0$0 == 0x0083
+ 0083 168 _P0_3 = 0x0083
+ 0084 169 G$P0_4$0$0 == 0x0084
+ 0084 170 _P0_4 = 0x0084
+ 0085 171 G$P0_5$0$0 == 0x0085
+ 0085 172 _P0_5 = 0x0085
+ 0086 173 G$P0_6$0$0 == 0x0086
+ 0086 174 _P0_6 = 0x0086
+ 0087 175 G$P0_7$0$0 == 0x0087
+ 0087 176 _P0_7 = 0x0087
+ 0088 177 G$IT0$0$0 == 0x0088
+ 0088 178 _IT0 = 0x0088
+ 0089 179 G$IE0$0$0 == 0x0089
+ 0089 180 _IE0 = 0x0089
+ 008A 181 G$IT1$0$0 == 0x008a
+ 008A 182 _IT1 = 0x008a
+ 008B 183 G$IE1$0$0 == 0x008b
+ 008B 184 _IE1 = 0x008b
+ 008C 185 G$TR0$0$0 == 0x008c
+ 008C 186 _TR0 = 0x008c
+ 008D 187 G$TF0$0$0 == 0x008d
+ 008D 188 _TF0 = 0x008d
+ 008E 189 G$TR1$0$0 == 0x008e
+ 008E 190 _TR1 = 0x008e
+ 008F 191 G$TF1$0$0 == 0x008f
+ 008F 192 _TF1 = 0x008f
+ 0090 193 G$P1_0$0$0 == 0x0090
+ 0090 194 _P1_0 = 0x0090
+ 0091 195 G$P1_1$0$0 == 0x0091
+ 0091 196 _P1_1 = 0x0091
+ 0092 197 G$P1_2$0$0 == 0x0092
+ 0092 198 _P1_2 = 0x0092
+ 0093 199 G$P1_3$0$0 == 0x0093
+ 0093 200 _P1_3 = 0x0093
+ 0094 201 G$P1_4$0$0 == 0x0094
+ 0094 202 _P1_4 = 0x0094
+ 0095 203 G$P1_5$0$0 == 0x0095
+ 0095 204 _P1_5 = 0x0095
+ 0096 205 G$P1_6$0$0 == 0x0096
+ 0096 206 _P1_6 = 0x0096
+ 0097 207 G$P1_7$0$0 == 0x0097
+ 0097 208 _P1_7 = 0x0097
+ 0098 209 G$RI$0$0 == 0x0098
+ 0098 210 _RI = 0x0098
+ 0099 211 G$TI$0$0 == 0x0099
+ 0099 212 _TI = 0x0099
+ 009A 213 G$RB8$0$0 == 0x009a
+ 009A 214 _RB8 = 0x009a
+ 009B 215 G$TB8$0$0 == 0x009b
+ 009B 216 _TB8 = 0x009b
+ 009C 217 G$REN$0$0 == 0x009c
+ 009C 218 _REN = 0x009c
+ 009D 219 G$SM2$0$0 == 0x009d
+ 009D 220 _SM2 = 0x009d
+ 009E 221 G$SM1$0$0 == 0x009e
+ 009E 222 _SM1 = 0x009e
+ 009F 223 G$SM0$0$0 == 0x009f
+ 009F 224 _SM0 = 0x009f
+ 00A0 225 G$P2_0$0$0 == 0x00a0
+ 00A0 226 _P2_0 = 0x00a0
+ 00A1 227 G$P2_1$0$0 == 0x00a1
+ 00A1 228 _P2_1 = 0x00a1
+ 00A2 229 G$P2_2$0$0 == 0x00a2
+ 00A2 230 _P2_2 = 0x00a2
+ 00A3 231 G$P2_3$0$0 == 0x00a3
+ 00A3 232 _P2_3 = 0x00a3
+ 00A4 233 G$P2_4$0$0 == 0x00a4
+ 00A4 234 _P2_4 = 0x00a4
+ 00A5 235 G$P2_5$0$0 == 0x00a5
+ 00A5 236 _P2_5 = 0x00a5
+ 00A6 237 G$P2_6$0$0 == 0x00a6
+ 00A6 238 _P2_6 = 0x00a6
+ 00A7 239 G$P2_7$0$0 == 0x00a7
+ 00A7 240 _P2_7 = 0x00a7
+ 00A8 241 G$EX0$0$0 == 0x00a8
+ 00A8 242 _EX0 = 0x00a8
+ 00A9 243 G$ET0$0$0 == 0x00a9
+ 00A9 244 _ET0 = 0x00a9
+ 00AA 245 G$EX1$0$0 == 0x00aa
+ 00AA 246 _EX1 = 0x00aa
+ 00AB 247 G$ET1$0$0 == 0x00ab
+ 00AB 248 _ET1 = 0x00ab
+ 00AC 249 G$ES$0$0 == 0x00ac
+ 00AC 250 _ES = 0x00ac
+ 00AF 251 G$EA$0$0 == 0x00af
+ 00AF 252 _EA = 0x00af
+ 00B0 253 G$P3_0$0$0 == 0x00b0
+ 00B0 254 _P3_0 = 0x00b0
+ 00B1 255 G$P3_1$0$0 == 0x00b1
+ 00B1 256 _P3_1 = 0x00b1
+ 00B2 257 G$P3_2$0$0 == 0x00b2
+ 00B2 258 _P3_2 = 0x00b2
+ 00B3 259 G$P3_3$0$0 == 0x00b3
+ 00B3 260 _P3_3 = 0x00b3
+ 00B4 261 G$P3_4$0$0 == 0x00b4
+ 00B4 262 _P3_4 = 0x00b4
+ 00B5 263 G$P3_5$0$0 == 0x00b5
+ 00B5 264 _P3_5 = 0x00b5
+ 00B6 265 G$P3_6$0$0 == 0x00b6
+ 00B6 266 _P3_6 = 0x00b6
+ 00B7 267 G$P3_7$0$0 == 0x00b7
+ 00B7 268 _P3_7 = 0x00b7
+ 00B0 269 G$RXD$0$0 == 0x00b0
+ 00B0 270 _RXD = 0x00b0
+ 00B1 271 G$TXD$0$0 == 0x00b1
+ 00B1 272 _TXD = 0x00b1
+ 00B2 273 G$INT0$0$0 == 0x00b2
+ 00B2 274 _INT0 = 0x00b2
+ 00B3 275 G$INT1$0$0 == 0x00b3
+ 00B3 276 _INT1 = 0x00b3
+ 00B4 277 G$T0$0$0 == 0x00b4
+ 00B4 278 _T0 = 0x00b4
+ 00B5 279 G$T1$0$0 == 0x00b5
+ 00B5 280 _T1 = 0x00b5
+ 00B6 281 G$WR$0$0 == 0x00b6
+ 00B6 282 _WR = 0x00b6
+ 00B7 283 G$RD$0$0 == 0x00b7
+ 00B7 284 _RD = 0x00b7
+ 00B8 285 G$PX0$0$0 == 0x00b8
+ 00B8 286 _PX0 = 0x00b8
+ 00B9 287 G$PT0$0$0 == 0x00b9
+ 00B9 288 _PT0 = 0x00b9
+ 00BA 289 G$PX1$0$0 == 0x00ba
+ 00BA 290 _PX1 = 0x00ba
+ 00BB 291 G$PT1$0$0 == 0x00bb
+ 00BB 292 _PT1 = 0x00bb
+ 00BC 293 G$PS$0$0 == 0x00bc
+ 00BC 294 _PS = 0x00bc
+ 00D0 295 G$P$0$0 == 0x00d0
+ 00D0 296 _P = 0x00d0
+ 00D1 297 G$F1$0$0 == 0x00d1
+ 00D1 298 _F1 = 0x00d1
+ 00D2 299 G$OV$0$0 == 0x00d2
+ 00D2 300 _OV = 0x00d2
+ 00D3 301 G$RS0$0$0 == 0x00d3
+ 00D3 302 _RS0 = 0x00d3
+ 00D4 303 G$RS1$0$0 == 0x00d4
+ 00D4 304 _RS1 = 0x00d4
+ 00D5 305 G$F0$0$0 == 0x00d5
+ 00D5 306 _F0 = 0x00d5
+ 00D6 307 G$AC$0$0 == 0x00d6
+ 00D6 308 _AC = 0x00d6
+ 00D7 309 G$CY$0$0 == 0x00d7
+ 00D7 310 _CY = 0x00d7
+ 311 ;--------------------------------------------------------
+ 312 ; overlayable register banks
+ 313 ;--------------------------------------------------------
+ 314 .area REG_BANK_0 (REL,OVR,DATA)
+ 0000 315 .ds 8
+ 316 ;--------------------------------------------------------
+ 317 ; internal ram data
+ 318 ;--------------------------------------------------------
+ 319 .area DSEG (DATA)
+ 0000 320 G$state$0$0==.
+ 0000 321 _state::
+ 0000 322 .ds 1
+ 0001 323 G$row$0$0==.
+ 0001 324 _row::
+ 0001 325 .ds 2
+ 326 ;--------------------------------------------------------
+ 327 ; overlayable items in internal ram
+ 328 ;--------------------------------------------------------
+ 329 .area OSEG (OVR,DATA)
+ 330 ;--------------------------------------------------------
+ 331 ; Stack segment in internal ram
+ 332 ;--------------------------------------------------------
+ 333 .area SSEG (DATA)
+ 0000 334 __start__stack:
+ 0000 335 .ds 1
+ 336
+ 337 ;--------------------------------------------------------
+ 338 ; indirectly addressable internal ram data
+ 339 ;--------------------------------------------------------
+ 340 .area ISEG (DATA)
+ 341 ;--------------------------------------------------------
+ 342 ; absolute internal ram data
+ 343 ;--------------------------------------------------------
+ 344 .area IABS (ABS,DATA)
+ 345 .area IABS (ABS,DATA)
+ 346 ;--------------------------------------------------------
+ 347 ; bit data
+ 348 ;--------------------------------------------------------
+ 349 .area BSEG (BIT)
+ 350 ;--------------------------------------------------------
+ 351 ; paged external ram data
+ 352 ;--------------------------------------------------------
+ 353 .area PSEG (PAG,XDATA)
+ 354 ;--------------------------------------------------------
+ 355 ; external ram data
+ 356 ;--------------------------------------------------------
+ 357 .area XSEG (XDATA)
+ 358 ;--------------------------------------------------------
+ 359 ; absolute external ram data
+ 360 ;--------------------------------------------------------
+ 361 .area XABS (ABS,XDATA)
+ 362 ;--------------------------------------------------------
+ 363 ; external initialized ram data
+ 364 ;--------------------------------------------------------
+ 365 .area XISEG (XDATA)
+ 366 .area HOME (CODE)
+ 367 .area GSINIT0 (CODE)
+ 368 .area GSINIT1 (CODE)
+ 369 .area GSINIT2 (CODE)
+ 370 .area GSINIT3 (CODE)
+ 371 .area GSINIT4 (CODE)
+ 372 .area GSINIT5 (CODE)
+ 373 .area GSINIT (CODE)
+ 374 .area GSFINAL (CODE)
+ 375 .area CSEG (CODE)
+ 376 ;--------------------------------------------------------
+ 377 ; interrupt vector
+ 378 ;--------------------------------------------------------
+ 379 .area HOME (CODE)
+ 0000 380 __interrupt_vect:
+ 0000 02s00r00 381 ljmp __sdcc_gsinit_startup
+ 382 ;--------------------------------------------------------
+ 383 ; global & static initialisations
+ 384 ;--------------------------------------------------------
+ 385 .area HOME (CODE)
+ 386 .area GSINIT (CODE)
+ 387 .area GSFINAL (CODE)
+ 388 .area GSINIT (CODE)
+ 389 .globl __sdcc_gsinit_startup
+ 390 .globl __sdcc_program_startup
+ 391 .globl __start__stack
+ 392 .globl __mcs51_genXINIT
+ 393 .globl __mcs51_genXRAMCLEAR
+ 394 .globl __mcs51_genRAMCLEAR
+ 395 .area GSFINAL (CODE)
+ 0000 02s00r03 396 ljmp __sdcc_program_startup
+ 397 ;--------------------------------------------------------
+ 398 ; Home
+ 399 ;--------------------------------------------------------
+ 400 .area HOME (CODE)
+ 401 .area HOME (CODE)
+ 0003 402 __sdcc_program_startup:
+ 0003 12s00r00 403 lcall _main
+ 404 ; return from main will lock up
+ 0006 80 FE 405 sjmp .
+ 406 ;--------------------------------------------------------
+ 407 ; code
+ 408 ;--------------------------------------------------------
+ 409 .area CSEG (CODE)
+ 410 ;------------------------------------------------------------
+ 411 ;Allocation info for local variables in function 'main'
+ 412 ;------------------------------------------------------------
+ 413 ;------------------------------------------------------------
+ 0000 414 G$main$0$0 ==.
+ 0000 415 C$keypad_display.c$38$0$0 ==.
+ 416 ; keypad_display.c:38: int main()
+ 417 ; -----------------------------------------
+ 418 ; function main
+ 419 ; -----------------------------------------
+ 0000 420 _main:
+ 0002 421 ar2 = 0x02
+ 0003 422 ar3 = 0x03
+ 0004 423 ar4 = 0x04
+ 0005 424 ar5 = 0x05
+ 0006 425 ar6 = 0x06
+ 0007 426 ar7 = 0x07
+ 0000 427 ar0 = 0x00
+ 0001 428 ar1 = 0x01
+ 0000 429 C$keypad_display.c$40$1$1 ==.
+ 430 ; keypad_display.c:40: while(1) {
+ 0000 431 00123$:
+ 0000 432 C$keypad_display.c$41$2$2 ==.
+ 433 ; keypad_display.c:41: for(row=0; row<4; row++) {
+ 0000 E4 434 clr a
+ 0001 F5*01 435 mov _row,a
+ 0003 F5*02 436 mov (_row + 1),a
+ 0005 437 00118$:
+ 0005 C3 438 clr c
+ 0006 E5*01 439 mov a,_row
+ 0008 94 04 440 subb a,#0x04
+ 000A E5*02 441 mov a,(_row + 1)
+ 000C 64 80 442 xrl a,#0x80
+ 000E 94 80 443 subb a,#0x80
+ 0010 50 EE 444 jnc 00123$
+ 0012 445 C$keypad_display.c$42$3$3 ==.
+ 446 ; keypad_display.c:42: P1=keypad[row];
+ 0012 E5*01 447 mov a,_row
+ 0014 24r00 448 add a,#_keypad
+ 0016 F5 82 449 mov dpl,a
+ 0018 E5*02 450 mov a,(_row + 1)
+ 001A 34s00 451 addc a,#(_keypad >> 8)
+ 001C F5 83 452 mov dph,a
+ 001E E4 453 clr a
+ 001F 93 454 movc a,@a+dptr
+ 0020 F5 90 455 mov _P1,a
+ 0022 456 C$keypad_display.c$48$3$3 ==.
+ 457 ; keypad_display.c:48: _endasm;
+ 458
+ 0022 85 90*00 459 mov _state, P1
+ 460
+ 0025 461 C$keypad_display.c$53$3$3 ==.
+ 462 ; keypad_display.c:53: state&=0x0f;
+ 0025 53r00 0F 463 anl _state,#0x0F
+ 0028 464 C$keypad_display.c$54$3$3 ==.
+ 465 ; keypad_display.c:54: state^=0x0f;
+ 0028 63r00 0F 466 xrl _state,#0x0F
+ 002B 467 C$keypad_display.c$56$3$3 ==.
+ 468 ; keypad_display.c:56: if(state & 1) {
+ 002B E5*00 469 mov a,_state
+ 002D 30 E0 05 470 jnb acc.0,00111$
+ 0030 471 C$keypad_display.c$57$4$4 ==.
+ 472 ; keypad_display.c:57: state=0;
+ 0030 75*00 00 473 mov _state,#0x00
+ 0033 80 1F 474 sjmp 00112$
+ 0035 475 00111$:
+ 0035 476 C$keypad_display.c$58$3$3 ==.
+ 477 ; keypad_display.c:58: } else if(state & 2) {
+ 0035 E5*00 478 mov a,_state
+ 0037 30 E1 05 479 jnb acc.1,00108$
+ 003A 480 C$keypad_display.c$59$4$5 ==.
+ 481 ; keypad_display.c:59: state=1;
+ 003A 75*00 01 482 mov _state,#0x01
+ 003D 80 15 483 sjmp 00112$
+ 003F 484 00108$:
+ 003F 485 C$keypad_display.c$60$3$3 ==.
+ 486 ; keypad_display.c:60: } else if(state & 4) {
+ 003F E5*00 487 mov a,_state
+ 0041 30 E2 05 488 jnb acc.2,00105$
+ 0044 489 C$keypad_display.c$61$4$6 ==.
+ 490 ; keypad_display.c:61: state=2;
+ 0044 75*00 02 491 mov _state,#0x02
+ 0047 80 0B 492 sjmp 00112$
+ 0049 493 00105$:
+ 0049 494 C$keypad_display.c$62$3$3 ==.
+ 495 ; keypad_display.c:62: } else if(state & 8) {
+ 0049 E5*00 496 mov a,_state
+ 004B 20 E3 03 497 jb acc.3,00142$
+ 004E 02s00rA7 498 ljmp 00120$
+ 0051 499 00142$:
+ 0051 500 C$keypad_display.c$63$4$7 ==.
+ 501 ; keypad_display.c:63: state=3;
+ 0051 75*00 03 502 mov _state,#0x03
+ 0054 503 C$keypad_display.c$65$3$3 ==.
+ 504 ; keypad_display.c:65: continue;
+ 0054 505 00112$:
+ 0054 506 C$keypad_display.c$68$3$3 ==.
+ 507 ; keypad_display.c:68: switch(row) {
+ 0054 E4 508 clr a
+ 0055 B5*01 06 509 cjne a,_row,00143$
+ 0058 E4 510 clr a
+ 0059 B5*02 02 511 cjne a,(_row + 1),00143$
+ 005C 80 23 512 sjmp 00113$
+ 005E 513 00143$:
+ 005E 74 01 514 mov a,#0x01
+ 0060 B5*01 06 515 cjne a,_row,00144$
+ 0063 E4 516 clr a
+ 0064 B5*02 02 517 cjne a,(_row + 1),00144$
+ 0067 80 22 518 sjmp 00114$
+ 0069 519 00144$:
+ 0069 74 02 520 mov a,#0x02
+ 006B B5*01 06 521 cjne a,_row,00145$
+ 006E E4 522 clr a
+ 006F B5*02 02 523 cjne a,(_row + 1),00145$
+ 0072 80 21 524 sjmp 00115$
+ 0074 525 00145$:
+ 0074 74 03 526 mov a,#0x03
+ 0076 B5*01 06 527 cjne a,_row,00146$
+ 0079 E4 528 clr a
+ 007A B5*02 02 529 cjne a,(_row + 1),00146$
+ 007D 80 20 530 sjmp 00116$
+ 007F 531 00146$:
+ 007F 532 C$keypad_display.c$69$4$9 ==.
+ 533 ; keypad_display.c:69: case 0:
+ 007F 80 26 534 sjmp 00120$
+ 0081 535 00113$:
+ 0081 536 C$keypad_display.c$70$4$9 ==.
+ 537 ; keypad_display.c:70: P3=display_0[state];
+ 0081 E5*00 538 mov a,_state
+ 0083 90s00r04 539 mov dptr,#_display_0
+ 0086 93 540 movc a,@a+dptr
+ 0087 F5 B0 541 mov _P3,a
+ 0089 542 C$keypad_display.c$71$4$9 ==.
+ 543 ; keypad_display.c:71: break;
+ 0089 544 C$keypad_display.c$72$4$9 ==.
+ 545 ; keypad_display.c:72: case 1:
+ 0089 80 1C 546 sjmp 00120$
+ 008B 547 00114$:
+ 008B 548 C$keypad_display.c$73$4$9 ==.
+ 549 ; keypad_display.c:73: P3=display_1[state];
+ 008B E5*00 550 mov a,_state
+ 008D 90s00r08 551 mov dptr,#_display_1
+ 0090 93 552 movc a,@a+dptr
+ 0091 F5 B0 553 mov _P3,a
+ 0093 554 C$keypad_display.c$74$4$9 ==.
+ 555 ; keypad_display.c:74: break;
+ 0093 556 C$keypad_display.c$75$4$9 ==.
+ 557 ; keypad_display.c:75: case 2:
+ 0093 80 12 558 sjmp 00120$
+ 0095 559 00115$:
+ 0095 560 C$keypad_display.c$76$4$9 ==.
+ 561 ; keypad_display.c:76: P3=display_2[state];
+ 0095 E5*00 562 mov a,_state
+ 0097 90s00r0C 563 mov dptr,#_display_2
+ 009A 93 564 movc a,@a+dptr
+ 009B F5 B0 565 mov _P3,a
+ 009D 566 C$keypad_display.c$77$4$9 ==.
+ 567 ; keypad_display.c:77: break;
+ 009D 568 C$keypad_display.c$78$4$9 ==.
+ 569 ; keypad_display.c:78: case 3:
+ 009D 80 08 570 sjmp 00120$
+ 009F 571 00116$:
+ 009F 572 C$keypad_display.c$79$4$9 ==.
+ 573 ; keypad_display.c:79: P3=display_3[state];
+ 009F E5*00 574 mov a,_state
+ 00A1 90s00r10 575 mov dptr,#_display_3
+ 00A4 93 576 movc a,@a+dptr
+ 00A5 F5 B0 577 mov _P3,a
+ 00A7 578 C$keypad_display.c$81$2$2 ==.
+ 579 ; keypad_display.c:81: }
+ 00A7 580 00120$:
+ 00A7 581 C$keypad_display.c$41$2$2 ==.
+ 582 ; keypad_display.c:41: for(row=0; row<4; row++) {
+ 00A7 05*01 583 inc _row
+ 00A9 E4 584 clr a
+ 00AA B5*01 02 585 cjne a,_row,00147$
+ 00AD 05*02 586 inc (_row + 1)
+ 00AF 587 00147$:
+ 00AF 588 C$keypad_display.c$84$1$1 ==.
+ 00AF 589 XG$main$0$0 ==.
+ 00AF 02s00r05 590 ljmp 00118$
+ 591 .area CSEG (CODE)
+ 592 .area CONST (CODE)
+ 0000 593 Fkeypad_display$keypad$0$0 == .
+ 0000 594 _keypad:
+ 0000 EF 595 .db #0xEF
+ 0001 DF 596 .db #0xDF
+ 0002 BF 597 .db #0xBF
+ 0003 7F 598 .db #0x7F
+ 0004 599 Fkeypad_display$display_0$0$0 == .
+ 0004 600 _display_0:
+ 0004 F9 601 .db #0xF9
+ 0005 64 602 .db #0x64
+ 0006 70 603 .db #0x70
+ 0007 48 604 .db #0x48
+ 0008 605 Fkeypad_display$display_1$0$0 == .
+ 0008 606 _display_1:
+ 0008 59 607 .db #0x59
+ 0009 52 608 .db #0x52
+ 000A 42 609 .db #0x42
+ 000B 40 610 .db #0x40
+ 000C 611 Fkeypad_display$display_2$0$0 == .
+ 000C 612 _display_2:
+ 000C F8 613 .db #0xF8
+ 000D 40 614 .db #0x40
+ 000E 50 615 .db #0x50
+ 000F C6 616 .db #0xC6
+ 0010 617 Fkeypad_display$display_3$0$0 == .
+ 0010 618 _display_3:
+ 0010 79 619 .db #0x79
+ 0011 C0 620 .db #0xC0
+ 0012 49 621 .db #0x49
+ 0013 C0 622 .db #0xC0
+ 623 .area XINIT (CODE)
+ 624 .area CABS (ABS,CODE)
diff --git a/demo/keypad_display.map b/demo/keypad_display.map
new file mode 100644
index 0000000..276738d
--- /dev/null
+++ b/demo/keypad_display.map
@@ -0,0 +1,536 @@
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CABS 0000 0000 = 0. bytes (ABS,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:FFFFFF00 s_BSEG
+ 0C:0000 l_BIT_BANK
+ 0C:0000 l_BSEG
+ 0C:0000 l_BSEG_BYTES
+ 0C:0000 l_CABS
+ 0C:0000 l_GSINIT
+ 0C:0000 l_GSINIT1
+ 0C:0000 l_GSINIT5
+ 0C:0000 l_IABS
+ 0C:0000 l_ISEG
+ 0C:0000 l_OSEG
+ 0C:0000 l_PSEG
+ 0C:0000 l_REG_BANK_1
+ 0C:0000 l_REG_BANK_2
+ 0C:0000 l_REG_BANK_3
+ 0C:0000 l_RSEG
+ 0C:0000 l_XABS
+ 0C:0000 l_XINIT
+ 0C:0000 l_XISEG
+ 0C:0000 l_XSEG
+ 0C:0000 l__CODE
+ 0C:0000 s_BSEG_BYTES
+ 0C:0000 s_CABS
+ 0C:0000 s_DSEG
+ 0C:0000 s_HOME
+ 0C:0000 s_IABS
+ 0C:0000 s_ISEG
+ 0C:0000 s_PSEG
+ 0C:0000 s_REG_BANK_0
+ 0C:0000 s_XABS
+ 0C:0000 s_XISEG
+ 0C:0000 s_XSEG
+ 0C:0003 l_GSFINAL
+ 0C:0003 l_GSINIT0
+ 0C:0008 l_HOME
+ 0C:0008 l_REG_BANK_0
+ 0C:0008 s_GSINIT0
+ 0C:0008 s_REG_BANK_1
+ 0C:000A l_GSINIT2
+ 0C:000B s_GSINIT1
+ 0C:000B s_GSINIT2
+ 0C:000B s_RSEG
+ 0C:000B s_SSEG
+ 0C:0010 s_REG_BANK_2
+ 0C:0014 l_CONST
+ 0C:0015 s_GSINIT3
+ 0C:0018 s_BIT_BANK
+ 0C:0018 s_OSEG
+ 0C:0018 s_REG_BANK_3
+ 0C:0020 s__CODE
+ 0C:0022 l_GSINIT3
+ 0C:002A l_GSINIT4
+ 0C:0037 s_GSINIT4
+ 0C:0061 s_GSFINAL
+ 0C:0061 s_GSINIT
+ 0C:0061 s_GSINIT5
+ 0C:0064 s_CSEG
+ 0C:0080 l_DSEG
+ 0C:00B6 l_CSEG
+ 0C:00F5 l_SSEG
+ 0C:0100 l_IRAM
+ 0C:011A s_CONST
+ 0C:012E s_XINIT
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+. .ABS. 0000 0000 = 0. bytes (ABS,CON)
+
+ Value Global
+ -------- --------------------------------
+ 0080 G$P0$0$0
+ 0080 G$P0_0$0$0
+ 0080 _P0
+ 0080 _P0_0
+ 0081 G$P0_1$0$0
+ 0081 G$SP$0$0
+ 0081 _P0_1
+ 0081 _SP
+ 0082 G$DPL$0$0
+ 0082 G$P0_2$0$0
+ 0082 _DPL
+ 0082 _P0_2
+ 0083 G$DPH$0$0
+ 0083 G$P0_3$0$0
+ 0083 _DPH
+ 0083 _P0_3
+ 0084 G$P0_4$0$0
+ 0084 _P0_4
+ 0085 G$P0_5$0$0
+ 0085 _P0_5
+ 0086 G$P0_6$0$0
+ 0086 _P0_6
+ 0087 G$P0_7$0$0
+ 0087 G$PCON$0$0
+ 0087 _P0_7
+ 0087 _PCON
+ 0088 G$IT0$0$0
+ 0088 G$TCON$0$0
+ 0088 _IT0
+ 0088 _TCON
+ 0089 G$IE0$0$0
+ 0089 G$TMOD$0$0
+ 0089 _IE0
+ 0089 _TMOD
+ 008A G$IT1$0$0
+ 008A G$TL0$0$0
+ 008A _IT1
+ 008A _TL0
+ 008B G$IE1$0$0
+ 008B G$TL1$0$0
+ 008B _IE1
+ 008B _TL1
+ 008C G$TH0$0$0
+ 008C G$TR0$0$0
+ 008C _TH0
+ 008C _TR0
+ 008D G$TF0$0$0
+ 008D G$TH1$0$0
+ 008D _TF0
+ 008D _TH1
+ 008E G$TR1$0$0
+ 008E _TR1
+ 008F G$TF1$0$0
+ 008F _TF1
+ 0090 G$P1$0$0
+ 0090 G$P1_0$0$0
+ 0090 _P1
+ 0090 _P1_0
+ 0091 G$P1_1$0$0
+ 0091 _P1_1
+ 0092 G$P1_2$0$0
+ 0092 _P1_2
+ 0093 G$P1_3$0$0
+ 0093 _P1_3
+ 0094 G$P1_4$0$0
+ 0094 _P1_4
+ 0095 G$P1_5$0$0
+ 0095 _P1_5
+ 0096 G$P1_6$0$0
+ 0096 _P1_6
+ 0097 G$P1_7$0$0
+ 0097 _P1_7
+ 0098 G$RI$0$0
+ 0098 G$SCON$0$0
+ 0098 _RI
+ 0098 _SCON
+ 0099 G$SBUF$0$0
+ 0099 G$TI$0$0
+ 0099 _SBUF
+ 0099 _TI
+ 009A G$RB8$0$0
+ 009A _RB8
+ 009B G$TB8$0$0
+ 009B _TB8
+ 009C G$REN$0$0
+ 009C _REN
+ 009D G$SM2$0$0
+ 009D _SM2
+ 009E G$SM1$0$0
+ 009E _SM1
+ 009F G$SM0$0$0
+ 009F _SM0
+ 00A0 G$P2$0$0
+ 00A0 G$P2_0$0$0
+ 00A0 _P2
+ 00A0 _P2_0
+ 00A0 __XPAGE
+ 00A1 G$P2_1$0$0
+ 00A1 _P2_1
+ 00A2 G$P2_2$0$0
+ 00A2 _P2_2
+ 00A3 G$P2_3$0$0
+ 00A3 _P2_3
+ 00A4 G$P2_4$0$0
+ 00A4 _P2_4
+ 00A5 G$P2_5$0$0
+ 00A5 _P2_5
+ 00A6 G$P2_6$0$0
+ 00A6 _P2_6
+ 00A7 G$P2_7$0$0
+ 00A7 _P2_7
+ 00A8 G$EX0$0$0
+ 00A8 G$IE$0$0
+ 00A8 _EX0
+ 00A8 _IE
+ 00A9 G$ET0$0$0
+ 00A9 _ET0
+ 00AA G$EX1$0$0
+ 00AA _EX1
+ 00AB G$ET1$0$0
+ 00AB _ET1
+ 00AC G$ES$0$0
+ 00AC _ES
+ 00AF G$EA$0$0
+ 00AF _EA
+ 00B0 G$P3$0$0
+ 00B0 G$P3_0$0$0
+ 00B0 G$RXD$0$0
+ 00B0 _P3
+ 00B0 _P3_0
+ 00B0 _RXD
+ 00B1 G$P3_1$0$0
+ 00B1 G$TXD$0$0
+ 00B1 _P3_1
+ 00B1 _TXD
+ 00B2 G$INT0$0$0
+ 00B2 G$P3_2$0$0
+ 00B2 _INT0
+ 00B2 _P3_2
+ 00B3 G$INT1$0$0
+ 00B3 G$P3_3$0$0
+ 00B3 _INT1
+ 00B3 _P3_3
+ 00B4 G$P3_4$0$0
+ 00B4 G$T0$0$0
+ 00B4 _P3_4
+ 00B4 _T0
+ 00B5 G$P3_5$0$0
+ 00B5 G$T1$0$0
+ 00B5 _P3_5
+ 00B5 _T1
+ 00B6 G$P3_6$0$0
+ 00B6 G$WR$0$0
+ 00B6 _P3_6
+ 00B6 _WR
+ 00B7 G$P3_7$0$0
+ 00B7 G$RD$0$0
+ 00B7 _P3_7
+ 00B7 _RD
+ 00B8 G$IP$0$0
+ 00B8 G$PX0$0$0
+ 00B8 _IP
+ 00B8 _PX0
+ 00B9 G$PT0$0$0
+ 00B9 _PT0
+ 00BA G$PX1$0$0
+ 00BA _PX1
+ 00BB G$PT1$0$0
+ 00BB _PT1
+ 00BC G$PS$0$0
+ 00BC _PS
+ 00D0 G$P$0$0
+ 00D0 G$PSW$0$0
+ 00D0 _P
+ 00D0 _PSW
+ 00D1 G$F1$0$0
+ 00D1 _F1
+ 00D2 G$OV$0$0
+ 00D2 _OV
+ 00D3 G$RS0$0$0
+ 00D3 _RS0
+ 00D4 G$RS1$0$0
+ 00D4 _RS1
+ 00D5 G$F0$0$0
+ 00D5 _F0
+ 00D6 G$AC$0$0
+ 00D6 _AC
+ 00D7 G$CY$0$0
+ 00D7 _CY
+ 00E0 G$ACC$0$0
+ 00E0 _ACC
+ 00F0 G$B$0$0
+ 00F0 _B
+
+
+
+
+
+
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+DSEG 0000 0080 = 128. bytes (REL,CON)
+
+ Value Global
+ -------- --------------------------------
+ 0008 G$state$0$0
+ 0008 _state
+ 0009 G$row$0$0
+ 0009 _row
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+SSEG 000B 00F5 = 245. bytes (REL,OVR)
+
+ Value Global
+ -------- --------------------------------
+ 000B __start__stack
+
+
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+HOME 0000 0008 = 8. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0000 A$keypad_display$381
+ 0C:0003 A$keypad_display$403
+ 0C:0003 __sdcc_program_startup
+ 0C:0006 A$keypad_display$405
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT0 0008 0003 = 3. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0008 __sdcc_gsinit_startup
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT3 0015 0022 = 34. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0015 __mcs51_genXINIT
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSINIT4 0037 002A = 42. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0037 __mcs51_genRAMCLEAR
+ 0C:003D __mcs51_genXRAMCLEAR
+
+
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+GSFINAL 0061 0003 = 3. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0061 A$keypad_display$396
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CSEG 0064 00B6 = 182. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:0064 A$keypad_display$434
+ 0C:0064 C$keypad_display.c$38$0$0
+ 0C:0064 C$keypad_display.c$40$1$1
+ 0C:0064 G$main$0$0
+ 0C:0064 _main
+ 0C:0065 A$keypad_display$435
+ 0C:0067 A$keypad_display$436
+ 0C:0069 A$keypad_display$438
+ 0C:006A A$keypad_display$439
+ 0C:006C A$keypad_display$440
+ 0C:006E A$keypad_display$441
+ 0C:0070 A$keypad_display$442
+ 0C:0072 A$keypad_display$443
+ 0C:0074 A$keypad_display$444
+ 0C:0076 A$keypad_display$447
+ 0C:0076 C$keypad_display.c$42$3$3
+ 0C:0078 A$keypad_display$448
+ 0C:007A A$keypad_display$449
+ 0C:007C A$keypad_display$450
+ 0C:007E A$keypad_display$451
+ 0C:0080 A$keypad_display$452
+ 0C:0082 A$keypad_display$453
+ 0C:0083 A$keypad_display$454
+ 0C:0084 A$keypad_display$455
+ 0C:0086 A$keypad_display$459
+ 0C:0086 C$keypad_display.c$48$3$3
+ 0C:0089 A$keypad_display$463
+ 0C:0089 C$keypad_display.c$53$3$3
+ 0C:008C A$keypad_display$466
+ 0C:008C C$keypad_display.c$54$3$3
+ 0C:008F A$keypad_display$469
+ 0C:008F C$keypad_display.c$56$3$3
+ 0C:0091 A$keypad_display$470
+ 0C:0094 A$keypad_display$473
+ 0C:0094 C$keypad_display.c$57$4$4
+ 0C:0097 A$keypad_display$474
+ 0C:0099 A$keypad_display$478
+ 0C:0099 C$keypad_display.c$58$3$3
+ 0C:009B A$keypad_display$479
+ 0C:009E A$keypad_display$482
+ 0C:009E C$keypad_display.c$59$4$5
+ 0C:00A1 A$keypad_display$483
+ 0C:00A3 A$keypad_display$487
+ 0C:00A3 C$keypad_display.c$60$3$3
+ 0C:00A5 A$keypad_display$488
+ 0C:00A8 A$keypad_display$491
+ 0C:00A8 C$keypad_display.c$61$4$6
+ 0C:00AB A$keypad_display$492
+ 0C:00AD A$keypad_display$496
+ 0C:00AD C$keypad_display.c$62$3$3
+ 0C:00AF A$keypad_display$497
+ 0C:00B2 A$keypad_display$498
+ 0C:00B5 A$keypad_display$502
+ 0C:00B5 C$keypad_display.c$63$4$7
+ 0C:00B8 A$keypad_display$508
+ 0C:00B8 C$keypad_display.c$65$3$3
+ 0C:00B8 C$keypad_display.c$68$3$3
+ 0C:00B9 A$keypad_display$509
+ 0C:00BC A$keypad_display$510
+ 0C:00BD A$keypad_display$511
+ 0C:00C0 A$keypad_display$512
+ 0C:00C2 A$keypad_display$514
+ 0C:00C4 A$keypad_display$515
+ 0C:00C7 A$keypad_display$516
+ 0C:00C8 A$keypad_display$517
+ 0C:00CB A$keypad_display$518
+ 0C:00CD A$keypad_display$520
+ 0C:00CF A$keypad_display$521
+ 0C:00D2 A$keypad_display$522
+ 0C:00D3 A$keypad_display$523
+ 0C:00D6 A$keypad_display$524
+ 0C:00D8 A$keypad_display$526
+ 0C:00DA A$keypad_display$527
+ 0C:00DD A$keypad_display$528
+ 0C:00DE A$keypad_display$529
+ 0C:00E1 A$keypad_display$530
+ 0C:00E3 A$keypad_display$534
+ 0C:00E3 C$keypad_display.c$69$4$9
+ 0C:00E5 A$keypad_display$538
+ 0C:00E5 C$keypad_display.c$70$4$9
+ 0C:00E7 A$keypad_display$539
+ 0C:00EA A$keypad_display$540
+ 0C:00EB A$keypad_display$541
+ 0C:00ED A$keypad_display$546
+ 0C:00ED C$keypad_display.c$71$4$9
+ 0C:00ED C$keypad_display.c$72$4$9
+ 0C:00EF A$keypad_display$550
+ 0C:00EF C$keypad_display.c$73$4$9
+ 0C:00F1 A$keypad_display$551
+ 0C:00F4 A$keypad_display$552
+ 0C:00F5 A$keypad_display$553
+ 0C:00F7 A$keypad_display$558
+ 0C:00F7 C$keypad_display.c$74$4$9
+ 0C:00F7 C$keypad_display.c$75$4$9
+ 0C:00F9 A$keypad_display$562
+ 0C:00F9 C$keypad_display.c$76$4$9
+ 0C:00FB A$keypad_display$563
+ 0C:00FE A$keypad_display$564
+ 0C:00FF A$keypad_display$565
+ 0C:0101 A$keypad_display$570
+ 0C:0101 C$keypad_display.c$77$4$9
+ 0C:0101 C$keypad_display.c$78$4$9
+ 0C:0103 A$keypad_display$574
+ 0C:0103 C$keypad_display.c$79$4$9
+ 0C:0105 A$keypad_display$575
+ 0C:0108 A$keypad_display$576
+ 0C:0109 A$keypad_display$577
+ 0C:010B A$keypad_display$583
+ 0C:010B C$keypad_display.c$41$2$2
+ 0C:010B C$keypad_display.c$81$2$2
+ 0C:010D A$keypad_display$584
+ 0C:010E A$keypad_display$585
+ 0C:0111 A$keypad_display$586
+ 0C:0113 A$keypad_display$590
+ 0C:0113 C$keypad_display.c$84$1$1
+ 0C:0113 XG$main$0$0
+ 0C:0116 __sdcc_external_startup
+
+Hexadecimal
+
+Area Addr Size Decimal Bytes (Attributes)
+-------------------------------- ---- ---- ------- ----- ------------
+CONST 011A 0014 = 20. bytes (REL,CON,CODE)
+
+ Value Global
+ -------- --------------------------------
+ 0C:011A Fkeypad_display$keypad$0$0
+ 0C:011E Fkeypad_display$display_0$0$0
+ 0C:0122 Fkeypad_display$display_1$0$0
+ 0C:0126 Fkeypad_display$display_2$0$0
+ 0C:012A Fkeypad_display$display_3$0$0
+
+ ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 1.
+
+Files Linked [ module(s) ]
+
+keypad_display.rel
+
+Libraries Linked [ object file ]
+
+/usr/share/sdcc/lib/small/mcs51.lib [ crtclear.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtxinit.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtxclear.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtpagesfr.rel ]
+/usr/share/sdcc/lib/small/mcs51.lib [ crtstart.rel ]
+/usr/share/sdcc/lib/small/libsdcc.lib [ _startup.rel ]
+
+ ASxxxx Linker V01.75 + NoICE + SDCC Feb 1999, page 2.
+
+User Base Address Definitions
+
+HOME = 0x0000
+ISEG = 0x0000
+BSEG = 0x0000
+
+ \ No newline at end of file
diff --git a/demo/keypad_display.mem b/demo/keypad_display.mem
new file mode 100644
index 0000000..a205eff
--- /dev/null
+++ b/demo/keypad_display.mem
@@ -0,0 +1,28 @@
+Internal RAM layout:
+ 0 1 2 3 4 5 6 7 8 9 A B C D E F
+0x00:|0|0|0|0|0|0|0|0|a|a|a|S|S|S|S|S|
+0x10:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x20:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x30:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x40:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x50:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x60:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x70:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x80:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0x90:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xa0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xb0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xc0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xd0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xe0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0xf0:|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|S|
+0-3:Reg Banks, T:Bit regs, a-z:Data, B:Bits, Q:Overlay, I:iData, S:Stack, A:Absolute
+
+Stack starts at: 0x0b (sp set to 0x0a) with 245 bytes available.
+
+Other memory:
+ Name Start End Size Max
+ ---------------- -------- -------- -------- --------
+ PAGED EXT. RAM 0 0
+ EXTERNAL RAM 0 0
+ ROM/EPROM/FLASH 0x0000 0x012d 302 2048
diff --git a/demo/keypad_display.rel b/demo/keypad_display.rel
new file mode 100644
index 0000000..c4d3129
--- /dev/null
+++ b/demo/keypad_display.rel
@@ -0,0 +1,490 @@
+;!FILE keypad_display.asm
+XH
+H 1A areas 147 global symbols
+M keypad_display
+O -mmcs51 --model-small
+S G$EX0$0$0 Def00A8
+S G$IT0$0$0 Def0088
+S G$TH1$0$0 Def008D
+S _P1 Def0090
+S G$RXD$0$0 Def00B0
+S G$EX1$0$0 Def00AA
+S G$TB8$0$0 Def009B
+S G$IT1$0$0 Def008A
+S G$IE$0$0 Def00A8
+S _P2 Def00A0
+S _B Def00F0
+S _SP Def0081
+S _P3 Def00B0
+S _PS Def00BC
+S G$TXD$0$0 Def00B1
+S G$SM0$0$0 Def009F
+S G$TL0$0$0 Def008A
+S _T0 Def00B4
+S G$SM1$0$0 Def009E
+S G$TL1$0$0 Def008B
+S _T1 Def00B5
+S _OV Def00D2
+S G$SM2$0$0 Def009D
+S _ACC Def00E0
+S __mcs51_genRAMCLEAR Ref0000
+S G$PT0$0$0 Def00B9
+S G$RS0$0$0 Def00D3
+S G$PT1$0$0 Def00BB
+S _WR Def00B6
+S G$F0$0$0 Def00D5
+S G$RS1$0$0 Def00D4
+S G$RD$0$0 Def00B7
+S G$TR0$0$0 Def008C
+S G$F1$0$0 Def00D1
+S G$TR1$0$0 Def008E
+S G$PX0$0$0 Def00B8
+S G$ES$0$0 Def00AC
+S G$PX1$0$0 Def00BA
+S G$IP$0$0 Def00B8
+S G$PSW$0$0 Def00D0
+S G$RI$0$0 Def0098
+S _P0_0 Def0080
+S G$CY$0$0 Def00D7
+S _PCON Def0087
+S _SBUF Def0099
+S _P0_1 Def0081
+S _P1_0 Def0090
+S _P Def00D0
+S G$TI$0$0 Def0099
+S _P0_2 Def0082
+S _P1_1 Def0091
+S _P2_0 Def00A0
+S _P0_3 Def0083
+S _P1_2 Def0092
+S _P2_1 Def00A1
+S _P3_0 Def00B0
+S _SCON Def0098
+S _P0_4 Def0084
+S _P1_3 Def0093
+S _P2_2 Def00A2
+S _P3_1 Def00B1
+S G$P0$0$0 Def0080
+S _TCON Def0088
+S _TMOD Def0089
+S _P0_5 Def0085
+S _P1_4 Def0094
+S _P2_3 Def00A3
+S _P3_2 Def00B2
+S G$P1$0$0 Def0090
+S _P0_6 Def0086
+S _P1_5 Def0095
+S _P2_4 Def00A4
+S _P3_3 Def00B3
+S G$B$0$0 Def00F0
+S G$P2$0$0 Def00A0
+S _P0_7 Def0087
+S _P1_6 Def0096
+S _P2_5 Def00A5
+S _P3_4 Def00B4
+S G$PS$0$0 Def00BC
+S G$P3$0$0 Def00B0
+S G$SP$0$0 Def0081
+S _P1_7 Def0097
+S _P2_6 Def00A6
+S _P3_5 Def00B5
+S G$T0$0$0 Def00B4
+S _P2_7 Def00A7
+S _P3_6 Def00B6
+S G$OV$0$0 Def00D2
+S G$T1$0$0 Def00B5
+S _P3_7 Def00B7
+S G$ACC$0$0 Def00E0
+S _INT0 Def00B2
+S _DPH Def0083
+S _INT1 Def00B3
+S G$WR$0$0 Def00B6
+S _IE0 Def0089
+S _IE1 Def008B
+S _DPL Def0082
+S G$P0_0$0$0 Def0080
+S G$P$0$0 Def00D0
+S G$P1_0$0$0 Def0090
+S G$P0_1$0$0 Def0081
+S G$SBUF$0$0 Def0099
+S G$PCON$0$0 Def0087
+S _AC Def00D6
+S G$P2_0$0$0 Def00A0
+S G$P1_1$0$0 Def0091
+S G$P0_2$0$0 Def0082
+S _REN Def009C
+S G$P3_0$0$0 Def00B0
+S G$P2_1$0$0 Def00A1
+S G$P1_2$0$0 Def0092
+S G$P0_3$0$0 Def0083
+S _EA Def00AF
+S G$P3_1$0$0 Def00B1
+S G$P2_2$0$0 Def00A2
+S G$P1_3$0$0 Def0093
+S G$P0_4$0$0 Def0084
+S G$SCON$0$0 Def0098
+S G$P3_2$0$0 Def00B2
+S G$P2_3$0$0 Def00A3
+S G$P1_4$0$0 Def0094
+S G$P0_5$0$0 Def0085
+S G$TMOD$0$0 Def0089
+S G$TCON$0$0 Def0088
+S G$P3_3$0$0 Def00B3
+S G$P2_4$0$0 Def00A4
+S G$P1_5$0$0 Def0095
+S G$P0_6$0$0 Def0086
+S _ET0 Def00A9
+S G$P3_4$0$0 Def00B4
+S G$P2_5$0$0 Def00A5
+S G$P1_6$0$0 Def0096
+S G$P0_7$0$0 Def0087
+S _TF0 Def008D
+S _ET1 Def00AB
+S G$P3_5$0$0 Def00B5
+S G$P2_6$0$0 Def00A6
+S G$P1_7$0$0 Def0097
+S _TF1 Def008F
+S G$P3_6$0$0 Def00B6
+S G$P2_7$0$0 Def00A7
+S _TH0 Def008C
+S _RB8 Def009A
+S __mcs51_genXINIT Ref0000
+S G$P3_7$0$0 Def00B7
+S _TH1 Def008D
+S _IT0 Def0088
+S _EX0 Def00A8
+S _IE Def00A8
+S _IT1 Def008A
+S _TB8 Def009B
+S _EX1 Def00AA
+S _RXD Def00B0
+S G$INT0$0$0 Def00B2
+S G$INT1$0$0 Def00B3
+S G$DPH$0$0 Def0083
+S _TL0 Def008A
+S _SM0 Def009F
+S _TXD Def00B1
+S _TL1 Def008B
+S _SM1 Def009E
+S G$IE0$0$0 Def0089
+S _SM2 Def009D
+S G$IE1$0$0 Def008B
+S G$DPL$0$0 Def0082
+S _PT0 Def00B9
+S _PT1 Def00BB
+S _RS0 Def00D3
+S _TR0 Def008C
+S _RD Def00B7
+S _RS1 Def00D4
+S _F0 Def00D5
+S _TR1 Def008E
+S _F1 Def00D1
+S G$AC$0$0 Def00D6
+S _ES Def00AC
+S _PX0 Def00B8
+S G$REN$0$0 Def009C
+S _IP Def00B8
+S _PX1 Def00BA
+S G$EA$0$0 Def00AF
+S _PSW Def00D0
+S __sdcc_gsinit_startup Ref0000
+S _RI Def0098
+S _CY Def00D7
+S G$ET0$0$0 Def00A9
+S _TI Def0099
+S G$ET1$0$0 Def00AB
+S G$TF0$0$0 Def008D
+S G$TF1$0$0 Def008F
+S __mcs51_genXRAMCLEAR Ref0000
+S G$RB8$0$0 Def009A
+S G$TH0$0$0 Def008C
+S _P0 Def0080
+A _CODE size 0 flags 0 addr 0
+A RSEG size 0 flags 0 addr 0
+A REG_BANK_0 size 8 flags 4 addr 0
+A DSEG size 3 flags 0 addr 0
+S _state Def0000
+S G$row$0$0 Def0001
+S G$state$0$0 Def0000
+S _row Def0001
+A OSEG size 0 flags 4 addr 0
+A SSEG size 1 flags 0 addr 0
+S __start__stack Def0000
+A ISEG size 0 flags 0 addr 0
+A IABS size 0 flags 8 addr 0
+A BSEG size 0 flags 80 addr 0
+A PSEG size 0 flags 50 addr 0
+A XSEG size 0 flags 40 addr 0
+A XABS size 0 flags 48 addr 0
+A XISEG size 0 flags 40 addr 0
+A HOME size 8 flags 20 addr 0
+S A$keypad_display$403 Def0003
+S A$keypad_display$405 Def0006
+S A$keypad_display$381 Def0000
+S __sdcc_program_startup Def0003
+A GSINIT0 size 0 flags 20 addr 0
+A GSINIT1 size 0 flags 20 addr 0
+A GSINIT2 size 0 flags 20 addr 0
+A GSINIT3 size 0 flags 20 addr 0
+A GSINIT4 size 0 flags 20 addr 0
+A GSINIT5 size 0 flags 20 addr 0
+A GSINIT size 0 flags 20 addr 0
+A GSFINAL size 3 flags 20 addr 0
+S A$keypad_display$396 Def0000
+A CSEG size B2 flags 20 addr 0
+S _main Def0000
+S XG$main$0$0 Def00AF
+S A$keypad_display$510 Def0058
+S A$keypad_display$520 Def0069
+S A$keypad_display$511 Def0059
+S A$keypad_display$502 Def0051
+S A$keypad_display$530 Def007D
+S A$keypad_display$521 Def006B
+S A$keypad_display$512 Def005C
+S A$keypad_display$440 Def0008
+S A$keypad_display$540 Def0086
+S A$keypad_display$522 Def006E
+S A$keypad_display$450 Def0018
+S A$keypad_display$441 Def000A
+S A$keypad_display$550 Def008B
+S A$keypad_display$541 Def0087
+S A$keypad_display$523 Def006F
+S A$keypad_display$514 Def005E
+S A$keypad_display$451 Def001A
+S A$keypad_display$442 Def000C
+S A$keypad_display$551 Def008D
+S A$keypad_display$524 Def0072
+S A$keypad_display$515 Def0060
+S A$keypad_display$470 Def002D
+S A$keypad_display$452 Def001C
+S A$keypad_display$443 Def000E
+S A$keypad_display$434 Def0000
+S A$keypad_display$570 Def009D
+S A$keypad_display$552 Def0090
+S A$keypad_display$534 Def007F
+S A$keypad_display$516 Def0063
+S A$keypad_display$453 Def001E
+S A$keypad_display$444 Def0010
+S A$keypad_display$435 Def0001
+S G$main$0$0 Def0000
+S A$keypad_display$562 Def0095
+S A$keypad_display$553 Def0091
+S A$keypad_display$526 Def0074
+S A$keypad_display$517 Def0064
+S A$keypad_display$508 Def0054
+S A$keypad_display$463 Def0025
+S A$keypad_display$454 Def001F
+S A$keypad_display$436 Def0003
+S A$keypad_display$590 Def00AF
+S A$keypad_display$563 Def0097
+S A$keypad_display$527 Def0076
+S A$keypad_display$518 Def0067
+S A$keypad_display$509 Def0055
+S A$keypad_display$491 Def0044
+S A$keypad_display$482 Def003A
+S A$keypad_display$473 Def0030
+S A$keypad_display$455 Def0020
+S A$keypad_display$564 Def009A
+S A$keypad_display$546 Def0089
+S A$keypad_display$528 Def0079
+S A$keypad_display$492 Def0047
+S A$keypad_display$483 Def003D
+S A$keypad_display$474 Def0033
+S A$keypad_display$447 Def0012
+S A$keypad_display$438 Def0005
+S A$keypad_display$583 Def00A7
+S A$keypad_display$574 Def009F
+S A$keypad_display$565 Def009B
+S A$keypad_display$538 Def0081
+S A$keypad_display$529 Def007A
+S A$keypad_display$466 Def0028
+S A$keypad_display$448 Def0014
+S A$keypad_display$439 Def0006
+S A$keypad_display$584 Def00A9
+S A$keypad_display$575 Def00A1
+S A$keypad_display$539 Def0083
+S A$keypad_display$449 Def0016
+S C$keypad_display.c$40$1$1 Def0000
+S A$keypad_display$585 Def00AA
+S A$keypad_display$576 Def00A4
+S A$keypad_display$558 Def0093
+S A$keypad_display$459 Def0022
+S A$keypad_display$586 Def00AD
+S A$keypad_display$577 Def00A5
+S A$keypad_display$496 Def0049
+S A$keypad_display$487 Def003F
+S A$keypad_display$478 Def0035
+S A$keypad_display$469 Def002B
+S A$keypad_display$497 Def004B
+S A$keypad_display$488 Def0041
+S A$keypad_display$479 Def0037
+S C$keypad_display.c$41$2$2 Def00A7
+S A$keypad_display$498 Def004E
+S C$keypad_display.c$38$0$0 Def0000
+S C$keypad_display.c$60$3$3 Def003F
+S C$keypad_display.c$42$3$3 Def0012
+S C$keypad_display.c$81$2$2 Def00A7
+S C$keypad_display.c$84$1$1 Def00AF
+S C$keypad_display.c$62$3$3 Def0049
+S C$keypad_display.c$53$3$3 Def0025
+S C$keypad_display.c$54$3$3 Def0028
+S C$keypad_display.c$65$3$3 Def0054
+S C$keypad_display.c$61$4$6 Def0044
+S C$keypad_display.c$56$3$3 Def002B
+S C$keypad_display.c$48$3$3 Def0022
+S C$keypad_display.c$58$3$3 Def0035
+S C$keypad_display.c$70$4$9 Def0081
+S C$keypad_display.c$68$3$3 Def0054
+S C$keypad_display.c$63$4$7 Def0051
+S C$keypad_display.c$57$4$4 Def0030
+S C$keypad_display.c$71$4$9 Def0089
+S C$keypad_display.c$72$4$9 Def0089
+S C$keypad_display.c$73$4$9 Def008B
+S C$keypad_display.c$59$4$5 Def003A
+S C$keypad_display.c$74$4$9 Def0093
+S C$keypad_display.c$75$4$9 Def0093
+S C$keypad_display.c$76$4$9 Def0095
+S C$keypad_display.c$77$4$9 Def009D
+S C$keypad_display.c$78$4$9 Def009D
+S C$keypad_display.c$69$4$9 Def007F
+S C$keypad_display.c$79$4$9 Def009F
+A CONST size 14 flags 20 addr 0
+S Fkeypad_display$keypad$0$0 Def0000
+S Fkeypad_display$display_0$0$0 Def0004
+S Fkeypad_display$display_1$0$0 Def0008
+S Fkeypad_display$display_2$0$0 Def000C
+S Fkeypad_display$display_3$0$0 Def0010
+A XINIT size 0 flags 20 addr 0
+A CABS size 0 flags 28 addr 0
+T 00 00
+R 00 00 00 02
+T 00 00
+R 00 00 00 03
+T 00 00
+R 00 00 00 03
+T 00 01
+R 00 00 00 03
+T 00 01
+R 00 00 00 03
+T 00 00
+R 00 00 00 05
+T 00 00
+R 00 00 00 05
+T 00 00
+R 00 00 00 0D
+T 00 00 02 00 00
+R 00 00 00 0D 02 03 00 B8
+T 00 00 02 00 03
+R 00 00 00 15 00 03 00 0D
+T 00 03
+R 00 00 00 0D
+T 00 03 12 00 00 80 FE
+R 00 00 00 0D 00 03 00 16
+T 00 00
+R 00 00 00 16
+T 00 00
+R 00 00 00 16
+T 00 00 E4 F5 00 00 01 F5 00 00 02
+R 00 00 00 16 F1 21 04 00 03 F1 21 08 00 03
+T 00 05
+R 00 00 00 16
+T 00 05 C3 E5 00 00 01 94 04 E5 00 00 02 64 80 94
+R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03
+T 00 0F 80 50 EE E5 00 00 01 24 00 00 00 F5 82 E5
+R 00 00 00 16 F1 21 06 00 03 F1 01 0A 00 17
+T 00 19 00 00 02 34 00 00 00 F5 83 E4 93 F5 90 85
+R 00 00 00 16 F1 21 02 00 03 F1 81 06 00 17
+T 00 23 90 00 00 00 53 00 00 00 0F 63
+R 00 00 00 16 F1 21 03 00 03 F1 01 07 00 03
+T 00 29 00 00 00 0F E5 00 00 00 30 E0 05 75
+R 00 00 00 16 F1 01 02 00 03 F1 21 07 00 03
+T 00 31 00 00 00 00 80 1F
+R 00 00 00 16 F1 21 02 00 03
+T 00 35
+R 00 00 00 16
+T 00 35 E5 00 00 00 30 E1 05 75 00 00 00 01 80 15
+R 00 00 00 16 F1 21 03 00 03 F1 21 0A 00 03
+T 00 3F
+R 00 00 00 16
+T 00 3F E5 00 00 00 30 E2 05 75 00 00 00 02 80 0B
+R 00 00 00 16 F1 21 03 00 03 F1 21 0A 00 03
+T 00 49
+R 00 00 00 16
+T 00 49 E5 00 00 00 20 E3 03 02 00 A7
+R 00 00 00 16 F1 21 03 00 03 00 0A 00 16
+T 00 51
+R 00 00 00 16
+T 00 51 75 00 00 00 03
+R 00 00 00 16 F1 21 03 00 03
+T 00 54
+R 00 00 00 16
+T 00 54 E4 B5 00 00 01 06 E4 B5 00 00 02 02 80 23
+R 00 00 00 16 F1 21 04 00 03 F1 21 0A 00 03
+T 00 5E
+R 00 00 00 16
+T 00 5E 74 01 B5 00 00 01 06 E4 B5 00 00 02 02 80
+R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03
+T 00 68 22
+R 00 00 00 16
+T 00 69
+R 00 00 00 16
+T 00 69 74 02 B5 00 00 01 06 E4 B5 00 00 02 02 80
+R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03
+T 00 73 21
+R 00 00 00 16
+T 00 74
+R 00 00 00 16
+T 00 74 74 03 B5 00 00 01 06 E4 B5 00 00 02 02 80
+R 00 00 00 16 F1 21 05 00 03 F1 21 0B 00 03
+T 00 7E 20
+R 00 00 00 16
+T 00 7F
+R 00 00 00 16
+T 00 7F 80 26
+R 00 00 00 16
+T 00 81
+R 00 00 00 16
+T 00 81 E5 00 00 00 90 00 04 93 F5 B0 80 1C
+R 00 00 00 16 F1 21 03 00 03 00 07 00 17
+T 00 8B
+R 00 00 00 16
+T 00 8B E5 00 00 00 90 00 08 93 F5 B0 80 12
+R 00 00 00 16 F1 21 03 00 03 00 07 00 17
+T 00 95
+R 00 00 00 16
+T 00 95 E5 00 00 00 90 00 0C 93 F5 B0 80 08
+R 00 00 00 16 F1 21 03 00 03 00 07 00 17
+T 00 9F
+R 00 00 00 16
+T 00 9F E5 00 00 00 90 00 10 93 F5 B0
+R 00 00 00 16 F1 21 03 00 03 00 07 00 17
+T 00 A7
+R 00 00 00 16
+T 00 A7 05 00 00 01 E4 B5 00 00 01 02 05
+R 00 00 00 16 F1 21 03 00 03 F1 21 08 00 03
+T 00 AE 00 00 02
+R 00 00 00 16 F1 21 02 00 03
+T 00 AF
+R 00 00 00 16
+T 00 AF 02 00 05
+R 00 00 00 16 00 03 00 16
+T 00 00
+R 00 00 00 17
+T 00 00 EF DF BF 7F
+R 00 00 00 17
+T 00 04
+R 00 00 00 17
+T 00 04 F9 64 70 48
+R 00 00 00 17
+T 00 08
+R 00 00 00 17
+T 00 08 59 52 42 40
+R 00 00 00 17
+T 00 0C
+R 00 00 00 17
+T 00 0C F8 40 50 C6
+R 00 00 00 17
+T 00 10
+R 00 00 00 17
+T 00 10 79 C0 49 C0
+R 00 00 00 17
diff --git a/demo/keypad_display.rst b/demo/keypad_display.rst
new file mode 100644
index 0000000..e013b8e
--- /dev/null
+++ b/demo/keypad_display.rst
@@ -0,0 +1,624 @@
+ 1 ;--------------------------------------------------------
+ 2 ; File Created by SDCC : free open source ANSI-C Compiler
+ 3 ; Version 2.9.0 #5416 (Oct 6 2009) (UNIX)
+ 4 ; This file was generated Tue Oct 27 23:03:55 2009
+ 5 ;--------------------------------------------------------
+ 6 .module keypad_display
+ 7 .optsdcc -mmcs51 --model-small
+ 8
+ 9 ;--------------------------------------------------------
+ 10 ; Public variables in this module
+ 11 ;--------------------------------------------------------
+ 12 .globl _main
+ 13 .globl _CY
+ 14 .globl _AC
+ 15 .globl _F0
+ 16 .globl _RS1
+ 17 .globl _RS0
+ 18 .globl _OV
+ 19 .globl _F1
+ 20 .globl _P
+ 21 .globl _PS
+ 22 .globl _PT1
+ 23 .globl _PX1
+ 24 .globl _PT0
+ 25 .globl _PX0
+ 26 .globl _RD
+ 27 .globl _WR
+ 28 .globl _T1
+ 29 .globl _T0
+ 30 .globl _INT1
+ 31 .globl _INT0
+ 32 .globl _TXD
+ 33 .globl _RXD
+ 34 .globl _P3_7
+ 35 .globl _P3_6
+ 36 .globl _P3_5
+ 37 .globl _P3_4
+ 38 .globl _P3_3
+ 39 .globl _P3_2
+ 40 .globl _P3_1
+ 41 .globl _P3_0
+ 42 .globl _EA
+ 43 .globl _ES
+ 44 .globl _ET1
+ 45 .globl _EX1
+ 46 .globl _ET0
+ 47 .globl _EX0
+ 48 .globl _P2_7
+ 49 .globl _P2_6
+ 50 .globl _P2_5
+ 51 .globl _P2_4
+ 52 .globl _P2_3
+ 53 .globl _P2_2
+ 54 .globl _P2_1
+ 55 .globl _P2_0
+ 56 .globl _SM0
+ 57 .globl _SM1
+ 58 .globl _SM2
+ 59 .globl _REN
+ 60 .globl _TB8
+ 61 .globl _RB8
+ 62 .globl _TI
+ 63 .globl _RI
+ 64 .globl _P1_7
+ 65 .globl _P1_6
+ 66 .globl _P1_5
+ 67 .globl _P1_4
+ 68 .globl _P1_3
+ 69 .globl _P1_2
+ 70 .globl _P1_1
+ 71 .globl _P1_0
+ 72 .globl _TF1
+ 73 .globl _TR1
+ 74 .globl _TF0
+ 75 .globl _TR0
+ 76 .globl _IE1
+ 77 .globl _IT1
+ 78 .globl _IE0
+ 79 .globl _IT0
+ 80 .globl _P0_7
+ 81 .globl _P0_6
+ 82 .globl _P0_5
+ 83 .globl _P0_4
+ 84 .globl _P0_3
+ 85 .globl _P0_2
+ 86 .globl _P0_1
+ 87 .globl _P0_0
+ 88 .globl _B
+ 89 .globl _ACC
+ 90 .globl _PSW
+ 91 .globl _IP
+ 92 .globl _P3
+ 93 .globl _IE
+ 94 .globl _P2
+ 95 .globl _SBUF
+ 96 .globl _SCON
+ 97 .globl _P1
+ 98 .globl _TH1
+ 99 .globl _TH0
+ 100 .globl _TL1
+ 101 .globl _TL0
+ 102 .globl _TMOD
+ 103 .globl _TCON
+ 104 .globl _PCON
+ 105 .globl _DPH
+ 106 .globl _DPL
+ 107 .globl _SP
+ 108 .globl _P0
+ 109 .globl _row
+ 110 .globl _state
+ 111 ;--------------------------------------------------------
+ 112 ; special function registers
+ 113 ;--------------------------------------------------------
+ 114 .area RSEG (DATA)
+ 0080 115 G$P0$0$0 == 0x0080
+ 0080 116 _P0 = 0x0080
+ 0081 117 G$SP$0$0 == 0x0081
+ 0081 118 _SP = 0x0081
+ 0082 119 G$DPL$0$0 == 0x0082
+ 0082 120 _DPL = 0x0082
+ 0083 121 G$DPH$0$0 == 0x0083
+ 0083 122 _DPH = 0x0083
+ 0087 123 G$PCON$0$0 == 0x0087
+ 0087 124 _PCON = 0x0087
+ 0088 125 G$TCON$0$0 == 0x0088
+ 0088 126 _TCON = 0x0088
+ 0089 127 G$TMOD$0$0 == 0x0089
+ 0089 128 _TMOD = 0x0089
+ 008A 129 G$TL0$0$0 == 0x008a
+ 008A 130 _TL0 = 0x008a
+ 008B 131 G$TL1$0$0 == 0x008b
+ 008B 132 _TL1 = 0x008b
+ 008C 133 G$TH0$0$0 == 0x008c
+ 008C 134 _TH0 = 0x008c
+ 008D 135 G$TH1$0$0 == 0x008d
+ 008D 136 _TH1 = 0x008d
+ 0090 137 G$P1$0$0 == 0x0090
+ 0090 138 _P1 = 0x0090
+ 0098 139 G$SCON$0$0 == 0x0098
+ 0098 140 _SCON = 0x0098
+ 0099 141 G$SBUF$0$0 == 0x0099
+ 0099 142 _SBUF = 0x0099
+ 00A0 143 G$P2$0$0 == 0x00a0
+ 00A0 144 _P2 = 0x00a0
+ 00A8 145 G$IE$0$0 == 0x00a8
+ 00A8 146 _IE = 0x00a8
+ 00B0 147 G$P3$0$0 == 0x00b0
+ 00B0 148 _P3 = 0x00b0
+ 00B8 149 G$IP$0$0 == 0x00b8
+ 00B8 150 _IP = 0x00b8
+ 00D0 151 G$PSW$0$0 == 0x00d0
+ 00D0 152 _PSW = 0x00d0
+ 00E0 153 G$ACC$0$0 == 0x00e0
+ 00E0 154 _ACC = 0x00e0
+ 00F0 155 G$B$0$0 == 0x00f0
+ 00F0 156 _B = 0x00f0
+ 157 ;--------------------------------------------------------
+ 158 ; special function bits
+ 159 ;--------------------------------------------------------
+ 160 .area RSEG (DATA)
+ 0080 161 G$P0_0$0$0 == 0x0080
+ 0080 162 _P0_0 = 0x0080
+ 0081 163 G$P0_1$0$0 == 0x0081
+ 0081 164 _P0_1 = 0x0081
+ 0082 165 G$P0_2$0$0 == 0x0082
+ 0082 166 _P0_2 = 0x0082
+ 0083 167 G$P0_3$0$0 == 0x0083
+ 0083 168 _P0_3 = 0x0083
+ 0084 169 G$P0_4$0$0 == 0x0084
+ 0084 170 _P0_4 = 0x0084
+ 0085 171 G$P0_5$0$0 == 0x0085
+ 0085 172 _P0_5 = 0x0085
+ 0086 173 G$P0_6$0$0 == 0x0086
+ 0086 174 _P0_6 = 0x0086
+ 0087 175 G$P0_7$0$0 == 0x0087
+ 0087 176 _P0_7 = 0x0087
+ 0088 177 G$IT0$0$0 == 0x0088
+ 0088 178 _IT0 = 0x0088
+ 0089 179 G$IE0$0$0 == 0x0089
+ 0089 180 _IE0 = 0x0089
+ 008A 181 G$IT1$0$0 == 0x008a
+ 008A 182 _IT1 = 0x008a
+ 008B 183 G$IE1$0$0 == 0x008b
+ 008B 184 _IE1 = 0x008b
+ 008C 185 G$TR0$0$0 == 0x008c
+ 008C 186 _TR0 = 0x008c
+ 008D 187 G$TF0$0$0 == 0x008d
+ 008D 188 _TF0 = 0x008d
+ 008E 189 G$TR1$0$0 == 0x008e
+ 008E 190 _TR1 = 0x008e
+ 008F 191 G$TF1$0$0 == 0x008f
+ 008F 192 _TF1 = 0x008f
+ 0090 193 G$P1_0$0$0 == 0x0090
+ 0090 194 _P1_0 = 0x0090
+ 0091 195 G$P1_1$0$0 == 0x0091
+ 0091 196 _P1_1 = 0x0091
+ 0092 197 G$P1_2$0$0 == 0x0092
+ 0092 198 _P1_2 = 0x0092
+ 0093 199 G$P1_3$0$0 == 0x0093
+ 0093 200 _P1_3 = 0x0093
+ 0094 201 G$P1_4$0$0 == 0x0094
+ 0094 202 _P1_4 = 0x0094
+ 0095 203 G$P1_5$0$0 == 0x0095
+ 0095 204 _P1_5 = 0x0095
+ 0096 205 G$P1_6$0$0 == 0x0096
+ 0096 206 _P1_6 = 0x0096
+ 0097 207 G$P1_7$0$0 == 0x0097
+ 0097 208 _P1_7 = 0x0097
+ 0098 209 G$RI$0$0 == 0x0098
+ 0098 210 _RI = 0x0098
+ 0099 211 G$TI$0$0 == 0x0099
+ 0099 212 _TI = 0x0099
+ 009A 213 G$RB8$0$0 == 0x009a
+ 009A 214 _RB8 = 0x009a
+ 009B 215 G$TB8$0$0 == 0x009b
+ 009B 216 _TB8 = 0x009b
+ 009C 217 G$REN$0$0 == 0x009c
+ 009C 218 _REN = 0x009c
+ 009D 219 G$SM2$0$0 == 0x009d
+ 009D 220 _SM2 = 0x009d
+ 009E 221 G$SM1$0$0 == 0x009e
+ 009E 222 _SM1 = 0x009e
+ 009F 223 G$SM0$0$0 == 0x009f
+ 009F 224 _SM0 = 0x009f
+ 00A0 225 G$P2_0$0$0 == 0x00a0
+ 00A0 226 _P2_0 = 0x00a0
+ 00A1 227 G$P2_1$0$0 == 0x00a1
+ 00A1 228 _P2_1 = 0x00a1
+ 00A2 229 G$P2_2$0$0 == 0x00a2
+ 00A2 230 _P2_2 = 0x00a2
+ 00A3 231 G$P2_3$0$0 == 0x00a3
+ 00A3 232 _P2_3 = 0x00a3
+ 00A4 233 G$P2_4$0$0 == 0x00a4
+ 00A4 234 _P2_4 = 0x00a4
+ 00A5 235 G$P2_5$0$0 == 0x00a5
+ 00A5 236 _P2_5 = 0x00a5
+ 00A6 237 G$P2_6$0$0 == 0x00a6
+ 00A6 238 _P2_6 = 0x00a6
+ 00A7 239 G$P2_7$0$0 == 0x00a7
+ 00A7 240 _P2_7 = 0x00a7
+ 00A8 241 G$EX0$0$0 == 0x00a8
+ 00A8 242 _EX0 = 0x00a8
+ 00A9 243 G$ET0$0$0 == 0x00a9
+ 00A9 244 _ET0 = 0x00a9
+ 00AA 245 G$EX1$0$0 == 0x00aa
+ 00AA 246 _EX1 = 0x00aa
+ 00AB 247 G$ET1$0$0 == 0x00ab
+ 00AB 248 _ET1 = 0x00ab
+ 00AC 249 G$ES$0$0 == 0x00ac
+ 00AC 250 _ES = 0x00ac
+ 00AF 251 G$EA$0$0 == 0x00af
+ 00AF 252 _EA = 0x00af
+ 00B0 253 G$P3_0$0$0 == 0x00b0
+ 00B0 254 _P3_0 = 0x00b0
+ 00B1 255 G$P3_1$0$0 == 0x00b1
+ 00B1 256 _P3_1 = 0x00b1
+ 00B2 257 G$P3_2$0$0 == 0x00b2
+ 00B2 258 _P3_2 = 0x00b2
+ 00B3 259 G$P3_3$0$0 == 0x00b3
+ 00B3 260 _P3_3 = 0x00b3
+ 00B4 261 G$P3_4$0$0 == 0x00b4
+ 00B4 262 _P3_4 = 0x00b4
+ 00B5 263 G$P3_5$0$0 == 0x00b5
+ 00B5 264 _P3_5 = 0x00b5
+ 00B6 265 G$P3_6$0$0 == 0x00b6
+ 00B6 266 _P3_6 = 0x00b6
+ 00B7 267 G$P3_7$0$0 == 0x00b7
+ 00B7 268 _P3_7 = 0x00b7
+ 00B0 269 G$RXD$0$0 == 0x00b0
+ 00B0 270 _RXD = 0x00b0
+ 00B1 271 G$TXD$0$0 == 0x00b1
+ 00B1 272 _TXD = 0x00b1
+ 00B2 273 G$INT0$0$0 == 0x00b2
+ 00B2 274 _INT0 = 0x00b2
+ 00B3 275 G$INT1$0$0 == 0x00b3
+ 00B3 276 _INT1 = 0x00b3
+ 00B4 277 G$T0$0$0 == 0x00b4
+ 00B4 278 _T0 = 0x00b4
+ 00B5 279 G$T1$0$0 == 0x00b5
+ 00B5 280 _T1 = 0x00b5
+ 00B6 281 G$WR$0$0 == 0x00b6
+ 00B6 282 _WR = 0x00b6
+ 00B7 283 G$RD$0$0 == 0x00b7
+ 00B7 284 _RD = 0x00b7
+ 00B8 285 G$PX0$0$0 == 0x00b8
+ 00B8 286 _PX0 = 0x00b8
+ 00B9 287 G$PT0$0$0 == 0x00b9
+ 00B9 288 _PT0 = 0x00b9
+ 00BA 289 G$PX1$0$0 == 0x00ba
+ 00BA 290 _PX1 = 0x00ba
+ 00BB 291 G$PT1$0$0 == 0x00bb
+ 00BB 292 _PT1 = 0x00bb
+ 00BC 293 G$PS$0$0 == 0x00bc
+ 00BC 294 _PS = 0x00bc
+ 00D0 295 G$P$0$0 == 0x00d0
+ 00D0 296 _P = 0x00d0
+ 00D1 297 G$F1$0$0 == 0x00d1
+ 00D1 298 _F1 = 0x00d1
+ 00D2 299 G$OV$0$0 == 0x00d2
+ 00D2 300 _OV = 0x00d2
+ 00D3 301 G$RS0$0$0 == 0x00d3
+ 00D3 302 _RS0 = 0x00d3
+ 00D4 303 G$RS1$0$0 == 0x00d4
+ 00D4 304 _RS1 = 0x00d4
+ 00D5 305 G$F0$0$0 == 0x00d5
+ 00D5 306 _F0 = 0x00d5
+ 00D6 307 G$AC$0$0 == 0x00d6
+ 00D6 308 _AC = 0x00d6
+ 00D7 309 G$CY$0$0 == 0x00d7
+ 00D7 310 _CY = 0x00d7
+ 311 ;--------------------------------------------------------
+ 312 ; overlayable register banks
+ 313 ;--------------------------------------------------------
+ 314 .area REG_BANK_0 (REL,OVR,DATA)
+ 0000 315 .ds 8
+ 316 ;--------------------------------------------------------
+ 317 ; internal ram data
+ 318 ;--------------------------------------------------------
+ 319 .area DSEG (DATA)
+ 0000 320 G$state$0$0==.
+ 0008 321 _state::
+ 0008 322 .ds 1
+ 0001 323 G$row$0$0==.
+ 0009 324 _row::
+ 0009 325 .ds 2
+ 326 ;--------------------------------------------------------
+ 327 ; overlayable items in internal ram
+ 328 ;--------------------------------------------------------
+ 329 .area OSEG (OVR,DATA)
+ 330 ;--------------------------------------------------------
+ 331 ; Stack segment in internal ram
+ 332 ;--------------------------------------------------------
+ 333 .area SSEG (DATA)
+ 000B 334 __start__stack:
+ 000B 335 .ds 1
+ 336
+ 337 ;--------------------------------------------------------
+ 338 ; indirectly addressable internal ram data
+ 339 ;--------------------------------------------------------
+ 340 .area ISEG (DATA)
+ 341 ;--------------------------------------------------------
+ 342 ; absolute internal ram data
+ 343 ;--------------------------------------------------------
+ 344 .area IABS (ABS,DATA)
+ 345 .area IABS (ABS,DATA)
+ 346 ;--------------------------------------------------------
+ 347 ; bit data
+ 348 ;--------------------------------------------------------
+ 349 .area BSEG (BIT)
+ 350 ;--------------------------------------------------------
+ 351 ; paged external ram data
+ 352 ;--------------------------------------------------------
+ 353 .area PSEG (PAG,XDATA)
+ 354 ;--------------------------------------------------------
+ 355 ; external ram data
+ 356 ;--------------------------------------------------------
+ 357 .area XSEG (XDATA)
+ 358 ;--------------------------------------------------------
+ 359 ; absolute external ram data
+ 360 ;--------------------------------------------------------
+ 361 .area XABS (ABS,XDATA)
+ 362 ;--------------------------------------------------------
+ 363 ; external initialized ram data
+ 364 ;--------------------------------------------------------
+ 365 .area XISEG (XDATA)
+ 366 .area HOME (CODE)
+ 367 .area GSINIT0 (CODE)
+ 368 .area GSINIT1 (CODE)
+ 369 .area GSINIT2 (CODE)
+ 370 .area GSINIT3 (CODE)
+ 371 .area GSINIT4 (CODE)
+ 372 .area GSINIT5 (CODE)
+ 373 .area GSINIT (CODE)
+ 374 .area GSFINAL (CODE)
+ 375 .area CSEG (CODE)
+ 376 ;--------------------------------------------------------
+ 377 ; interrupt vector
+ 378 ;--------------------------------------------------------
+ 379 .area HOME (CODE)
+ 0000 380 __interrupt_vect:
+ 0000 02 00 08 381 ljmp __sdcc_gsinit_startup
+ 382 ;--------------------------------------------------------
+ 383 ; global & static initialisations
+ 384 ;--------------------------------------------------------
+ 385 .area HOME (CODE)
+ 386 .area GSINIT (CODE)
+ 387 .area GSFINAL (CODE)
+ 388 .area GSINIT (CODE)
+ 389 .globl __sdcc_gsinit_startup
+ 390 .globl __sdcc_program_startup
+ 391 .globl __start__stack
+ 392 .globl __mcs51_genXINIT
+ 393 .globl __mcs51_genXRAMCLEAR
+ 394 .globl __mcs51_genRAMCLEAR
+ 395 .area GSFINAL (CODE)
+ 0061 02 00 03 396 ljmp __sdcc_program_startup
+ 397 ;--------------------------------------------------------
+ 398 ; Home
+ 399 ;--------------------------------------------------------
+ 400 .area HOME (CODE)
+ 401 .area HOME (CODE)
+ 0003 402 __sdcc_program_startup:
+ 0003 12 00 64 403 lcall _main
+ 404 ; return from main will lock up
+ 0006 80 FE 405 sjmp .
+ 406 ;--------------------------------------------------------
+ 407 ; code
+ 408 ;--------------------------------------------------------
+ 409 .area CSEG (CODE)
+ 410 ;------------------------------------------------------------
+ 411 ;Allocation info for local variables in function 'main'
+ 412 ;------------------------------------------------------------
+ 413 ;------------------------------------------------------------
+ 0000 414 G$main$0$0 ==.
+ 0000 415 C$keypad_display.c$38$0$0 ==.
+ 416 ; keypad_display.c:38: int main()
+ 417 ; -----------------------------------------
+ 418 ; function main
+ 419 ; -----------------------------------------
+ 0064 420 _main:
+ 0002 421 ar2 = 0x02
+ 0003 422 ar3 = 0x03
+ 0004 423 ar4 = 0x04
+ 0005 424 ar5 = 0x05
+ 0006 425 ar6 = 0x06
+ 0007 426 ar7 = 0x07
+ 0000 427 ar0 = 0x00
+ 0001 428 ar1 = 0x01
+ 0000 429 C$keypad_display.c$40$1$1 ==.
+ 430 ; keypad_display.c:40: while(1) {
+ 0064 431 00123$:
+ 0000 432 C$keypad_display.c$41$2$2 ==.
+ 433 ; keypad_display.c:41: for(row=0; row<4; row++) {
+ 0064 E4 434 clr a
+ 0065 F5 09 435 mov _row,a
+ 0067 F5 0A 436 mov (_row + 1),a
+ 0069 437 00118$:
+ 0069 C3 438 clr c
+ 006A E5 09 439 mov a,_row
+ 006C 94 04 440 subb a,#0x04
+ 006E E5 0A 441 mov a,(_row + 1)
+ 0070 64 80 442 xrl a,#0x80
+ 0072 94 80 443 subb a,#0x80
+ 0074 50 EE 444 jnc 00123$
+ 0012 445 C$keypad_display.c$42$3$3 ==.
+ 446 ; keypad_display.c:42: P1=keypad[row];
+ 0076 E5 09 447 mov a,_row
+ 0078 24 1A 448 add a,#_keypad
+ 007A F5 82 449 mov dpl,a
+ 007C E5 0A 450 mov a,(_row + 1)
+ 007E 34 01 451 addc a,#(_keypad >> 8)
+ 0080 F5 83 452 mov dph,a
+ 0082 E4 453 clr a
+ 0083 93 454 movc a,@a+dptr
+ 0084 F5 90 455 mov _P1,a
+ 0022 456 C$keypad_display.c$48$3$3 ==.
+ 457 ; keypad_display.c:48: _endasm;
+ 458
+ 0086 85 90 08 459 mov _state, P1
+ 460
+ 0025 461 C$keypad_display.c$53$3$3 ==.
+ 462 ; keypad_display.c:53: state&=0x0f;
+ 0089 53 08 0F 463 anl _state,#0x0F
+ 0028 464 C$keypad_display.c$54$3$3 ==.
+ 465 ; keypad_display.c:54: state^=0x0f;
+ 008C 63 08 0F 466 xrl _state,#0x0F
+ 002B 467 C$keypad_display.c$56$3$3 ==.
+ 468 ; keypad_display.c:56: if(state & 1) {
+ 008F E5 08 469 mov a,_state
+ 0091 30 E0 05 470 jnb acc.0,00111$
+ 0030 471 C$keypad_display.c$57$4$4 ==.
+ 472 ; keypad_display.c:57: state=0;
+ 0094 75 08 00 473 mov _state,#0x00
+ 0097 80 1F 474 sjmp 00112$
+ 0099 475 00111$:
+ 0035 476 C$keypad_display.c$58$3$3 ==.
+ 477 ; keypad_display.c:58: } else if(state & 2) {
+ 0099 E5 08 478 mov a,_state
+ 009B 30 E1 05 479 jnb acc.1,00108$
+ 003A 480 C$keypad_display.c$59$4$5 ==.
+ 481 ; keypad_display.c:59: state=1;
+ 009E 75 08 01 482 mov _state,#0x01
+ 00A1 80 15 483 sjmp 00112$
+ 00A3 484 00108$:
+ 003F 485 C$keypad_display.c$60$3$3 ==.
+ 486 ; keypad_display.c:60: } else if(state & 4) {
+ 00A3 E5 08 487 mov a,_state
+ 00A5 30 E2 05 488 jnb acc.2,00105$
+ 0044 489 C$keypad_display.c$61$4$6 ==.
+ 490 ; keypad_display.c:61: state=2;
+ 00A8 75 08 02 491 mov _state,#0x02
+ 00AB 80 0B 492 sjmp 00112$
+ 00AD 493 00105$:
+ 0049 494 C$keypad_display.c$62$3$3 ==.
+ 495 ; keypad_display.c:62: } else if(state & 8) {
+ 00AD E5 08 496 mov a,_state
+ 00AF 20 E3 03 497 jb acc.3,00142$
+ 00B2 02 01 0B 498 ljmp 00120$
+ 00B5 499 00142$:
+ 0051 500 C$keypad_display.c$63$4$7 ==.
+ 501 ; keypad_display.c:63: state=3;
+ 00B5 75 08 03 502 mov _state,#0x03
+ 0054 503 C$keypad_display.c$65$3$3 ==.
+ 504 ; keypad_display.c:65: continue;
+ 00B8 505 00112$:
+ 0054 506 C$keypad_display.c$68$3$3 ==.
+ 507 ; keypad_display.c:68: switch(row) {
+ 00B8 E4 508 clr a
+ 00B9 B5 09 06 509 cjne a,_row,00143$
+ 00BC E4 510 clr a
+ 00BD B5 0A 02 511 cjne a,(_row + 1),00143$
+ 00C0 80 23 512 sjmp 00113$
+ 00C2 513 00143$:
+ 00C2 74 01 514 mov a,#0x01
+ 00C4 B5 09 06 515 cjne a,_row,00144$
+ 00C7 E4 516 clr a
+ 00C8 B5 0A 02 517 cjne a,(_row + 1),00144$
+ 00CB 80 22 518 sjmp 00114$
+ 00CD 519 00144$:
+ 00CD 74 02 520 mov a,#0x02
+ 00CF B5 09 06 521 cjne a,_row,00145$
+ 00D2 E4 522 clr a
+ 00D3 B5 0A 02 523 cjne a,(_row + 1),00145$
+ 00D6 80 21 524 sjmp 00115$
+ 00D8 525 00145$:
+ 00D8 74 03 526 mov a,#0x03
+ 00DA B5 09 06 527 cjne a,_row,00146$
+ 00DD E4 528 clr a
+ 00DE B5 0A 02 529 cjne a,(_row + 1),00146$
+ 00E1 80 20 530 sjmp 00116$
+ 00E3 531 00146$:
+ 007F 532 C$keypad_display.c$69$4$9 ==.
+ 533 ; keypad_display.c:69: case 0:
+ 00E3 80 26 534 sjmp 00120$
+ 00E5 535 00113$:
+ 0081 536 C$keypad_display.c$70$4$9 ==.
+ 537 ; keypad_display.c:70: P3=display_0[state];
+ 00E5 E5 08 538 mov a,_state
+ 00E7 90 01 1E 539 mov dptr,#_display_0
+ 00EA 93 540 movc a,@a+dptr
+ 00EB F5 B0 541 mov _P3,a
+ 0089 542 C$keypad_display.c$71$4$9 ==.
+ 543 ; keypad_display.c:71: break;
+ 0089 544 C$keypad_display.c$72$4$9 ==.
+ 545 ; keypad_display.c:72: case 1:
+ 00ED 80 1C 546 sjmp 00120$
+ 00EF 547 00114$:
+ 008B 548 C$keypad_display.c$73$4$9 ==.
+ 549 ; keypad_display.c:73: P3=display_1[state];
+ 00EF E5 08 550 mov a,_state
+ 00F1 90 01 22 551 mov dptr,#_display_1
+ 00F4 93 552 movc a,@a+dptr
+ 00F5 F5 B0 553 mov _P3,a
+ 0093 554 C$keypad_display.c$74$4$9 ==.
+ 555 ; keypad_display.c:74: break;
+ 0093 556 C$keypad_display.c$75$4$9 ==.
+ 557 ; keypad_display.c:75: case 2:
+ 00F7 80 12 558 sjmp 00120$
+ 00F9 559 00115$:
+ 0095 560 C$keypad_display.c$76$4$9 ==.
+ 561 ; keypad_display.c:76: P3=display_2[state];
+ 00F9 E5 08 562 mov a,_state
+ 00FB 90 01 26 563 mov dptr,#_display_2
+ 00FE 93 564 movc a,@a+dptr
+ 00FF F5 B0 565 mov _P3,a
+ 009D 566 C$keypad_display.c$77$4$9 ==.
+ 567 ; keypad_display.c:77: break;
+ 009D 568 C$keypad_display.c$78$4$9 ==.
+ 569 ; keypad_display.c:78: case 3:
+ 0101 80 08 570 sjmp 00120$
+ 0103 571 00116$:
+ 009F 572 C$keypad_display.c$79$4$9 ==.
+ 573 ; keypad_display.c:79: P3=display_3[state];
+ 0103 E5 08 574 mov a,_state
+ 0105 90 01 2A 575 mov dptr,#_display_3
+ 0108 93 576 movc a,@a+dptr
+ 0109 F5 B0 577 mov _P3,a
+ 00A7 578 C$keypad_display.c$81$2$2 ==.
+ 579 ; keypad_display.c:81: }
+ 010B 580 00120$:
+ 00A7 581 C$keypad_display.c$41$2$2 ==.
+ 582 ; keypad_display.c:41: for(row=0; row<4; row++) {
+ 010B 05 09 583 inc _row
+ 010D E4 584 clr a
+ 010E B5 09 02 585 cjne a,_row,00147$
+ 0111 05 0A 586 inc (_row + 1)
+ 0113 587 00147$:
+ 00AF 588 C$keypad_display.c$84$1$1 ==.
+ 00AF 589 XG$main$0$0 ==.
+ 0113 02 00 69 590 ljmp 00118$
+ 591 .area CSEG (CODE)
+ 592 .area CONST (CODE)
+ 0000 593 Fkeypad_display$keypad$0$0 == .
+ 011A 594 _keypad:
+ 011A EF 595 .db #0xEF
+ 011B DF 596 .db #0xDF
+ 011C BF 597 .db #0xBF
+ 011D 7F 598 .db #0x7F
+ 0004 599 Fkeypad_display$display_0$0$0 == .
+ 011E 600 _display_0:
+ 011E F9 601 .db #0xF9
+ 011F 64 602 .db #0x64
+ 0120 70 603 .db #0x70
+ 0121 48 604 .db #0x48
+ 0008 605 Fkeypad_display$display_1$0$0 == .
+ 0122 606 _display_1:
+ 0122 59 607 .db #0x59
+ 0123 52 608 .db #0x52
+ 0124 42 609 .db #0x42
+ 0125 40 610 .db #0x40
+ 000C 611 Fkeypad_display$display_2$0$0 == .
+ 0126 612 _display_2:
+ 0126 F8 613 .db #0xF8
+ 0127 40 614 .db #0x40
+ 0128 50 615 .db #0x50
+ 0129 C6 616 .db #0xC6
+ 0010 617 Fkeypad_display$display_3$0$0 == .
+ 012A 618 _display_3:
+ 012A 79 619 .db #0x79
+ 012B C0 620 .db #0xC0
+ 012C 49 621 .db #0x49
+ 012D C0 622 .db #0xC0
+ 623 .area XINIT (CODE)
+ 624 .area CABS (ABS,CODE)
diff --git a/demo/keypad_display.sym b/demo/keypad_display.sym
new file mode 100644
index 0000000..eded721
--- /dev/null
+++ b/demo/keypad_display.sym
@@ -0,0 +1,712 @@
+ ASxxxx Assembler V01.70 + NoICE + SDCC mods + Flat24 Feb-1999 (Intel 8051), page 1.
+
+Symbol Table
+
+ A 00D6
+ D A$keypad_display$381 0000 GR
+ 15 A$keypad_display$396 0000 GR
+ D A$keypad_display$403 0003 GR
+ D A$keypad_display$405 0006 GR
+ 16 A$keypad_display$434 0000 GR
+ 16 A$keypad_display$435 0001 GR
+ 16 A$keypad_display$436 0003 GR
+ 16 A$keypad_display$438 0005 GR
+ 16 A$keypad_display$439 0006 GR
+ 16 A$keypad_display$440 0008 GR
+ 16 A$keypad_display$441 000A GR
+ 16 A$keypad_display$442 000C GR
+ 16 A$keypad_display$443 000E GR
+ 16 A$keypad_display$444 0010 GR
+ 16 A$keypad_display$447 0012 GR
+ 16 A$keypad_display$448 0014 GR
+ 16 A$keypad_display$449 0016 GR
+ 16 A$keypad_display$450 0018 GR
+ 16 A$keypad_display$451 001A GR
+ 16 A$keypad_display$452 001C GR
+ 16 A$keypad_display$453 001E GR
+ 16 A$keypad_display$454 001F GR
+ 16 A$keypad_display$455 0020 GR
+ 16 A$keypad_display$459 0022 GR
+ 16 A$keypad_display$463 0025 GR
+ 16 A$keypad_display$466 0028 GR
+ 16 A$keypad_display$469 002B GR
+ 16 A$keypad_display$470 002D GR
+ 16 A$keypad_display$473 0030 GR
+ 16 A$keypad_display$474 0033 GR
+ 16 A$keypad_display$478 0035 GR
+ 16 A$keypad_display$479 0037 GR
+ 16 A$keypad_display$482 003A GR
+ 16 A$keypad_display$483 003D GR
+ 16 A$keypad_display$487 003F GR
+ 16 A$keypad_display$488 0041 GR
+ 16 A$keypad_display$491 0044 GR
+ 16 A$keypad_display$492 0047 GR
+ 16 A$keypad_display$496 0049 GR
+ 16 A$keypad_display$497 004B GR
+ 16 A$keypad_display$498 004E GR
+ 16 A$keypad_display$502 0051 GR
+ 16 A$keypad_display$508 0054 GR
+ 16 A$keypad_display$509 0055 GR
+ 16 A$keypad_display$510 0058 GR
+ 16 A$keypad_display$511 0059 GR
+ 16 A$keypad_display$512 005C GR
+ 16 A$keypad_display$514 005E GR
+ 16 A$keypad_display$515 0060 GR
+ 16 A$keypad_display$516 0063 GR
+ 16 A$keypad_display$517 0064 GR
+ 16 A$keypad_display$518 0067 GR
+ 16 A$keypad_display$520 0069 GR
+ 16 A$keypad_display$521 006B GR
+ 16 A$keypad_display$522 006E GR
+ 16 A$keypad_display$523 006F GR
+ 16 A$keypad_display$524 0072 GR
+ 16 A$keypad_display$526 0074 GR
+ 16 A$keypad_display$527 0076 GR
+ 16 A$keypad_display$528 0079 GR
+ 16 A$keypad_display$529 007A GR
+ 16 A$keypad_display$530 007D GR
+ 16 A$keypad_display$534 007F GR
+ 16 A$keypad_display$538 0081 GR
+ 16 A$keypad_display$539 0083 GR
+ 16 A$keypad_display$540 0086 GR
+ 16 A$keypad_display$541 0087 GR
+ 16 A$keypad_display$546 0089 GR
+ 16 A$keypad_display$550 008B GR
+ 16 A$keypad_display$551 008D GR
+ 16 A$keypad_display$552 0090 GR
+ 16 A$keypad_display$553 0091 GR
+ 16 A